board/esd/cpci750/cpci750.c

   1 /*
   2  * (C) Copyright 2001
   3  * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  *
  23  * modifications for the DB64360 eval board based by Ingo.Assmus@keymile.com
  24  * modifications for the cpci750 by reinhard.arlt@esd-electronics.com
  25  */
  26
  27 /*
  28  * cpci750.c - main board support/init for the esd cpci750.
  29  */
  30
  31 #include <common.h>
  32 #include <command.h>
  33 #include <74xx_7xx.h>
  34 #include "../../Marvell/include/memory.h"
  35 #include "../../Marvell/include/pci.h"
  36 #include "../../Marvell/include/mv_gen_reg.h"
  37 #include <net.h>
  38
  39 #include "eth.h"
  40 #include "mpsc.h"
  41 #include "i2c.h"
  42 #include "64360.h"
  43 #include "mv_regs.h"
  44
  45 #undef  DEBUG
  46 /*#define       DEBUG */
  47
  48 #ifdef CONFIG_PCI
  49 #define MAP_PCI
  50 #endif /* of CONFIG_PCI */
  51
  52 #ifdef DEBUG
  53 #define DP(x) x
  54 #else
  55 #define DP(x)
  56 #endif
  57
  58 static char show_config_tab[][15] = {{"PCI0DLL_2     "},  /* 31 */
  59                                      {"PCI0DLL_1     "},  /* 30 */
  60                                      {"PCI0DLL_0     "},  /* 29 */
  61                                      {"PCI1DLL_2     "},  /* 28 */
  62                                      {"PCI1DLL_1     "},  /* 27 */
  63                                      {"PCI1DLL_0     "},  /* 26 */
  64                                      {"BbEP2En       "},  /* 25 */
  65                                      {"SDRAMRdDataDel"},  /* 24 */
  66                                      {"SDRAMRdDel    "},  /* 23 */
  67                                      {"SDRAMSync     "},  /* 22 */
  68                                      {"SDRAMPipeSel_1"},  /* 21 */
  69                                      {"SDRAMPipeSel_0"},  /* 20 */
  70                                      {"SDRAMAddDel   "},  /* 19 */
  71                                      {"SDRAMClkSel   "},  /* 18 */
  72                                      {"Reserved(1!)  "},  /* 17 */
  73                                      {"PCIRty        "},  /* 16 */
  74                                      {"BootCSWidth_1 "},  /* 15 */
  75                                      {"BootCSWidth_0 "},  /* 14 */
  76                                      {"PCI1PadsCal   "},  /* 13 */
  77                                      {"PCI0PadsCal   "},  /* 12 */
  78                                      {"MultiMVId_1   "},  /* 11 */
  79                                      {"MultiMVId_0   "},  /* 10 */
  80                                      {"MultiGTEn     "},  /* 09 */
  81                                      {"Int60xArb     "},  /* 08 */
  82                                      {"CPUBusConfig_1"},  /* 07 */
  83                                      {"CPUBusConfig_0"},  /* 06 */
  84                                      {"DefIntSpc     "},  /* 05 */
  85                                      {0               },  /* 04 */
  86                                      {"SROMAdd_1     "},  /* 03 */
  87                                      {"SROMAdd_0     "},  /* 02 */
  88                                      {"DRAMPadCal    "},  /* 01 */
  89                                      {"SInitEn       "},  /* 00 */
  90                                      {0               },  /* 31 */
  91                                      {0               },  /* 30 */
  92                                      {0               },  /* 29 */
  93                                      {0               },  /* 28 */
  94                                      {0               },  /* 27 */
  95                                      {0               },  /* 26 */
  96                                      {0               },  /* 25 */
  97                                      {0               },  /* 24 */
  98                                      {0               },  /* 23 */
  99                                      {0               },  /* 22 */
 100                                      {"JTAGCalBy     "},  /* 21 */
 101                                      {"GB2Sel        "},  /* 20 */
 102                                      {"GB1Sel        "},  /* 19 */
 103                                      {"DRAMPLL_MDiv_5"},  /* 18 */
 104                                      {"DRAMPLL_MDiv_4"},  /* 17 */
 105                                      {"DRAMPLL_MDiv_3"},  /* 16 */
 106                                      {"DRAMPLL_MDiv_2"},  /* 15 */
 107                                      {"DRAMPLL_MDiv_1"},  /* 14 */
 108                                      {"DRAMPLL_MDiv_0"},  /* 13 */
 109                                      {"GB0Sel        "},  /* 12 */
 110                                      {"DRAMPLLPU     "},  /* 11 */
 111                                      {"DRAMPLL_HIKVCO"},  /* 10 */
 112                                      {"DRAMPLLNP     "},  /* 09 */
 113                                      {"DRAMPLL_NDiv_7"},  /* 08 */
 114                                      {"DRAMPLL_NDiv_6"},  /* 07 */
 115                                      {"CPUPadCal     "},  /* 06 */
 116                                      {"DRAMPLL_NDiv_5"},  /* 05 */
 117                                      {"DRAMPLL_NDiv_4"},  /* 04 */
 118                                      {"DRAMPLL_NDiv_3"},  /* 03 */
 119                                      {"DRAMPLL_NDiv_2"},  /* 02 */
 120                                      {"DRAMPLL_NDiv_1"},  /* 01 */
 121                                      {"DRAMPLL_NDiv_0"}}; /* 00 */
 122
 123 extern flash_info_t flash_info[];
 124
 125 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
 126 extern int do_bootvx (cmd_tbl_t *, int, int, char *[]);
 127
 128 /* ------------------------------------------------------------------------- */
 129
 130 /* this is the current GT register space location */
 131 /* it starts at CONFIG_SYS_DFL_GT_REGS but moves later to CONFIG_SYS_GT_REGS */
 132
 133 /* Unfortunately, we cant change it while we are in flash, so we initialize it
 134  * to the "final" value. This means that any debug_led calls before
 135  * board_early_init_f wont work right (like in cpu_init_f).
 136  * See also my_remap_gt_regs below. (NTL)
 137  */
 138
 139 void board_prebootm_init (void);
 140 unsigned int INTERNAL_REG_BASE_ADDR = CONFIG_SYS_GT_REGS;
 141 int display_mem_map (void);
 142
 143 /*
 144  * Skip video initialization on slave variant.
 145  * This function will overwrite the weak default in cfb_console.c
 146  */
 147 int board_video_skip(void)
 148 {
 149         return CPCI750_SLAVE_TEST;
 150 }
 151
 152 /* ------------------------------------------------------------------------- */
 153
 154 /*
 155  * This is a version of the GT register space remapping function that
 156  * doesn't touch globals (meaning, it's ok to run from flash.)
 157  *
 158  * Unfortunately, this has the side effect that a writable
 159  * INTERNAL_REG_BASE_ADDR is impossible. Oh well.
 160  */
 161
 162 void my_remap_gt_regs (u32 cur_loc, u32 new_loc)
 163 {
 164         u32 temp;
 165
 166         /* check and see if it's already moved */
 167
 168 /* original ppcboot 1.1.6 source
 169
 170         temp = in_le32((u32 *)(new_loc + INTERNAL_SPACE_DECODE));
 171         if ((temp & 0xffff) == new_loc >> 20)
 172                 return;
 173
 174         temp = (in_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE)) &
 175                 0xffff0000) | (new_loc >> 20);
 176
 177         out_le32((u32 *)(cur_loc + INTERNAL_SPACE_DECODE), temp);
 178
 179         while (GTREGREAD(INTERNAL_SPACE_DECODE) != temp);
 180 original ppcboot 1.1.6 source end */
 181
 182         temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
 183         if ((temp & 0xffff) == new_loc >> 16)
 184                 return;
 185
 186         temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
 187                 0xffff0000) | (new_loc >> 16);
 188
 189         out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
 190
 191         while (GTREGREAD (INTERNAL_SPACE_DECODE) != temp);
 192 }
 193
 194 #ifdef CONFIG_PCI
 195
 196 static void gt_pci_config (void)
 197 {
 198         unsigned int stat;
 199         unsigned int data;
 200         unsigned int val = 0x00fff864;  /* DINK32: BusNum 23:16,  DevNum 15:11, FuncNum 10:8, RegNum 7:2 */
 201
 202         /* In PCIX mode devices provide their own bus and device numbers. We query the Discovery II's
 203          * config registers by writing ones to the bus and device.
 204          * We then update the Virtual register with the correct value for the bus and device.
 205          */
 206         if ((GTREGREAD (PCI_0_MODE) & (BIT4 | BIT5)) != 0) {    /*if  PCI-X */
 207                 GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
 208
 209                 GT_REG_READ (PCI_0_CONFIG_DATA_VIRTUAL_REG, &stat);
 210
 211                 GT_REG_WRITE (PCI_0_CONFIG_ADDR, BIT31 | val);
 212                 GT_REG_WRITE (PCI_0_CONFIG_DATA_VIRTUAL_REG,
 213                               (stat & 0xffff0000) | CONFIG_SYS_PCI_IDSEL);
 214
 215         }
 216         if ((GTREGREAD (PCI_1_MODE) & (BIT4 | BIT5)) != 0) {    /*if  PCI-X */
 217                 GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
 218                 GT_REG_READ (PCI_1_CONFIG_DATA_VIRTUAL_REG, &stat);
 219
 220                 GT_REG_WRITE (PCI_1_CONFIG_ADDR, BIT31 | val);
 221                 GT_REG_WRITE (PCI_1_CONFIG_DATA_VIRTUAL_REG,
 222                               (stat & 0xffff0000) | CONFIG_SYS_PCI_IDSEL);
 223         }
 224
 225         /* Enable master */
 226         PCI_MASTER_ENABLE (0, SELF);
 227         PCI_MASTER_ENABLE (1, SELF);
 228
 229         /* Enable PCI0/1 Mem0 and IO 0 disable all others */
 230         GT_REG_READ (BASE_ADDR_ENABLE, &stat);
 231         stat |= (1 << 11) | (1 << 12) | (1 << 13) | (1 << 16) | (1 << 17) | (1
 232                                                                              <<
 233                                                                              18);
 234         stat &= ~((1 << 9) | (1 << 10) | (1 << 14) | (1 << 15));
 235         GT_REG_WRITE (BASE_ADDR_ENABLE, stat);
 236
 237         /* ronen- add write to pci remap registers for 64460.
 238            in 64360 when writing to pci base go and overide remap automaticaly,
 239            in 64460 it doesn't */
 240         GT_REG_WRITE (PCI_0_IO_BASE_ADDR, CONFIG_SYS_PCI0_IO_SPACE >> 16);
 241         GT_REG_WRITE (PCI_0I_O_ADDRESS_REMAP, CONFIG_SYS_PCI0_IO_SPACE_PCI >> 16);
 242         GT_REG_WRITE (PCI_0_IO_SIZE, (CONFIG_SYS_PCI0_IO_SIZE - 1) >> 16);
 243
 244         GT_REG_WRITE (PCI_0_MEMORY0_BASE_ADDR, CONFIG_SYS_PCI0_MEM_BASE >> 16);
 245         GT_REG_WRITE (PCI_0MEMORY0_ADDRESS_REMAP, CONFIG_SYS_PCI0_MEM_BASE >> 16);
 246         GT_REG_WRITE (PCI_0_MEMORY0_SIZE, (CONFIG_SYS_PCI0_MEM_SIZE - 1) >> 16);
 247
 248         GT_REG_WRITE (PCI_1_IO_BASE_ADDR, CONFIG_SYS_PCI1_IO_SPACE >> 16);
 249         GT_REG_WRITE (PCI_1I_O_ADDRESS_REMAP, CONFIG_SYS_PCI1_IO_SPACE_PCI >> 16);
 250         GT_REG_WRITE (PCI_1_IO_SIZE, (CONFIG_SYS_PCI1_IO_SIZE - 1) >> 16);
 251
 252         GT_REG_WRITE (PCI_1_MEMORY0_BASE_ADDR, CONFIG_SYS_PCI1_MEM_BASE >> 16);
 253         GT_REG_WRITE (PCI_1MEMORY0_ADDRESS_REMAP, CONFIG_SYS_PCI1_MEM_BASE >> 16);
 254         GT_REG_WRITE (PCI_1_MEMORY0_SIZE, (CONFIG_SYS_PCI1_MEM_SIZE - 1) >> 16);
 255
 256         /* PCI interface settings */
 257         /* Timeout set to retry forever */
 258         GT_REG_WRITE (PCI_0TIMEOUT_RETRY, 0x0);
 259         GT_REG_WRITE (PCI_1TIMEOUT_RETRY, 0x0);
 260
 261         /* ronen - enable only CS0 and Internal reg!! */
 262         GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
 263         GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
 264
 265 /*ronen update the pci internal registers base address.*/
 266 #ifdef MAP_PCI
 267         for (stat = 0; stat <= PCI_HOST1; stat++) {
 268                 data = pciReadConfigReg(stat,
 269                                         PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
 270                                         SELF);
 271                 data = (data & 0x0f) | CONFIG_SYS_GT_REGS;
 272                 pciWriteConfigReg (stat,
 273                                    PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
 274                                    SELF, data);
 275         }
 276 #endif
 277
 278 }
 279 #endif
 280
 281 /* Setup CPU interface paramaters */
 282 static void gt_cpu_config (void)
 283 {
 284         cpu_t cpu = get_cpu_type ();
 285         ulong tmp;
 286
 287         /* cpu configuration register */
 288         tmp = GTREGREAD (CPU_CONFIGURATION);
 289
 290         /* set the SINGLE_CPU bit  see MV64360 P.399 */
 291 #ifndef CONFIG_SYS_GT_DUAL_CPU          /* SINGLE_CPU seems to cause JTAG problems */
 292         tmp |= CPU_CONF_SINGLE_CPU;
 293 #endif
 294
 295         tmp &= ~CPU_CONF_AACK_DELAY_2;
 296
 297         tmp |= CPU_CONF_DP_VALID;
 298         tmp |= CPU_CONF_AP_VALID;
 299
 300         tmp |= CPU_CONF_PIPELINE;
 301
 302         GT_REG_WRITE (CPU_CONFIGURATION, tmp);  /* Marvell (VXWorks) writes 0x20220FF */
 303
 304         /* CPU master control register */
 305         tmp = GTREGREAD (CPU_MASTER_CONTROL);
 306
 307         tmp |= CPU_MAST_CTL_ARB_EN;
 308
 309         if ((cpu == CPU_7400) ||
 310             (cpu == CPU_7410) || (cpu == CPU_7455) || (cpu == CPU_7450)) {
 311
 312                 tmp |= CPU_MAST_CTL_CLEAN_BLK;
 313                 tmp |= CPU_MAST_CTL_FLUSH_BLK;
 314
 315         } else {
 316                 /* cleanblock must be cleared for CPUs
 317                  * that do not support this command (603e, 750)
 318                  * see Res#1 */
 319                 tmp &= ~CPU_MAST_CTL_CLEAN_BLK;
 320                 tmp &= ~CPU_MAST_CTL_FLUSH_BLK;
 321         }
 322         GT_REG_WRITE (CPU_MASTER_CONTROL, tmp);
 323 }
 324
 325 /*
 326  * board_early_init_f.
 327  *
 328  * set up gal. device mappings, etc.
 329  */
 330 int board_early_init_f (void)
 331 {
 332
 333         /*
 334          * set up the GT the way the kernel wants it
 335          * the call to move the GT register space will obviously
 336          * fail if it has already been done, but we're going to assume
 337          * that if it's not at the power-on location, it's where we put
 338          * it last time. (huber)
 339          */
 340
 341         my_remap_gt_regs (CONFIG_SYS_DFL_GT_REGS, CONFIG_SYS_GT_REGS);
 342
 343         /* No PCI in first release of Port To_do: enable it. */
 344 #ifdef CONFIG_PCI
 345         gt_pci_config ();
 346 #endif
 347         /* mask all external interrupt sources */
 348         GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_LOW, 0);
 349         GT_REG_WRITE (CPU_INTERRUPT_MASK_REGISTER_HIGH, 0);
 350         /* new in MV6436x */
 351         GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_LOW, 0);
 352         GT_REG_WRITE (CPU_INTERRUPT_1_MASK_REGISTER_HIGH, 0);
 353         /* --------------------- */
 354         GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
 355         GT_REG_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
 356         GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0);
 357         GT_REG_WRITE (PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH, 0);
 358         /* does not exist in MV6436x
 359            GT_REG_WRITE(CPU_INT_0_MASK, 0);
 360            GT_REG_WRITE(CPU_INT_1_MASK, 0);
 361            GT_REG_WRITE(CPU_INT_2_MASK, 0);
 362            GT_REG_WRITE(CPU_INT_3_MASK, 0);
 363            --------------------- */
 364
 365
 366         /* ----- DEVICE BUS SETTINGS ------ */
 367
 368         /*
 369          * EVB
 370          * 0 - SRAM   ????
 371          * 1 - RTC      ????
 372          * 2 - UART     ????
 373          * 3 - Flash    checked 32Bit Intel Strata
 374          * boot - BootCS checked 8Bit 29LV040B
 375          *
 376          */
 377
 378         /*
 379          * the dual 7450 module requires burst access to the boot
 380          * device, so the serial rom copies the boot device to the
 381          * on-board sram on the eval board, and updates the correct
 382          * registers to boot from the sram. (device0)
 383          */
 384
 385         memoryMapDeviceSpace (DEVICE0, CONFIG_SYS_DEV0_SPACE, CONFIG_SYS_DEV0_SIZE);
 386         memoryMapDeviceSpace (DEVICE1, CONFIG_SYS_DEV1_SPACE, CONFIG_SYS_DEV1_SIZE);
 387         memoryMapDeviceSpace (DEVICE2, CONFIG_SYS_DEV2_SPACE, CONFIG_SYS_DEV2_SIZE);
 388         memoryMapDeviceSpace (DEVICE3, CONFIG_SYS_DEV3_SPACE, CONFIG_SYS_DEV3_SIZE);
 389
 390
 391         /* configure device timing */
 392         GT_REG_WRITE (DEVICE_BANK0PARAMETERS, CONFIG_SYS_DEV0_PAR);
 393         GT_REG_WRITE (DEVICE_BANK1PARAMETERS, CONFIG_SYS_DEV1_PAR);
 394         GT_REG_WRITE (DEVICE_BANK2PARAMETERS, CONFIG_SYS_DEV2_PAR);
 395         GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CONFIG_SYS_DEV3_PAR);
 396
 397 #ifdef CONFIG_SYS_32BIT_BOOT_PAR        /* set port parameters for Flash device module access */
 398         /* detect if we are booting from the 32 bit flash */
 399         if (GTREGREAD (DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
 400                 /* 32 bit boot flash */
 401                 GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR);
 402                 GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS,
 403                               CONFIG_SYS_32BIT_BOOT_PAR);
 404         } else {
 405                 /* 8 bit boot flash */
 406                 GT_REG_WRITE (DEVICE_BANK3PARAMETERS, CONFIG_SYS_32BIT_BOOT_PAR);
 407                 GT_REG_WRITE (DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR);
 408         }
 409 #else
 410         /* 8 bit boot flash only */
 411 /*      GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR);*/
 412 #endif
 413
 414
 415         gt_cpu_config ();
 416
 417         /* MPP setup */
 418         GT_REG_WRITE (MPP_CONTROL0, CONFIG_SYS_MPP_CONTROL_0);
 419         GT_REG_WRITE (MPP_CONTROL1, CONFIG_SYS_MPP_CONTROL_1);
 420         GT_REG_WRITE (MPP_CONTROL2, CONFIG_SYS_MPP_CONTROL_2);
 421         GT_REG_WRITE (MPP_CONTROL3, CONFIG_SYS_MPP_CONTROL_3);
 422
 423         GT_REG_WRITE (GPP_LEVEL_CONTROL, CONFIG_SYS_GPP_LEVEL_CONTROL);
 424         DEBUG_LED0_ON ();
 425         DEBUG_LED1_ON ();
 426         DEBUG_LED2_ON ();
 427
 428         return 0;
 429 }
 430
 431 /* various things to do after relocation */
 432
 433 int misc_init_r ()
 434 {
 435         icache_enable ();
 436 #ifdef CONFIG_SYS_L2
 437         l2cache_enable ();
 438 #endif
 439 #ifdef CONFIG_MPSC
 440
 441         mpsc_sdma_init ();
 442         mpsc_init2 ();
 443 #endif
 444
 445 #if 0
 446         /* disable the dcache and MMU */
 447         dcache_lock ();
 448 #endif
 449         if (flash_info[3].size < CONFIG_SYS_FLASH_INCREMENT) {
 450                 unsigned int flash_offset;
 451                 unsigned int l;
 452
 453                 flash_offset =  CONFIG_SYS_FLASH_INCREMENT - flash_info[3].size;
 454                 for (l = 0; l < CONFIG_SYS_MAX_FLASH_SECT; l++) {
 455                         if (flash_info[3].start[l] != 0) {
 456                               flash_info[3].start[l] += flash_offset;
 457                         }
 458                 }
 459                 flash_protect (FLAG_PROTECT_SET,
 460                                CONFIG_SYS_MONITOR_BASE,
 461                                CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
 462                                &flash_info[3]);
 463         }
 464         return 0;
 465 }
 466
 467 void after_reloc (ulong dest_addr, gd_t * gd)
 468 {
 469         memoryMapDeviceSpace (BOOT_DEVICE, CONFIG_SYS_BOOT_SPACE,
 470                               CONFIG_SYS_BOOT_SIZE);
 471
 472         display_mem_map ();
 473         GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
 474         GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
 475
 476         /* now, jump to the main ppcboot board init code */
 477         board_init_r (gd, dest_addr);
 478         /* NOTREACHED */
 479 }
 480
 481 /* ------------------------------------------------------------------------- */
 482
 483 /*
 484  * Check Board Identity:
 485  *
 486  * right now, assume borad type. (there is just one...after all)
 487  */
 488
 489 int checkboard (void)
 490 {
 491         int l_type = 0;
 492
 493         printf ("BOARD: %s\n", CONFIG_SYS_BOARD_NAME);
 494         return (l_type);
 495 }
 496
 497 /* utility functions */
 498 void debug_led (int led, int mode)
 499 {
 500 }
 501
 502 int display_mem_map (void)
 503 {
 504         int i, j;
 505         unsigned int base, size, width;
 506
 507         /* SDRAM */
 508         printf ("SD (DDR) RAM\n");
 509         for (i = 0; i <= BANK3; i++) {
 510                 base = memoryGetBankBaseAddress (i);
 511                 size = memoryGetBankSize (i);
 512                 if (size != 0) {
 513                         printf ("BANK%d: base - 0x%08x\tsize - %dM bytes\n",
 514                                 i, base, size >> 20);
 515                 }
 516         }
 517 #ifdef CONFIG_PCI
 518         /* CPU's PCI windows */
 519         for (i = 0; i <= PCI_HOST1; i++) {
 520                 printf ("\nCPU's PCI %d windows\n", i);
 521                 base = pciGetSpaceBase (i, PCI_IO);
 522                 size = pciGetSpaceSize (i, PCI_IO);
 523                 printf ("      IO: base - 0x%08x\tsize - %dM bytes\n", base,
 524                         size >> 20);
 525                 for (j = 0;
 526                      j <=
 527                      PCI_REGION0
 528                      /*ronen currently only first PCI MEM is used 3 */ ;
 529                      j++) {
 530                         base = pciGetSpaceBase (i, j);
 531                         size = pciGetSpaceSize (i, j);
 532                         printf ("MEMORY %d: base - 0x%08x\tsize - %dM bytes\n", j, base, size >> 20);
 533                 }
 534         }
 535 #endif /* of CONFIG_PCI */
 536         /* Devices */
 537         printf ("\nDEVICES\n");
 538         for (i = 0; i <= DEVICE3; i++) {
 539                 base = memoryGetDeviceBaseAddress (i);
 540                 size = memoryGetDeviceSize (i);
 541                 width = memoryGetDeviceWidth (i) * 8;
 542                 printf ("DEV %d:  base - 0x%08x  size - %dM bytes\twidth - %d bits", i, base, size >> 20, width);
 543                 if (i == 0)
 544                         printf ("\t- FLASH\n");
 545                 else if (i == 1)
 546                         printf ("\t- FLASH\n");
 547                 else if (i == 2)
 548                         printf ("\t- FLASH\n");
 549                 else
 550                         printf ("\t- RTC/REGS/CAN\n");
 551         }
 552
 553         /* Bootrom */
 554         base = memoryGetDeviceBaseAddress (BOOT_DEVICE);        /* Boot */
 555         size = memoryGetDeviceSize (BOOT_DEVICE);
 556         width = memoryGetDeviceWidth (BOOT_DEVICE) * 8;
 557         printf (" BOOT:  base - 0x%08x  size - %dM bytes\twidth - %d bits\t- FLASH\n",
 558                 base, size >> 20, width);
 559         return (0);
 560 }
 561
 562 /*
 563  * Command loadpci: wait for signal from host and boot image.
 564  */
 565 int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 566 {
 567         volatile unsigned int *ptr;
 568         int count = 0;
 569         int count2 = 0;
 570         int status;
 571         char addr[16];
 572         char str[] = "\\|/-";
 573         char *local_args[2];
 574
 575         /*
 576          * Mark sync address
 577          */
 578         ptr = 0;
 579         ptr[0] = 0xffffffff;
 580         ptr[1] = 0xffffffff;
 581         puts("\nWaiting for image from pci host -");
 582
 583         /*
 584          * Wait for host to write the start address
 585          */
 586         while (*ptr == 0xffffffff) {
 587                 count++;
 588                 if (!(count % 100)) {
 589                         count2++;
 590                         putc(0x08); /* backspace */
 591                         putc(str[count2 % 4]);
 592                 }
 593
 594                 /* Abort if ctrl-c was pressed */
 595                 if (ctrlc()) {
 596                         puts("\nAbort\n");
 597                         return 0;
 598                 }
 599
 600                 udelay(1000);
 601         }
 602
 603         sprintf(addr, "%08x", *ptr);
 604         printf("\nBooting Image at addr 0x%s ...\n", addr);
 605         setenv("loadaddr", addr);
 606
 607         switch (ptr[1] == 0) {
 608         case 0:
 609                 /*
 610                  * Boot image via bootm
 611                  */
 612                 local_args[0] = argv[0];
 613                 local_args[1] = NULL;
 614                 status = do_bootm (cmdtp, 0, 1, local_args);
 615                 break;
 616         case 1:
 617                 /*
 618                  * Boot image via bootvx
 619                  */
 620                 local_args[0] = argv[0];
 621                 local_args[1] = NULL;
 622                 status = do_bootvx (cmdtp, 0, 1, local_args);
 623                 break;
 624         }
 625
 626         return 0;
 627 }
 628
 629 U_BOOT_CMD(
 630         loadpci,        1,      1,      do_loadpci,
 631         "loadpci - Wait for pci-image and boot it\n",
 632         NULL
 633         );
 634
 635 /* DRAM check routines copied from gw8260 */
 636
 637 #if defined (CONFIG_SYS_DRAM_TEST)
 638
 639 /*********************************************************************/
 640 /* NAME:  move64() -  moves a double word (64-bit)                   */
 641 /*                                                                   */
 642 /* DESCRIPTION:                                                      */
 643 /*   this function performs a double word move from the data at      */
 644 /*   the source pointer to the location at the destination pointer.  */
 645 /*                                                                   */
 646 /* INPUTS:                                                           */
 647 /*   unsigned long long *src  - pointer to data to move              */
 648 /*                                                                   */
 649 /* OUTPUTS:                                                          */
 650 /*   unsigned long long *dest - pointer to locate to move data       */
 651 /*                                                                   */
 652 /* RETURNS:                                                          */
 653 /*   None                                                            */
 654 /*                                                                   */
 655 /* RESTRICTIONS/LIMITATIONS:                                         */
 656 /*   May cloober fr0.                                                */
 657 /*                                                                   */
 658 /*********************************************************************/
 659 static void move64 (unsigned long long *src, unsigned long long *dest)
 660 {
 661         asm ("lfd  0, 0(3)\n\t" /* fpr0   =  *scr       */
 662              "stfd 0, 0(4)"     /* *dest  =  fpr0       */
 663       : : : "fr0");             /* Clobbers fr0         */
 664         return;
 665 }
 666
 667
 668 #if defined (CONFIG_SYS_DRAM_TEST_DATA)
 669
 670 unsigned long long pattern[] = {
 671         0xaaaaaaaaaaaaaaaaLL,
 672         0xccccccccccccccccLL,
 673         0xf0f0f0f0f0f0f0f0LL,
 674         0xff00ff00ff00ff00LL,
 675         0xffff0000ffff0000LL,
 676         0xffffffff00000000LL,
 677         0x00000000ffffffffLL,
 678         0x0000ffff0000ffffLL,
 679         0x00ff00ff00ff00ffLL,
 680         0x0f0f0f0f0f0f0f0fLL,
 681         0x3333333333333333LL,
 682         0x5555555555555555LL,
 683 };
 684
 685 /*********************************************************************/
 686 /* NAME:  mem_test_data() -  test data lines for shorts and opens    */
 687 /*                                                                   */
 688 /* DESCRIPTION:                                                      */
 689 /*   Tests data lines for shorts and opens by forcing adjacent data  */
 690 /*   to opposite states. Because the data lines could be routed in   */
 691 /*   an arbitrary manner the must ensure test patterns ensure that   */
 692 /*   every case is tested. By using the following series of binary   */
 693 /*   patterns every combination of adjacent bits is test regardless  */
 694 /*   of routing.                                                     */
 695 /*                                                                   */
 696 /*     ...101010101010101010101010                                   */
 697 /*     ...110011001100110011001100                                   */
 698 /*     ...111100001111000011110000                                   */
 699 /*     ...111111110000000011111111                                   */
 700 /*                                                                   */
 701 /*   Carrying this out, gives us six hex patterns as follows:        */
 702 /*                                                                   */
 703 /*     0xaaaaaaaaaaaaaaaa                                            */
 704 /*     0xcccccccccccccccc                                            */
 705 /*     0xf0f0f0f0f0f0f0f0                                            */
 706 /*     0xff00ff00ff00ff00                                            */
 707 /*     0xffff0000ffff0000                                            */
 708 /*     0xffffffff00000000                                            */
 709 /*                                                                   */
 710 /*   The number test patterns will always be given by:               */
 711 /*                                                                   */
 712 /*   log(base 2)(number data bits) = log2 (64) = 6                   */
 713 /*                                                                   */
 714 /*   To test for short and opens to other signals on our boards. we  */
 715 /*   simply                                                          */
 716 /*   test with the 1's complemnt of the paterns as well.             */
 717 /*                                                                   */
 718 /* OUTPUTS:                                                          */
 719 /*   Displays failing test pattern                                   */
 720 /*                                                                   */
 721 /* RETURNS:                                                          */
 722 /*   0 -  Passed test                                                */
 723 /*   1 -  Failed test                                                */
 724 /*                                                                   */
 725 /* RESTRICTIONS/LIMITATIONS:                                         */
 726 /*  Assumes only one one SDRAM bank                                  */
 727 /*                                                                   */
 728 /*********************************************************************/
 729 int mem_test_data (void)
 730 {
 731         unsigned long long *pmem = (unsigned long long *) CONFIG_SYS_MEMTEST_START;
 732         unsigned long long temp64 = 0;
 733         int num_patterns = sizeof (pattern) / sizeof (pattern[0]);
 734         int i;
 735         unsigned int hi, lo;
 736
 737         for (i = 0; i < num_patterns; i++) {
 738                 move64 (&(pattern[i]), pmem);
 739                 move64 (pmem, &temp64);
 740
 741                 /* hi = (temp64>>32) & 0xffffffff;              */
 742                 /* lo = temp64 & 0xffffffff;                    */
 743                 /* printf("\ntemp64 = 0x%08x%08x", hi, lo);     */
 744
 745                 hi = (pattern[i] >> 32) & 0xffffffff;
 746                 lo = pattern[i] & 0xffffffff;
 747                 /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo);  */
 748
 749                 if (temp64 != pattern[i]) {
 750                         printf ("\n   Data Test Failed, pattern 0x%08x%08x",
 751                                 hi, lo);
 752                         return 1;
 753                 }
 754         }
 755
 756         return 0;
 757 }
 758 #endif /* CONFIG_SYS_DRAM_TEST_DATA */
 759
 760 #if defined (CONFIG_SYS_DRAM_TEST_ADDRESS)
 761 /*********************************************************************/
 762 /* NAME:  mem_test_address() -  test address lines                   */
 763 /*                                                                   */
 764 /* DESCRIPTION:                                                      */
 765 /*   This function performs a test to verify that each word im       */
 766 /*   memory is uniquly addressable. The test sequence is as follows: */
 767 /*                                                                   */
 768 /*   1) write the address of each word to each word.                 */
 769 /*   2) verify that each location equals its address                 */
 770 /*                                                                   */
 771 /* OUTPUTS:                                                          */
 772 /*   Displays failing test pattern and address                       */
 773 /*                                                                   */
 774 /* RETURNS:                                                          */
 775 /*   0 -  Passed test                                                */
 776 /*   1 -  Failed test                                                */
 777 /*                                                                   */
 778 /* RESTRICTIONS/LIMITATIONS:                                         */
 779 /*                                                                   */
 780 /*                                                                   */
 781 /*********************************************************************/
 782 int mem_test_address (void)
 783 {
 784         volatile unsigned int *pmem =
 785                 (volatile unsigned int *) CONFIG_SYS_MEMTEST_START;
 786         const unsigned int size = (CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START) / 4;
 787         unsigned int i;
 788
 789         /* write address to each location */
 790         for (i = 0; i < size; i++) {
 791                 pmem[i] = i;
 792         }
 793
 794         /* verify each loaction */
 795         for (i = 0; i < size; i++) {
 796                 if (pmem[i] != i) {
 797                         printf ("\n   Address Test Failed at 0x%x", i);
 798                         return 1;
 799                 }
 800         }
 801         return 0;
 802 }
 803 #endif /* CONFIG_SYS_DRAM_TEST_ADDRESS */
 804
 805 #if defined (CONFIG_SYS_DRAM_TEST_WALK)
 806 /*********************************************************************/
 807 /* NAME:   mem_march() -  memory march                               */
 808 /*                                                                   */
 809 /* DESCRIPTION:                                                      */
 810 /*   Marches up through memory. At each location verifies rmask if   */
 811 /*   read = 1. At each location write wmask if  write = 1. Displays  */
 812 /*   failing address and pattern.                                    */
 813 /*                                                                   */
 814 /* INPUTS:                                                           */
 815 /*   volatile unsigned long long * base - start address of test      */
 816 /*   unsigned int size - number of dwords(64-bit) to test            */
 817 /*   unsigned long long rmask - read verify mask                     */
 818 /*   unsigned long long wmask - wrtie verify mask                    */
 819 /*   short read - verifies rmask if read = 1                         */
 820 /*   short write  - writes wmask if write = 1                        */
 821 /*                                                                   */
 822 /* OUTPUTS:                                                          */
 823 /*   Displays failing test pattern and address                       */
 824 /*                                                                   */
 825 /* RETURNS:                                                          */
 826 /*   0 -  Passed test                                                */
 827 /*   1 -  Failed test                                                */
 828 /*                                                                   */
 829 /* RESTRICTIONS/LIMITATIONS:                                         */
 830 /*                                                                   */
 831 /*                                                                   */
 832 /*********************************************************************/
 833 int mem_march (volatile unsigned long long *base,
 834                unsigned int size,
 835                unsigned long long rmask,
 836                unsigned long long wmask, short read, short write)
 837 {
 838         unsigned int i;
 839         unsigned long long temp = 0;
 840         unsigned int hitemp, lotemp, himask, lomask;
 841
 842         for (i = 0; i < size; i++) {
 843                 if (read != 0) {
 844                         /* temp = base[i]; */
 845                         move64 ((unsigned long long *) &(base[i]), &temp);
 846                         if (rmask != temp) {
 847                                 hitemp = (temp >> 32) & 0xffffffff;
 848                                 lotemp = temp & 0xffffffff;
 849                                 himask = (rmask >> 32) & 0xffffffff;
 850                                 lomask = rmask & 0xffffffff;
 851
 852                                 printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp);
 853                                 return 1;
 854                         }
 855                 }
 856                 if (write != 0) {
 857                         /*  base[i] = wmask; */
 858                         move64 (&wmask, (unsigned long long *) &(base[i]));
 859                 }
 860         }
 861         return 0;
 862 }
 863 #endif /* CONFIG_SYS_DRAM_TEST_WALK */
 864
 865 /*********************************************************************/
 866 /* NAME:   mem_test_walk() -  a simple walking ones test             */
 867 /*                                                                   */
 868 /* DESCRIPTION:                                                      */
 869 /*   Performs a walking ones through entire physical memory. The     */
 870 /*   test uses as series of memory marches, mem_march(), to verify   */
 871 /*   and write the test patterns to memory. The test sequence is as  */
 872 /*   follows:                                                        */
 873 /*     1) march writing 0000...0001                                  */
 874 /*     2) march verifying 0000...0001  , writing  0000...0010        */
 875 /*     3) repeat step 2 shifting masks left 1 bit each time unitl    */
 876 /*         the write mask equals 1000...0000                         */
 877 /*     4) march verifying 1000...0000                                */
 878 /*   The test fails if any of the memory marches return a failure.   */
 879 /*                                                                   */
 880 /* OUTPUTS:                                                          */
 881 /*   Displays which pass on the memory test is executing             */
 882 /*                                                                   */
 883 /* RETURNS:                                                          */
 884 /*   0 -  Passed test                                                */
 885 /*   1 -  Failed test                                                */
 886 /*                                                                   */
 887 /* RESTRICTIONS/LIMITATIONS:                                         */
 888 /*                                                                   */
 889 /*                                                                   */
 890 /*********************************************************************/
 891 int mem_test_walk (void)
 892 {
 893         unsigned long long mask;
 894         volatile unsigned long long *pmem =
 895                 (volatile unsigned long long *) CONFIG_SYS_MEMTEST_START;
 896         const unsigned long size = (CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START) / 8;
 897
 898         unsigned int i;
 899
 900         mask = 0x01;
 901
 902         printf ("Initial Pass");
 903         mem_march (pmem, size, 0x0, 0x1, 0, 1);
 904
 905         printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
 906         printf ("               ");
 907         printf ("         ");
 908         printf ("\b\b\b\b\b\b\b\b\b\b\b\b");
 909
 910         for (i = 0; i < 63; i++) {
 911                 printf ("Pass %2d", i + 2);
 912                 if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) {
 913                         /*printf("mask: 0x%x, pass: %d, ", mask, i); */
 914                         return 1;
 915                 }
 916                 mask = mask << 1;
 917                 printf ("\b\b\b\b\b\b\b");
 918         }
 919
 920         printf ("Last Pass");
 921         if (mem_march (pmem, size, 0, mask, 0, 1) != 0) {
 922                 /* printf("mask: 0x%x", mask); */
 923                 return 1;
 924         }
 925         printf ("\b\b\b\b\b\b\b\b\b");
 926         printf ("            ");
 927         printf ("\b\b\b\b\b\b\b\b\b");
 928
 929         return 0;
 930 }
 931
 932 /*********************************************************************/
 933 /* NAME:    testdram() -  calls any enabled memory tests             */
 934 /*                                                                   */
 935 /* DESCRIPTION:                                                      */
 936 /*   Runs memory tests if the environment test variables are set to  */
 937 /*   'y'.                                                            */
 938 /*                                                                   */
 939 /* INPUTS:                                                           */
 940 /*   testdramdata    - If set to 'y', data test is run.              */
 941 /*   testdramaddress - If set to 'y', address test is run.           */
 942 /*   testdramwalk    - If set to 'y', walking ones test is run       */
 943 /*                                                                   */
 944 /* OUTPUTS:                                                          */
 945 /*   None                                                            */
 946 /*                                                                   */
 947 /* RETURNS:                                                          */
 948 /*   0 -  Passed test                                                */
 949 /*   1 -  Failed test                                                */
 950 /*                                                                   */
 951 /* RESTRICTIONS/LIMITATIONS:                                         */
 952 /*                                                                   */
 953 /*                                                                   */
 954 /*********************************************************************/
 955 int testdram (void)
 956 {
 957         char *s;
 958         int rundata    = 0;
 959         int runaddress = 0;
 960         int runwalk    = 0;
 961
 962 #ifdef CONFIG_SYS_DRAM_TEST_DATA
 963         s = getenv ("testdramdata");
 964         rundata = (s && (*s == 'y')) ? 1 : 0;
 965 #endif
 966 #ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
 967         s = getenv ("testdramaddress");
 968         runaddress = (s && (*s == 'y')) ? 1 : 0;
 969 #endif
 970 #ifdef CONFIG_SYS_DRAM_TEST_WALK
 971         s = getenv ("testdramwalk");
 972         runwalk = (s && (*s == 'y')) ? 1 : 0;
 973 #endif
 974
 975         if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
 976                 printf ("Testing RAM from 0x%08x to 0x%08x ...  (don't panic... that will take a moment !!!!)\n", CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END);
 977         }
 978 #ifdef CONFIG_SYS_DRAM_TEST_DATA
 979         if (rundata == 1) {
 980                 printf ("Test DATA ...  ");
 981                 if (mem_test_data () == 1) {
 982                         printf ("failed \n");
 983                         return 1;
 984                 } else
 985                         printf ("ok \n");
 986         }
 987 #endif
 988 #ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
 989         if (runaddress == 1) {
 990                 printf ("Test ADDRESS ...  ");
 991                 if (mem_test_address () == 1) {
 992                         printf ("failed \n");
 993                         return 1;
 994                 } else
 995                         printf ("ok \n");
 996         }
 997 #endif
 998 #ifdef CONFIG_SYS_DRAM_TEST_WALK
 999         if (runwalk == 1) {
1000                 printf ("Test WALKING ONEs ...  ");
1001                 if (mem_test_walk () == 1) {
1002                         printf ("failed \n");
1003                         return 1;
1004                 } else
1005                         printf ("ok \n");
1006         }
1007 #endif
1008         if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
1009                 printf ("passed\n");
1010         }
1011         return 0;
1012
1013 }
1014 #endif /* CONFIG_SYS_DRAM_TEST */
1015
1016 /* ronen - the below functions are used by the bootm function           */
1017 /*  - we map the base register to fbe00000 (same mapping as in the LSP) */
1018 /*  - we turn off the RX gig dmas - to prevent the dma from overunning  */
1019 /*    the kernel data areas.                                            */
1020 /*  - we diable and invalidate the icache and dcache.                   */
1021 void my_remap_gt_regs_bootm (u32 cur_loc, u32 new_loc)
1022 {
1023         u32 temp;
1024
1025         temp = in_le32 ((u32 *) (new_loc + INTERNAL_SPACE_DECODE));
1026         if ((temp & 0xffff) == new_loc >> 16)
1027                 return;
1028
1029         temp = (in_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE)) &
1030                 0xffff0000) | (new_loc >> 16);
1031
1032         out_le32 ((u32 *) (cur_loc + INTERNAL_SPACE_DECODE), temp);
1033
1034         while ((WORD_SWAP (*((volatile unsigned int *) (NONE_CACHEABLE |
1035                                                         new_loc |
1036                                                         (INTERNAL_SPACE_DECODE)))))
1037                != temp);
1038
1039 }
1040
1041 void board_prebootm_init ()
1042 {
1043
1044 /* change window size of PCI1 IO in order tp prevent overlaping with REG BASE. */
1045                 GT_REG_WRITE (PCI_1_IO_SIZE, (_64K - 1) >> 16);
1046
1047 /* Stop GigE Rx DMA engines */
1048         GT_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (0), 0x0000ff00);
1049 /*      GT_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (1), 0x0000ff00); */
1050 /*      GV_REG_WRITE (MV64360_ETH_RECEIVE_QUEUE_COMMAND_REG (2), 0x0000ff00); */
1051
1052 /* Relocate MV64360 internal regs */
1053         my_remap_gt_regs_bootm (CONFIG_SYS_GT_REGS, CONFIG_SYS_DFL_GT_REGS);
1054
1055         icache_disable ();
1056         dcache_disable ();
1057 }
1058
1059 int do_show_config(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1060 {
1061         unsigned int reset_sample_low;
1062         unsigned int reset_sample_high;
1063         unsigned int l, l1, l2;
1064
1065         GT_REG_READ(0x3c4, &reset_sample_low);
1066         GT_REG_READ(0x3d4, &reset_sample_high);
1067         printf("Reset configuration 0x%08x 0x%08x\n", reset_sample_low, reset_sample_high);
1068
1069         l2 = 0;
1070         for (l=0; l<63; l++) {
1071                 if (show_config_tab[l][0] != 0) {
1072                         printf("%14s:%1x ", show_config_tab[l],
1073                                ((reset_sample_low >> (31 - (l & 0x1f)))) & 0x01);
1074                         l2++;
1075                         if ((l2 % 4) == 0)
1076                                 printf("\n");
1077                 } else {
1078                         l1++;
1079                 }
1080                 if (l == 32)
1081                         reset_sample_low = reset_sample_high;
1082         }
1083         printf("\n");
1084
1085         return(0);
1086 }
1087
1088 U_BOOT_CMD(
1089         show_config,    1,      1,      do_show_config,
1090         "Show Marvell strapping register",
1091         "Show Marvell strapping register (ResetSampleLow ResetSampleHigh)"
1092 );
1093
1094 int do_pldver(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
1095 {
1096         printf("PLD version:0x%02x\n", in_8((void *)CONFIG_SYS_PLD_VER));
1097
1098         return 0;
1099 }
1100
1101 U_BOOT_CMD(
1102         pldver, 1, 1, do_pldver,
1103         "Show PLD version",
1104         "Show PLD version)");