board/karo/tx28/tx28.c

   1 /*
   2  * Copyright (C) 2011 Lothar Waßmann <LW@KARO-electronics.de>
   3  * based on: board/freesclae/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <errno.h>
  26 #include <libfdt.h>
  27 #include <fdt_support.h>
  28 #include <lcd.h>
  29 #include <netdev.h>
  30 #include <mmc.h>
  31 #include <imx_ssp_mmc.h>
  32 #include <linux/list.h>
  33 #include <linux/fb.h>
  34 #include <asm/io.h>
  35 #include <asm/gpio.h>
  36 #include <asm/arch/iomux-mx28.h>
  37 #include <asm/arch/clock.h>
  38 #include <asm/arch/mxsfb.h>
  39 #include <asm/arch/imx-regs.h>
  40 #include <asm/arch/sys_proto.h>
  41
  42 #include "../common/karo.h"
  43
  44 DECLARE_GLOBAL_DATA_PTR;
  45
  46 #define MXS_GPIO_NR(p, o)      (((p) << 5) | (o))
  47
  48 #define TX28_LCD_PWR_GPIO       MX28_PAD_LCD_ENABLE__GPIO_1_31
  49 #define TX28_LCD_RST_GPIO       MX28_PAD_LCD_RESET__GPIO_3_30
  50 #define TX28_LCD_BACKLIGHT_GPIO MX28_PAD_PWM0__GPIO_3_16
  51
  52 #define TX28_USBH_VBUSEN_GPIO   MX28_PAD_SPDIF__GPIO_3_27
  53 #define TX28_USBH_OC_GPIO       MX28_PAD_JTAG_RTCK__GPIO_4_20
  54 #define TX28_USBOTG_VBUSEN_GPIO MX28_PAD_GPMI_CE2N__GPIO_0_18
  55 #define TX28_USBOTG_OC_GPIO     MX28_PAD_GPMI_CE3N__GPIO_0_19
  56 #define TX28_USBOTG_ID_GPIO     MX28_PAD_PWM2__GPIO_3_18
  57
  58 #define TX28_LED_GPIO           MX28_PAD_ENET0_RXD3__GPIO_4_10
  59
  60 static const struct gpio tx28_gpios[] = {
  61         { TX28_USBH_VBUSEN_GPIO, GPIOF_OUTPUT_INIT_LOW, "USBH VBUSEN", },
  62         { TX28_USBH_OC_GPIO, GPIOF_INPUT, "USBH OC", },
  63         { TX28_USBOTG_VBUSEN_GPIO, GPIOF_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
  64         { TX28_USBOTG_OC_GPIO, GPIOF_INPUT, "USBOTG OC", },
  65         { TX28_USBOTG_ID_GPIO, GPIOF_INPUT, "USBOTG ID", },
  66 };
  67
  68 static const iomux_cfg_t tx28_pads[] = {
  69         /* UART pads */
  70 #if CONFIG_CONS_INDEX == 0
  71         MX28_PAD_AUART0_RX__DUART_CTS,
  72         MX28_PAD_AUART0_TX__DUART_RTS,
  73         MX28_PAD_AUART0_CTS__DUART_RX,
  74         MX28_PAD_AUART0_RTS__DUART_TX,
  75 #elif CONFIG_CONS_INDEX == 1
  76         MX28_PAD_AUART1_RX__AUART1_RX,
  77         MX28_PAD_AUART1_TX__AUART1_TX,
  78         MX28_PAD_AUART1_CTS__AUART1_CTS,
  79         MX28_PAD_AUART1_RTS__AUART1_RTS,
  80 #elif CONFIG_CONS_INDEX == 2
  81         MX28_PAD_AUART3_RX__AUART3_RX,
  82         MX28_PAD_AUART3_TX__AUART3_TX,
  83         MX28_PAD_AUART3_CTS__AUART3_CTS,
  84         MX28_PAD_AUART3_RTS__AUART3_RTS,
  85 #endif
  86         /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
  87         MX28_PAD_I2C0_SCL__I2C0_SCL,
  88         MX28_PAD_I2C0_SDA__I2C0_SDA,
  89
  90         /* USBH VBUSEN, OC */
  91         MX28_PAD_SPDIF__GPIO_3_27,
  92         MX28_PAD_JTAG_RTCK__GPIO_4_20,
  93
  94         /* USBOTG VBUSEN, OC, ID */
  95         MX28_PAD_GPMI_CE2N__GPIO_0_18,
  96         MX28_PAD_GPMI_CE3N__GPIO_0_19,
  97         MX28_PAD_PWM2__GPIO_3_18,
  98 };
  99
 100 /*
 101  * Functions
 102  */
 103
 104 /* provide at least _some_ sort of randomness */
 105 #define MAX_LOOPS       100
 106
 107 static u32 random;
 108
 109 static inline void random_init(void)
 110 {
 111         struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
 112         u32 seed = 0;
 113         int i;
 114
 115         for (i = 0; i < MAX_LOOPS; i++) {
 116                 unsigned int usec = readl(&digctl_regs->hw_digctl_microseconds);
 117
 118                 seed = get_timer(usec + random + seed);
 119                 srand(seed);
 120                 random = rand();
 121         }
 122 }
 123
 124 #define RTC_PERSISTENT0_CLK32_MASK      (RTC_PERSISTENT0_CLOCKSOURCE |  \
 125                                         RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
 126 static u32 boot_cause __attribute__((section("data")));
 127
 128 int board_early_init_f(void)
 129 {
 130         struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
 131         u32 rtc_stat;
 132         int timeout = 5000;
 133
 134         random_init();
 135
 136         /* IO0 clock at 480MHz */
 137         mx28_set_ioclk(MXC_IOCLK0, 480000);
 138         /* IO1 clock at 480MHz */
 139         mx28_set_ioclk(MXC_IOCLK1, 480000);
 140
 141         /* SSP0 clock at 96MHz */
 142         mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
 143         /* SSP2 clock at 96MHz */
 144         mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
 145
 146         gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
 147         mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
 148
 149         while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
 150                 RTC_STAT_STALE_REGS_PERSISTENT0) {
 151                 if (timeout-- < 0)
 152                         return 0;
 153                 udelay(1);
 154         }
 155         boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
 156         if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
 157                 RTC_PERSISTENT0_CLK32_MASK) {
 158                 if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
 159                         goto rtc_err;
 160                 writel(RTC_PERSISTENT0_CLK32_MASK,
 161                         &rtc_regs->hw_rtc_persistent0_set);
 162         }
 163         return 0;
 164
 165 rtc_err:
 166         serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
 167         return 0;
 168 }
 169
 170 int board_init(void)
 171 {
 172         /* Address of boot parameters */
 173 #ifdef CONFIG_OF_LIBFDT
 174         gd->bd->bi_arch_number = -1;
 175 #endif
 176         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
 177         return 0;
 178 }
 179
 180 int dram_init(void)
 181 {
 182         return mxs_dram_init();
 183 }
 184
 185 #ifdef  CONFIG_CMD_MMC
 186 static int tx28_mmc_wp(int dev_no)
 187 {
 188         return 0;
 189 }
 190
 191 int board_mmc_init(bd_t *bis)
 192 {
 193         return mxsmmc_initialize(bis, 0, tx28_mmc_wp);
 194 }
 195 #endif /* CONFIG_CMD_MMC */
 196
 197 #ifdef CONFIG_FEC_MXC
 198 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
 199
 200 #ifdef CONFIG_FEC_MXC_MULTI
 201 #define FEC_MAX_IDX                     1
 202 #else
 203 #define FEC_MAX_IDX                     0
 204 #endif
 205
 206 static int fec_get_mac_addr(int index)
 207 {
 208         u32 val1, val2;
 209         int timeout = 1000;
 210         struct mxs_ocotp_regs *ocotp_regs =
 211                 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
 212         u32 *cust = &ocotp_regs->hw_ocotp_cust0;
 213         char mac[6 * 3];
 214         char env_name[] = "eth.addr";
 215
 216         if (index < 0 || index > FEC_MAX_IDX)
 217                 return -EINVAL;
 218
 219         /* set this bit to open the OTP banks for reading */
 220         writel(OCOTP_CTRL_RD_BANK_OPEN,
 221                 &ocotp_regs->hw_ocotp_ctrl_set);
 222
 223         /* wait until OTP contents are readable */
 224         while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
 225                 if (timeout-- < 0)
 226                         return -ETIMEDOUT;
 227                 udelay(100);
 228         }
 229
 230         val1 = readl(&cust[index * 8]);
 231         val2 = readl(&cust[index * 8 + 4]);
 232         if ((val1 | val2) == 0)
 233                 return 0;
 234         snprintf(mac, sizeof(mac), "%02x:%02x:%02x:%02x:%02x:%02x",
 235                 (val1 >> 24) & 0xFF, (val1 >> 16) & 0xFF,
 236                 (val1 >> 8) & 0xFF, (val1 >> 0) & 0xFF,
 237                 (val2 >> 24) & 0xFF, (val2 >> 16) & 0xFF);
 238         if (index == 0)
 239                 snprintf(env_name, sizeof(env_name), "ethaddr");
 240         else
 241                 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
 242
 243         setenv(env_name, mac);
 244         return 0;
 245 }
 246 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
 247
 248 static const iomux_cfg_t tx28_fec_pads[] = {
 249         MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
 250         MX28_PAD_ENET0_RXD0__ENET0_RXD0,
 251         MX28_PAD_ENET0_RXD1__ENET0_RXD1,
 252 };
 253
 254 int board_eth_init(bd_t *bis)
 255 {
 256         int ret;
 257
 258         /* Reset the external phy */
 259         gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
 260
 261         /* Power on the external phy */
 262         gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
 263
 264         /* Pull strap pins to high */
 265         gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
 266         gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
 267         gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
 268         gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
 269
 270         udelay(25000);
 271         gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
 272         udelay(100);
 273
 274         mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
 275
 276         ret = cpu_eth_init(bis);
 277         if (ret) {
 278                 printf("cpu_eth_init() failed: %d\n", ret);
 279                 return ret;
 280         }
 281
 282         ret = fec_get_mac_addr(0);
 283         if (ret < 0) {
 284                 printf("Failed to read FEC0 MAC address from OCOTP\n");
 285                 return ret;
 286         }
 287 #ifdef CONFIG_FEC_MXC_MULTI
 288         if (getenv("ethaddr")) {
 289                 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
 290                 if (ret) {
 291                         printf("FEC MXS: Unable to init FEC0\n");
 292                         return ret;
 293                 }
 294         }
 295
 296         ret = fec_get_mac_addr(1);
 297         if (ret < 0) {
 298                 printf("Failed to read FEC1 MAC address from OCOTP\n");
 299                 return ret;
 300         }
 301         if (getenv("eth1addr")) {
 302                 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
 303                 if (ret) {
 304                         printf("FEC MXS: Unable to init FEC1\n");
 305                         return ret;
 306                 }
 307         }
 308         return 0;
 309 #else
 310         if (getenv("ethaddr")) {
 311                 ret = fecmxc_initialize(bis);
 312         }
 313         return ret;
 314 #endif
 315 }
 316 #endif /* CONFIG_FEC_MXC */
 317
 318 enum {
 319         LED_STATE_INIT = -1,
 320         LED_STATE_OFF,
 321         LED_STATE_ON,
 322 };
 323
 324 void show_activity(int arg)
 325 {
 326         static int led_state = LED_STATE_INIT;
 327         static ulong last;
 328
 329         if (led_state == LED_STATE_INIT) {
 330                 last = get_timer(0);
 331                 gpio_set_value(TX28_LED_GPIO, 1);
 332                 led_state = LED_STATE_ON;
 333         } else {
 334                 if (get_timer(last) > CONFIG_SYS_HZ) {
 335                         last = get_timer(0);
 336                         if (led_state == LED_STATE_ON) {
 337                                 gpio_set_value(TX28_LED_GPIO, 0);
 338                         } else {
 339                                 gpio_set_value(TX28_LED_GPIO, 1);
 340                         }
 341                         led_state = 1 - led_state;
 342                 }
 343         }
 344 }
 345
 346 static const iomux_cfg_t stk5_pads[] = {
 347         /* SW controlled LED on STK5 baseboard */
 348         MX28_PAD_ENET0_RXD3__GPIO_4_10,
 349 };
 350
 351 static const struct gpio stk5_gpios[] = {
 352 };
 353
 354 #ifdef CONFIG_LCD
 355 static struct fb_videomode tx28_fb_modes[] = {
 356         {
 357                 /* Standard VGA timing */
 358                 .name           = "VGA",
 359                 .refresh        = 60,
 360                 .xres           = 640,
 361                 .yres           = 480,
 362                 .pixclock       = KHZ2PICOS(25175),
 363                 .left_margin    = 48,
 364                 .hsync_len      = 96,
 365                 .right_margin   = 16,
 366                 .upper_margin   = 31,
 367                 .vsync_len      = 2,
 368                 .lower_margin   = 12,
 369                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 370                 .vmode          = FB_VMODE_NONINTERLACED,
 371         },
 372         {
 373                 /* Emerging ETV570 640 x 480 display. Syncs low active,
 374                  * DE high active, 115.2 mm x 86.4 mm display area
 375                  * VGA compatible timing
 376                  */
 377                 .name           = "ETV570",
 378                 .refresh        = 60,
 379                 .xres           = 640,
 380                 .yres           = 480,
 381                 .pixclock       = KHZ2PICOS(25175),
 382                 .left_margin    = 114,
 383                 .hsync_len      = 30,
 384                 .right_margin   = 16,
 385                 .upper_margin   = 32,
 386                 .vsync_len      = 3,
 387                 .lower_margin   = 10,
 388                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 389                 .vmode          = FB_VMODE_NONINTERLACED,
 390         },
 391         {
 392                 /* Emerging ET0350G0DH6 320 x 240 display.
 393                  * 70.08 mm x 52.56 mm display area.
 394                  */
 395                 .name           = "ET0350",
 396                 .refresh        = 60,
 397                 .xres           = 320,
 398                 .yres           = 240,
 399                 .pixclock       = KHZ2PICOS(6500),
 400                 .left_margin    = 68 - 34,
 401                 .hsync_len      = 34,
 402                 .right_margin   = 20,
 403                 .upper_margin   = 18 - 3,
 404                 .vsync_len      = 3,
 405                 .lower_margin   = 4,
 406                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 407                 .vmode          = FB_VMODE_NONINTERLACED,
 408         },
 409         {
 410                 /* Emerging ET0430G0DH6 480 x 272 display.
 411                  * 95.04 mm x 53.856 mm display area.
 412                  */
 413                 .name           = "ET0430",
 414                 .refresh        = 60,
 415                 .xres           = 480,
 416                 .yres           = 272,
 417                 .pixclock       = KHZ2PICOS(9000),
 418                 .left_margin    = 2,
 419                 .hsync_len      = 41,
 420                 .right_margin   = 2,
 421                 .upper_margin   = 2,
 422                 .vsync_len      = 10,
 423                 .lower_margin   = 2,
 424                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 425                 .vmode          = FB_VMODE_NONINTERLACED,
 426         },
 427         {
 428                 /* Emerging ET0500G0DH6 800 x 480 display.
 429                  * 109.6 mm x 66.4 mm display area.
 430                  */
 431                 .name           = "ET0500",
 432                 .refresh        = 60,
 433                 .xres           = 800,
 434                 .yres           = 480,
 435                 .pixclock       = KHZ2PICOS(33260),
 436                 .left_margin    = 216 - 128,
 437                 .hsync_len      = 128,
 438                 .right_margin   = 1056 - 800 - 216,
 439                 .upper_margin   = 35 - 2,
 440                 .vsync_len      = 2,
 441                 .lower_margin   = 525 - 480 - 35,
 442                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 443                 .vmode          = FB_VMODE_NONINTERLACED,
 444         },
 445         {
 446                 /* Emerging ETQ570G0DH6 320 x 240 display.
 447                  * 115.2 mm x 86.4 mm display area.
 448                  */
 449                 .name           = "ETQ570",
 450                 .refresh        = 60,
 451                 .xres           = 320,
 452                 .yres           = 240,
 453                 .pixclock       = KHZ2PICOS(6400),
 454                 .left_margin    = 38,
 455                 .hsync_len      = 30,
 456                 .right_margin   = 30,
 457                 .upper_margin   = 16, /* 15 according to datasheet */
 458                 .vsync_len      = 3, /* TVP -> 1>x>5 */
 459                 .lower_margin   = 4, /* 4.5 according to datasheet */
 460                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 461                 .vmode          = FB_VMODE_NONINTERLACED,
 462         },
 463         {
 464                 /* Emerging ET0700G0DH6 800 x 480 display.
 465                  * 152.4 mm x 91.44 mm display area.
 466                  */
 467                 .name           = "ET0700",
 468                 .refresh        = 60,
 469                 .xres           = 800,
 470                 .yres           = 480,
 471                 .pixclock       = KHZ2PICOS(33260),
 472                 .left_margin    = 216 - 128,
 473                 .hsync_len      = 128,
 474                 .right_margin   = 1056 - 800 - 216,
 475                 .upper_margin   = 35 - 2,
 476                 .vsync_len      = 2,
 477                 .lower_margin   = 525 - 480 - 35,
 478                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 479                 .vmode          = FB_VMODE_NONINTERLACED,
 480         },
 481         {
 482                 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
 483                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 484                 .vmode          = FB_VMODE_NONINTERLACED,
 485         },
 486 };
 487
 488 static int lcd_enabled = 1;
 489
 490 void lcd_enable(void)
 491 {
 492         /* HACK ALERT:
 493          * global variable from common/lcd.c
 494          * Set to 0 here to prevent messages from going to LCD
 495          * rather than serial console
 496          */
 497         lcd_is_enabled = 0;
 498
 499         karo_load_splashimage(1);
 500         if (lcd_enabled) {
 501                 debug("Switching LCD on\n");
 502                 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
 503                 udelay(100);
 504                 gpio_set_value(TX28_LCD_RST_GPIO, 1);
 505                 udelay(300000);
 506                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO, 0);
 507         }
 508 }
 509
 510 void lcd_disable(void)
 511 {
 512         mxsfb_disable();
 513 }
 514
 515 void lcd_panel_disable(void)
 516 {
 517         if (lcd_enabled) {
 518                 debug("Switching LCD off\n");
 519                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO, 1);
 520                 gpio_set_value(TX28_LCD_RST_GPIO, 0);
 521                 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
 522         }
 523 }
 524
 525 static const iomux_cfg_t stk5_lcd_pads[] = {
 526         /* LCD RESET */
 527         MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
 528         /* LCD POWER_ENABLE */
 529         MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
 530         /* LCD Backlight (PWM) */
 531         MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
 532
 533         /* Display */
 534         MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
 535         MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
 536         MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
 537         MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
 538         MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
 539         MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
 540         MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
 541         MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
 542         MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
 543         MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
 544         MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
 545         MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
 546         MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
 547         MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
 548         MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
 549         MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
 550         MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
 551         MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
 552         MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
 553         MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
 554         MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
 555         MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
 556         MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
 557         MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
 558         MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
 559         MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
 560         MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
 561         MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
 562         MX28_PAD_LCD_VSYNC__LCD_VSYNC | MXS_PAD_CTRL,
 563         MX28_PAD_LCD_HSYNC__LCD_HSYNC | MXS_PAD_CTRL,
 564         MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MXS_PAD_CTRL,
 565 };
 566
 567 static const struct gpio stk5_lcd_gpios[] = {
 568         { TX28_LCD_RST_GPIO, GPIOF_OUTPUT_INIT_LOW, "LCD RESET", },
 569         { TX28_LCD_PWR_GPIO, GPIOF_OUTPUT_INIT_LOW, "LCD POWER", },
 570         { TX28_LCD_BACKLIGHT_GPIO, GPIOF_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
 571 };
 572
 573 extern void video_hw_init(void *lcdbase);
 574
 575 void lcd_ctrl_init(void *lcdbase)
 576 {
 577         int color_depth = 24;
 578         char *vm;
 579         unsigned long val;
 580         int refresh = 60;
 581         struct fb_videomode *p = tx28_fb_modes;
 582         struct fb_videomode fb_mode;
 583         int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
 584
 585         if (!lcd_enabled) {
 586                 debug("LCD disabled\n");
 587                 return;
 588         }
 589
 590         if (tstc()) {
 591                 debug("Disabling LCD\n");
 592                 lcd_enabled = 0;
 593                 return;
 594         }
 595
 596         karo_fdt_move_fdt();
 597
 598         vm = getenv("video_mode");
 599         if (vm == NULL) {
 600                 debug("Disabling LCD\n");
 601                 lcd_enabled = 0;
 602                 return;
 603         }
 604         if (karo_fdt_get_fb_mode(working_fdt, vm, &fb_mode) == 0) {
 605                 p = &fb_mode;
 606                 debug("Using video mode from FDT\n");
 607                 vm += strlen(vm);
 608         }
 609         if (p->name != NULL)
 610                 debug("Trying compiled-in video modes\n");
 611         while (p->name != NULL) {
 612                 if (strcmp(p->name, vm) == 0) {
 613                         debug("Using video mode: '%s'\n", p->name);
 614                         vm += strlen(vm);
 615                         break;
 616                 }
 617                 p++;
 618         }
 619         if (*vm != '\0')
 620                 debug("Trying to decode video_mode: '%s'\n", vm);
 621         while (*vm != '\0') {
 622                 if (*vm >= '0' && *vm <= '9') {
 623                         char *end;
 624
 625                         val = simple_strtoul(vm, &end, 0);
 626                         if (end > vm) {
 627                                 if (!xres_set) {
 628                                         if (val > panel_info.vl_col)
 629                                                 val = panel_info.vl_col;
 630                                         p->xres = val;
 631                                         xres_set = 1;
 632                                 } else if (!yres_set) {
 633                                         if (val > panel_info.vl_row)
 634                                                 val = panel_info.vl_row;
 635                                         p->yres = val;
 636                                         yres_set = 1;
 637                                 } else if (!bpp_set) {
 638                                         switch (val) {
 639                                         case 8:
 640                                         case 16:
 641                                         case 18:
 642                                         case 24:
 643                                                 color_depth = val;
 644                                                 break;
 645
 646                                         default:
 647                                                 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
 648                                                         end - vm, vm, color_depth);
 649                                         }
 650                                         bpp_set = 1;
 651                                 } else if (!refresh_set) {
 652                                         refresh = val;
 653                                         refresh_set = 1;
 654                                 }
 655                         }
 656                         vm = end;
 657                 }
 658                 switch (*vm) {
 659                 case '@':
 660                         bpp_set = 1;
 661                         /* fallthru */
 662                 case '-':
 663                         yres_set = 1;
 664                         /* fallthru */
 665                 case 'x':
 666                         xres_set = 1;
 667                         /* fallthru */
 668                 case 'M':
 669                 case 'R':
 670                         vm++;
 671                         break;
 672
 673                 default:
 674                         if (*vm != '\0')
 675                                 vm++;
 676                 }
 677         }
 678         if (p->xres == 0 || p->yres == 0) {
 679                 printf("Invalid video mode: %s\n", getenv("video_mode"));
 680                 lcd_enabled = 0;
 681                 printf("Supported video modes are:");
 682                 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
 683                         printf(" %s", p->name);
 684                 }
 685                 printf("\n");
 686                 return;
 687         }
 688         p->pixclock = KHZ2PICOS(refresh *
 689                 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
 690                 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
 691                                 1000);
 692         debug("Pixel clock set to %lu.%03lu MHz\n",
 693                 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
 694
 695         gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
 696         mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
 697                                 ARRAY_SIZE(stk5_lcd_pads));
 698
 699         debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
 700                 color_depth, refresh);
 701
 702         if (karo_load_splashimage(0) == 0) {
 703                 debug("Initializing LCD controller\n");
 704                 mxsfb_init(p, PIX_FMT_RGB24, color_depth);
 705                 video_hw_init(lcdbase);
 706         } else {
 707                 debug("Skipping initialization of LCD controller\n");
 708         }
 709 }
 710 #else
 711 #define lcd_enabled 0
 712 #endif /* CONFIG_LCD */
 713
 714 static void stk5_board_init(void)
 715 {
 716         gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
 717         mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
 718 }
 719
 720 static void stk5v3_board_init(void)
 721 {
 722         stk5_board_init();
 723 }
 724
 725 static void stk5v5_board_init(void)
 726 {
 727         stk5_board_init();
 728
 729         /* init flexcan transceiver enable GPIO */
 730         gpio_request_one(MXS_GPIO_NR(0, 1), GPIOF_OUTPUT_INIT_HIGH,
 731                         "Flexcan Transceiver");
 732         mxs_iomux_setup_pad(MX28_PAD_LCD_D00__GPIO_1_0);
 733 }
 734
 735 int board_late_init(void)
 736 {
 737         const char *baseboard;
 738
 739         karo_fdt_move_fdt();
 740
 741         baseboard = getenv("baseboard");
 742         if (!baseboard)
 743                 return 0;
 744
 745         if (strncmp(baseboard, "stk5", 4) == 0) {
 746                 printf("Baseboard: %s\n", baseboard);
 747                 if ((strlen(baseboard) == 4) ||
 748                         strcmp(baseboard, "stk5-v3") == 0) {
 749                         stk5v3_board_init();
 750                 } else if (strcmp(baseboard, "stk5-v5") == 0) {
 751                         const char *otg_mode = getenv("otg_mode");
 752
 753                         if (otg_mode && strcmp(otg_mode, "host") == 0) {
 754                                 printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
 755                                         otg_mode, baseboard);
 756                                 setenv("otg_mode", "none");
 757                         }
 758                         stk5v5_board_init();
 759                 } else {
 760                         printf("WARNING: Unsupported STK5 board rev.: %s\n",
 761                                 baseboard + 4);
 762                 }
 763         } else {
 764                 printf("WARNING: Unsupported baseboard: '%s'\n",
 765                         baseboard);
 766                 return -EINVAL;
 767         }
 768
 769         return 0;
 770 }
 771
 772 #define BOOT_CAUSE_MASK         (RTC_PERSISTENT0_EXTERNAL_RESET |       \
 773                                 RTC_PERSISTENT0_ALARM_WAKE |            \
 774                                 RTC_PERSISTENT0_THERMAL_RESET)
 775
 776 static void thermal_init(void)
 777 {
 778         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
 779         struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
 780
 781         writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
 782                 POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
 783                 &power_regs->hw_power_thermal);
 784
 785         writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
 786                 CLKCTRL_RESET_THERMAL_RESET_ENABLE,
 787                 &clkctrl_regs->hw_clkctrl_reset);
 788 }
 789
 790 int checkboard(void)
 791 {
 792         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
 793         u32 pwr_sts = readl(&power_regs->hw_power_sts);
 794         u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
 795         const char *dlm = "";
 796
 797         printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
 798                 CONFIG_SDRAM_SIZE / SZ_128M);
 799
 800         printf("POWERUP Source: ");
 801         if (pwrup_src & (3 << 0)) {
 802                 printf("%sPSWITCH %s voltage", dlm,
 803                         pwrup_src & (1 << 1) ? "HIGH" : "MID");
 804                 dlm = " | ";
 805         }
 806         if (pwrup_src & (1 << 4)) {
 807                 printf("%sRTC", dlm);
 808                 dlm = " | ";
 809         }
 810         if (pwrup_src & (1 << 5)) {
 811                 printf("%s5V", dlm);
 812                 dlm = " | ";
 813         }
 814         printf("\n");
 815
 816         if (boot_cause & BOOT_CAUSE_MASK) {
 817                 dlm="";
 818                 printf("Last boot cause: ");
 819                 if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
 820                         printf("%sEXTERNAL", dlm);
 821                         dlm = " | ";
 822                 }
 823                 if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
 824                         printf("%sTHERMAL", dlm);
 825                         dlm = " | ";
 826                 }
 827                 if (*dlm != '\0')
 828                         printf(" RESET");
 829                 if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
 830                         printf("%sALARM WAKE", dlm);
 831                         dlm = " | ";
 832                 }
 833                 printf("\n");
 834         }
 835
 836         while (pwr_sts & POWER_STS_THERMAL_WARNING) {
 837                 static int first = 1;
 838
 839                 if (first) {
 840                         printf("CPU too hot to boot\n");
 841                         first = 0;
 842                 }
 843                 if (tstc())
 844                         break;
 845                 pwr_sts = readl(&power_regs->hw_power_sts);
 846         }
 847
 848         if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
 849                 thermal_init();
 850
 851         return 0;
 852 }
 853
 854 #if defined(CONFIG_OF_BOARD_SETUP)
 855 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
 856 #include <jffs2/jffs2.h>
 857 #include <mtd_node.h>
 858 struct node_info tx28_nand_nodes[] = {
 859         { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
 860 };
 861 #else
 862 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
 863 #endif
 864
 865 static int flexcan_enabled(void *blob)
 866 {
 867         const char *status;
 868         int off = fdt_path_offset(blob, "can0");
 869
 870         if (off < 0) {
 871                 printf("node 'can0' not found\n");
 872         } else {
 873                 status = fdt_getprop(blob, off, "status", NULL);
 874                 if (status && strcmp(status, "okay") == 0) {
 875                         printf("can0 is enabled\n");
 876                         return 1;
 877                 }
 878         }
 879         off = fdt_path_offset(blob, "can1");
 880         if (off < 0) {
 881                 printf("node 'can1' not found\n");
 882                 return 0;
 883         }
 884         status = fdt_getprop(blob, off, "status", NULL);
 885         if (status && strcmp(status, "okay") == 0) {
 886                 printf("can1 is enabled\n");
 887                 return 1;
 888         }
 889         printf("can driver disabled\n");
 890         return 0;
 891 }
 892
 893 static void tx28_set_lcd_pins(void *blob, const char *name)
 894 {
 895         int off = fdt_path_offset(blob, name);
 896         u32 ph;
 897         const struct fdt_property *pc;
 898         int len;
 899
 900         if (off < 0)
 901                 return;
 902
 903         ph = fdt32_to_cpu(fdt_create_phandle(blob, off));
 904         if (!ph)
 905                 return;
 906
 907         off = fdt_path_offset(blob, "lcdif");
 908         if (off < 0)
 909                 return;
 910
 911         pc = fdt_get_property(blob, off, "pinctrl-0", &len);
 912         if (!pc || len < sizeof(ph))
 913                 return;
 914
 915         memcpy((void *)pc->data, &ph, sizeof(ph));
 916         fdt_setprop(blob, off, "pinctrl-0", pc->data, len);
 917 }
 918
 919 static void tx28_fixup_flexcan(void *blob, int stk5_v5)
 920 {
 921         const char *can_xcvr = "disabled";
 922
 923         if (stk5_v5) {
 924                 if (flexcan_enabled(blob)) {
 925                         tx28_set_lcd_pins(blob, "lcdif_23bit_pins_a");
 926                         can_xcvr = "okay";
 927                 } else {
 928                         tx28_set_lcd_pins(blob, "lcdif_24bit_pins_a");
 929                 }
 930         } else {
 931                 const char *otg_mode = getenv("otg_mode");
 932
 933                 if (otg_mode && (strcmp(otg_mode, "host") == 0))
 934                         karo_fdt_enable_node(blob, "can1", 0);
 935         }
 936         fdt_find_and_setprop(blob, "/regulators/can-xcvr", "status",
 937                         can_xcvr, strlen(can_xcvr) + 1, 1);
 938 }
 939
 940 static void tx28_fixup_fec(void *blob)
 941 {
 942         karo_fdt_enable_node(blob, "ethernet1", 0);
 943 }
 944
 945 void ft_board_setup(void *blob, bd_t *bd)
 946 {
 947         const char *baseboard = getenv("baseboard");
 948         int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
 949
 950 #ifdef CONFIG_TX28_S
 951         /* TX28-41xx (aka TX28S) has no external RTC
 952          * and no I2C GPIO extender
 953          */
 954         karo_fdt_remove_node(blob, "ds1339");
 955         karo_fdt_remove_node(blob, "gpio5");
 956 #endif
 957         if (stk5_v5) {
 958                 karo_fdt_remove_node(blob, "stk5led");
 959         } else {
 960                 tx28_fixup_fec(blob);
 961         }
 962         tx28_fixup_flexcan(blob, stk5_v5);
 963
 964         fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
 965         fdt_fixup_ethernet(blob);
 966
 967         karo_fdt_fixup_touchpanel(blob);
 968         karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy");
 969         karo_fdt_update_fb_mode(blob, getenv("video_mode"));
 970 }
 971 #endif