2 * Copyright (C) 2011 Lothar Waßmann <LW@KARO-electronics.de>
3 * based on: board/freesclae/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/arch/iomux-mx28.h>
29 #include <asm/arch/clock.h>
30 #include <asm/arch/imx-regs.h>
31 #include <asm/arch/regs-pinctrl.h>
32 #include <asm/arch/regs-clkctrl.h>
33 #include <asm/arch/regs-ocotp.h>
34 #include <asm/arch/sys_proto.h>
38 #include <imx_ssp_mmc.h>
40 DECLARE_GLOBAL_DATA_PTR;
45 int board_early_init_f(void)
47 /* IO0 clock at 480MHz */
48 mx28_set_ioclk(MXC_IOCLK0, 480000);
49 /* IO1 clock at 480MHz */
50 mx28_set_ioclk(MXC_IOCLK1, 480000);
52 /* SSP0 clock at 96MHz */
53 mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
54 /* SSP2 clock at 96MHz */
55 mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
60 void coloured_LED_init(void)
63 gpio_set_value(MX28_PAD_ENET0_RXD3__GPIO_4_10, 0);
68 /* Address of boot parameters */
69 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
75 return mx28_dram_init();
79 static int tx28_mmc_wp(int dev_no)
84 int board_mmc_init(bd_t *bis)
86 return mxsmmc_initialize(bis, 0, tx28_mmc_wp);
88 #endif /* CONFIG_CMD_MMC */
91 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
93 #ifdef CONFIG_FEC_MXC_MULTI
99 static int fec_get_mac_addr(int index)
103 struct mx28_ocotp_regs *ocotp_regs =
104 (struct mx28_ocotp_regs *)MXS_OCOTP_BASE;
105 u32 *cust = &ocotp_regs->hw_ocotp_cust0;
107 char env_name[] = "eth.addr";
109 if (index < 0 || index > FEC_MAX_IDX)
112 /* set this bit to open the OTP banks for reading */
113 writel(OCOTP_CTRL_RD_BANK_OPEN,
114 &ocotp_regs->hw_ocotp_ctrl_set);
116 /* wait until OTP contents are readable */
117 while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
123 val1 = readl(&cust[index * 8]);
124 val2 = readl(&cust[index * 8 + 4]);
125 if ((val1 | val2) == 0)
127 snprintf(mac, sizeof(mac), "%02x:%02x:%02x:%02x:%02x:%02x",
128 (val1 >> 24) & 0xFF, (val1 >> 16) & 0xFF,
129 (val1 >> 8) & 0xFF, (val1 >> 0) & 0xFF,
130 (val2 >> 24) & 0xFF, (val2 >> 16) & 0xFF);
132 snprintf(env_name, sizeof(env_name), "ethaddr");
134 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
136 setenv(env_name, mac);
139 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
141 static iomux_cfg_t tx28_fec_pads[] = {
142 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
143 MX28_PAD_ENET0_RXD0__ENET0_RXD0,
144 MX28_PAD_ENET0_RXD1__ENET0_RXD1,
147 int board_eth_init(bd_t *bis)
151 /* Reset the external phy */
152 gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
154 /* Power on the external phy */
155 gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
157 /* Pull strap pins to high */
158 gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
159 gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
160 gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
161 gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
164 gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
167 mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
169 ret = cpu_eth_init(bis);
171 printf("cpu_eth_init() failed: %d\n", ret);
175 ret = fec_get_mac_addr(0);
177 printf("Failed to read FEC0 MAC address from OCOTP\n");
180 #ifdef CONFIG_FEC_MXC_MULTI
181 if (getenv("ethaddr")) {
182 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
184 printf("FEC MXS: Unable to init FEC0\n");
189 ret = fec_get_mac_addr(1);
191 printf("Failed to read FEC1 MAC address from OCOTP\n");
194 if (getenv("eth1addr")) {
195 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
197 printf("FEC MXS: Unable to init FEC1\n");
203 if (getenv("ethaddr")) {
204 ret = fecmxc_initialize(bis);
209 #endif /* CONFIG_FEC_MXC */
217 void show_activity(int arg)
219 static int led_state = LED_STATE_INIT;
222 if (led_state == LED_STATE_INIT) {
224 gpio_set_value(MX28_PAD_ENET0_RXD3__GPIO_4_10, 1);
225 led_state = LED_STATE_ON;
227 if (get_timer(last) > CONFIG_SYS_HZ) {
229 if (led_state == LED_STATE_ON) {
230 gpio_set_value(MX28_PAD_ENET0_RXD3__GPIO_4_10, 0);
232 gpio_set_value(MX28_PAD_ENET0_RXD3__GPIO_4_10, 1);
234 led_state = 1 - led_state;