2 * Maintainer : Steve Sakoman <steve@sakoman.com>
4 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
5 * Richard Woodruff <r-woodruff2@ti.com>
6 * Syed Mohammed Khasim <khasim@ti.com>
7 * Sunil Kumar <sunilsaini05@gmail.com>
8 * Shashi Ranjan <shashiranjanmca05@gmail.com>
10 * (C) Copyright 2004-2008
11 * Texas Instruments, <www.ti.com>
13 * SPDX-License-Identifier: GPL-2.0+
18 #include <linux/mtd/nand.h>
20 #include <asm/arch/mmc_host_def.h>
21 #include <asm/arch/mux.h>
22 #include <asm/arch/mem.h>
23 #include <asm/arch/sys_proto.h>
25 #include <asm/mach-types.h>
28 DECLARE_GLOBAL_DATA_PTR;
30 #define TWL4030_I2C_BUS 0
31 #define EXPANSION_EEPROM_I2C_BUS 2
32 #define EXPANSION_EEPROM_I2C_ADDRESS 0x51
34 #define GUMSTIX_SUMMIT 0x01000200
35 #define GUMSTIX_TOBI 0x02000200
36 #define GUMSTIX_TOBI_DUO 0x03000200
37 #define GUMSTIX_PALO35 0x04000200
38 #define GUMSTIX_PALO43 0x05000200
39 #define GUMSTIX_CHESTNUT43 0x06000200
40 #define GUMSTIX_PINTO 0x07000200
41 #define GUMSTIX_GALLOP43 0x08000200
42 #define GUMSTIX_ALTO35 0x09000200
43 #define GUMSTIX_STAGECOACH 0x0A000200
44 #define GUMSTIX_THUMBO 0x0B000200
45 #define GUMSTIX_TURTLECORE 0x0C000200
46 #define GUMSTIX_ARBOR43C 0x0D000200
48 #define ETTUS_USRP_E 0x01000300
50 #define GUMSTIX_NO_EEPROM 0xffffffff
53 unsigned int device_vendor;
54 unsigned char revision;
55 unsigned char content;
61 #if defined(CONFIG_CMD_NET)
62 static void setup_net_chip(void);
65 /* GPMC definitions for LAN9221 chips on Tobi expansion boards */
66 static const u32 gpmc_lan_config[] = {
67 NET_LAN9221_GPMC_CONFIG1,
68 NET_LAN9221_GPMC_CONFIG2,
69 NET_LAN9221_GPMC_CONFIG3,
70 NET_LAN9221_GPMC_CONFIG4,
71 NET_LAN9221_GPMC_CONFIG5,
72 NET_LAN9221_GPMC_CONFIG6,
73 /*CONFIG7- computed as params */
78 * Description: Early hardware init.
82 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
83 /* board id for Linux */
84 gd->bd->bi_arch_number = MACH_TYPE_OVERO;
86 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
92 * Routine: get_board_revision
93 * Description: Returns the board revision
95 int get_board_revision(void)
99 #ifdef CONFIG_SYS_I2C_OMAP34XX
102 /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */
103 /* these boards should return a revision number of 0 */
104 /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
105 i2c_set_bus_num(TWL4030_I2C_BUS);
107 i2c_write(0x4B, 0x29, 1, &data, 1);
109 i2c_write(0x4B, 0x2b, 1, &data, 1);
110 i2c_read(0x4B, 0x2a, 1, &data, 1);
113 if (!gpio_request(112, "") &&
114 !gpio_request(113, "") &&
115 !gpio_request(115, "")) {
117 gpio_direction_input(112);
118 gpio_direction_input(113);
119 gpio_direction_input(115);
121 revision = gpio_get_value(115) << 2 |
122 gpio_get_value(113) << 1 |
125 puts("Error: unable to acquire board revision GPIOs\n");
132 #ifdef CONFIG_SPL_BUILD
134 * Routine: get_board_mem_timings
135 * Description: If we use SPL then there is no x-loader nor config header
136 * so we have to setup the DDR timings ourself on both banks.
138 void get_board_mem_timings(struct board_sdrc_timings *timings)
140 timings->mr = MICRON_V_MR_165;
141 switch (get_board_revision()) {
142 case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
143 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
144 timings->ctrla = MICRON_V_ACTIMA_165;
145 timings->ctrlb = MICRON_V_ACTIMB_165;
146 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
148 case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
150 timings->mcfg = MICRON_V_MCFG_200(256 << 20);
151 timings->ctrla = MICRON_V_ACTIMA_200;
152 timings->ctrlb = MICRON_V_ACTIMB_200;
153 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
155 case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
156 timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
157 timings->ctrla = HYNIX_V_ACTIMA_200;
158 timings->ctrlb = HYNIX_V_ACTIMB_200;
159 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
161 case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
162 timings->mcfg = MCFG(512 << 20, 15);
163 timings->ctrla = MICRON_V_ACTIMA_200;
164 timings->ctrlb = MICRON_V_ACTIMB_200;
165 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
168 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
169 timings->ctrla = MICRON_V_ACTIMA_165;
170 timings->ctrlb = MICRON_V_ACTIMB_165;
171 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
177 * Routine: get_sdio2_config
178 * Description: Return information about the wifi module connection
179 * Returns 0 if the module connects though a level translator
180 * Returns 1 if the module connects directly
182 int get_sdio2_config(void)
186 if (!gpio_request(130, "") && !gpio_request(139, "")) {
188 gpio_direction_output(130, 0);
189 gpio_direction_input(139);
192 gpio_set_value(130, 0);
193 if (gpio_get_value(139) == 0) {
194 gpio_set_value(130, 1);
195 if (gpio_get_value(139) == 1)
199 gpio_direction_input(130);
201 puts("Error: unable to acquire sdio2 clk GPIOs\n");
209 * Routine: get_expansion_id
210 * Description: This function checks for expansion board by checking I2C
211 * bus 2 for the availability of an AT24C01B serial EEPROM.
212 * returns the device_vendor field from the EEPROM
214 unsigned int get_expansion_id(void)
216 i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
218 /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
219 if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
220 i2c_set_bus_num(TWL4030_I2C_BUS);
221 return GUMSTIX_NO_EEPROM;
224 /* read configuration data */
225 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
226 sizeof(expansion_config));
228 i2c_set_bus_num(TWL4030_I2C_BUS);
230 return expansion_config.device_vendor;
234 * Routine: misc_init_r
235 * Description: Configure board specific parts
237 int misc_init_r(void)
239 unsigned int expansion_id;
241 twl4030_power_init();
242 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
244 #if defined(CONFIG_CMD_NET)
248 printf("Board revision: %d\n", get_board_revision());
250 switch (get_sdio2_config()) {
252 puts("Tranceiver detected on mmc2\n");
253 MUX_OVERO_SDIO2_TRANSCEIVER();
256 puts("Direct connection on mmc2\n");
257 MUX_OVERO_SDIO2_DIRECT();
260 puts("Unable to detect mmc2 connection type\n");
263 expansion_id = get_expansion_id();
264 switch (expansion_id) {
266 printf("Recognized Summit expansion board (rev %d %s)\n",
267 expansion_config.revision,
268 expansion_config.fab_revision);
269 setenv("defaultdisplay", "dvi");
272 printf("Recognized Tobi expansion board (rev %d %s)\n",
273 expansion_config.revision,
274 expansion_config.fab_revision);
275 setenv("defaultdisplay", "dvi");
277 case GUMSTIX_TOBI_DUO:
278 printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
279 expansion_config.revision,
280 expansion_config.fab_revision);
281 /* second lan chip */
282 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
283 0x2B000000, GPMC_SIZE_16M);
286 printf("Recognized Palo35 expansion board (rev %d %s)\n",
287 expansion_config.revision,
288 expansion_config.fab_revision);
289 setenv("defaultdisplay", "lcd35");
292 printf("Recognized Palo43 expansion board (rev %d %s)\n",
293 expansion_config.revision,
294 expansion_config.fab_revision);
295 setenv("defaultdisplay", "lcd43");
297 case GUMSTIX_CHESTNUT43:
298 printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
299 expansion_config.revision,
300 expansion_config.fab_revision);
301 setenv("defaultdisplay", "lcd43");
304 printf("Recognized Pinto expansion board (rev %d %s)\n",
305 expansion_config.revision,
306 expansion_config.fab_revision);
308 case GUMSTIX_GALLOP43:
309 printf("Recognized Gallop43 expansion board (rev %d %s)\n",
310 expansion_config.revision,
311 expansion_config.fab_revision);
312 setenv("defaultdisplay", "lcd43");
315 printf("Recognized Alto35 expansion board (rev %d %s)\n",
316 expansion_config.revision,
317 expansion_config.fab_revision);
319 setenv("defaultdisplay", "lcd35");
321 case GUMSTIX_STAGECOACH:
322 printf("Recognized Stagecoach expansion board (rev %d %s)\n",
323 expansion_config.revision,
324 expansion_config.fab_revision);
327 printf("Recognized Thumbo expansion board (rev %d %s)\n",
328 expansion_config.revision,
329 expansion_config.fab_revision);
331 case GUMSTIX_TURTLECORE:
332 printf("Recognized Turtlecore expansion board (rev %d %s)\n",
333 expansion_config.revision,
334 expansion_config.fab_revision);
336 case GUMSTIX_ARBOR43C:
337 printf("Recognized Arbor43C expansion board (rev %d %s)\n",
338 expansion_config.revision,
339 expansion_config.fab_revision);
341 setenv("defaultdisplay", "lcd43");
344 printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
345 expansion_config.revision,
346 expansion_config.fab_revision);
348 setenv("defaultdisplay", "dvi");
350 case GUMSTIX_NO_EEPROM:
351 puts("No EEPROM on expansion board\n");
354 printf("Unrecognized expansion board 0x%08x\n", expansion_id);
358 if (expansion_config.content == 1)
359 setenv(expansion_config.env_var, expansion_config.env_setting);
367 * Routine: set_muxconf_regs
368 * Description: Setting up the configuration Mux registers specific to the
369 * hardware. Many pins need to be moved from protect to primary
372 void set_muxconf_regs(void)
377 #if defined(CONFIG_CMD_NET)
379 * Routine: setup_net_chip
380 * Description: Setting up the configuration GPMC registers specific to the
383 static void setup_net_chip(void)
385 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
388 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
391 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
392 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
393 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
394 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
395 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
396 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
397 &ctrl_base->gpmc_nadv_ale);
399 /* Make GPIO 64 as output pin and send a magic pulse through it */
400 if (!gpio_request(64, "")) {
401 gpio_direction_output(64, 0);
402 gpio_set_value(64, 1);
404 gpio_set_value(64, 0);
406 gpio_set_value(64, 1);
411 int board_eth_init(bd_t *bis)
414 #ifdef CONFIG_SMC911X
415 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
420 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
421 int board_mmc_init(bd_t *bis)
423 return omap_mmc_init(0, 0, 0, -1, -1);