2 * (C) Copyright 2013 SAMSUNG Electronics
3 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
5 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch/board.h>
17 #include <asm/arch/cpu.h>
18 #include <asm/arch/dwmmc.h>
19 #include <asm/arch/gpio.h>
20 #include <asm/arch/mmc.h>
21 #include <asm/arch/pinmux.h>
22 #include <asm/arch/power.h>
23 #include <power/pmic.h>
24 #include <asm/arch/sromc.h>
25 #include <power/max77686_pmic.h>
27 DECLARE_GLOBAL_DATA_PTR;
29 #if defined CONFIG_EXYNOS_TMU
30 /* Boot Time Thermal Analysis for SoC temperature threshold breach */
31 static void boot_temp_check(void)
35 switch (tmu_monitor(&temp)) {
36 case TMU_STATUS_NORMAL:
38 case TMU_STATUS_TRIPPED:
40 * Status TRIPPED ans WARNING means corresponding threshold
43 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
47 case TMU_STATUS_WARNING:
48 puts("EXYNOS_TMU: WARNING! Temperature very high\n");
52 * TMU_STATUS_INIT means something is wrong with temperature
53 * sensing and TMU status was changed back from NORMAL to INIT.
55 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
58 debug("EXYNOS_TMU: Unknown TMU state\n");
65 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
66 #if defined CONFIG_EXYNOS_TMU
67 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
68 debug("%s: Failed to init TMU\n", __func__);
74 #ifdef CONFIG_EXYNOS_SPI
85 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
86 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
87 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
92 void dram_init_banksize(void)
97 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
98 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
99 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
101 gd->bd->bi_dram[i].start = addr;
102 gd->bd->bi_dram[i].size = size;
106 static int board_uart_init(void)
108 int err, uart_id, ret = 0;
110 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
111 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
113 debug("UART%d not configured\n",
114 (uart_id - PERIPH_ID_UART0));
121 #ifdef CONFIG_BOARD_EARLY_INIT_F
122 int board_early_init_f(void)
126 err = board_uart_init();
128 debug("UART init failed\n");
132 #ifdef CONFIG_SYS_I2C_INIT_BOARD
133 board_i2c_init(gd->fdt_blob);
140 #if defined(CONFIG_POWER)
141 #ifdef CONFIG_POWER_MAX77686
142 static int pmic_reg_update(struct pmic *p, int reg, uint regval)
147 ret = pmic_reg_read(p, reg, &val);
149 debug("%s: PMIC %d register read failed\n", __func__, reg);
153 ret = pmic_reg_write(p, reg, val);
155 debug("%s: PMIC %d register write failed\n", __func__, reg);
161 static int max77686_init(void)
165 if (pmic_init(I2C_PMIC))
168 p = pmic_get("MAX77686_PMIC");
175 if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
178 if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
179 MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
183 if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
184 MAX77686_BUCK1OUT_1V)) {
185 debug("%s: PMIC %d register write failed\n", __func__,
186 MAX77686_REG_PMIC_BUCK1OUT);
190 if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
191 MAX77686_BUCK1CTRL_EN))
195 if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
196 MAX77686_BUCK2DVS1_1_3V)) {
197 debug("%s: PMIC %d register write failed\n", __func__,
198 MAX77686_REG_PMIC_BUCK2DVS1);
202 if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
203 MAX77686_BUCK2CTRL_ON))
207 if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
208 MAX77686_BUCK3DVS1_1_0125V)) {
209 debug("%s: PMIC %d register write failed\n", __func__,
210 MAX77686_REG_PMIC_BUCK3DVS1);
214 if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
215 MAX77686_BUCK3CTRL_ON))
219 if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
220 MAX77686_BUCK4DVS1_1_2V)) {
221 debug("%s: PMIC %d register write failed\n", __func__,
222 MAX77686_REG_PMIC_BUCK4DVS1);
226 if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
227 MAX77686_BUCK3CTRL_ON))
231 if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
232 MAX77686_LD02CTRL1_1_5V | EN_LDO))
236 if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
237 MAX77686_LD03CTRL1_1_8V | EN_LDO))
241 if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
242 MAX77686_LD05CTRL1_1_8V | EN_LDO))
246 if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
247 MAX77686_LD10CTRL1_1_8V | EN_LDO))
254 int power_init_board(void)
260 #ifdef CONFIG_POWER_MAX77686
261 ret = max77686_init();
268 #ifdef CONFIG_OF_CONTROL
269 static int decode_sromc(const void *blob, struct fdt_sromc *config)
274 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
276 debug("Could not find SROMC node\n");
280 config->bank = fdtdec_get_int(blob, node, "bank", 0);
281 config->width = fdtdec_get_int(blob, node, "width", 2);
283 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
284 FDT_SROM_TIMING_COUNT);
286 debug("Could not decode SROMC configuration Error: %s\n",
288 return -FDT_ERR_NOTFOUND;
293 int board_eth_init(bd_t *bis)
295 #ifdef CONFIG_SMC911X
296 u32 smc_bw_conf, smc_bc_conf;
297 struct fdt_sromc config;
298 fdt_addr_t base_addr;
301 node = decode_sromc(gd->fdt_blob, &config);
303 debug("%s: Could not find sromc configuration\n", __func__);
306 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
308 debug("%s: Could not find lan9215 configuration\n", __func__);
312 /* We now have a node, so any problems from now on are errors */
313 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
314 if (base_addr == FDT_ADDR_T_NONE) {
315 debug("%s: Could not find lan9215 address\n", __func__);
319 /* Ethernet needs data bus width of 16 bits */
320 if (config.width != 2) {
321 debug("%s: Unsupported bus width %d\n", __func__,
325 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
326 | SROMC_BYTE_ENABLE(config.bank);
328 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
329 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
330 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
331 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
332 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
333 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
334 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
336 /* Select and configure the SROMC bank */
337 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
338 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
339 return smc911x_initialize(0, base_addr);
344 #ifdef CONFIG_GENERIC_MMC
345 int board_mmc_init(bd_t *bis)
349 /* dwmmc initializattion for available channels */
350 ret = exynos_dwmmc_init(gd->fdt_blob);
352 debug("dwmmc init failed\n");
359 #ifdef CONFIG_BOARD_LATE_INIT
360 int board_late_init(void)
362 stdio_print_current_devices();
364 if (cros_ec_get_error()) {
365 /* Force console on */
366 gd->flags &= ~GD_FLG_SILENT;
368 printf("cros-ec communications failure %d\n",
369 cros_ec_get_error());
370 puts("\nPlease reset with Power+Refresh\n\n");
371 panic("Cannot init cros-ec device");
378 int arch_early_init_r(void)
380 #ifdef CONFIG_CROS_EC
381 if (cros_ec_board_init()) {
382 printf("%s: Failed to init EC\n", __func__);