2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/adc.h>
31 #include <asm/arch/gpio.h>
32 #include <asm/arch/mmc.h>
33 #include <asm/arch/pinmux.h>
35 #include <usb/s3c_udc.h>
36 #include <asm/arch/cpu.h>
37 #include <max8998_pmic.h>
38 #include <asm/arch/watchdog.h>
41 #include <power/pmic.h>
42 #include <usb/s3c_udc.h>
43 #include <asm/arch/cpu.h>
44 #include <power/max8998_pmic.h>
46 DECLARE_GLOBAL_DATA_PTR;
48 struct exynos4_gpio_part1 *gpio1;
49 struct exynos4_gpio_part2 *gpio2;
50 unsigned int board_rev;
52 u32 get_board_rev(void)
57 static int get_hwrev(void)
59 return board_rev & 0xFF;
62 static void check_hw_revision(void);
66 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
67 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
69 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
70 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
73 printf("HW Revision:\t0x%x\n", board_rev);
78 int power_init_board(void)
82 ret = pmic_init(I2C_5);
91 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
92 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
97 void dram_init_banksize(void)
99 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
100 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
101 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
102 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
105 static unsigned short get_adc_value(int channel)
107 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
108 unsigned short ret = 0;
110 unsigned int loop = 0;
112 writel(channel & 0xF, &adc->adcmux);
113 writel((1 << 14) | (49 << 6), &adc->adccon);
114 writel(1000 & 0xffff, &adc->adcdly);
115 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
117 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
122 reg = readl(&adc->adccon);
123 } while (!(reg & (1 << 15)) && (loop++ < 1000));
125 ret = readl(&adc->adcdat0) & 0xFFF;
130 static int adc_power_control(int on)
133 struct pmic *p = pmic_get("MAX8998_PMIC");
140 ret = pmic_set_output(p,
147 static unsigned int get_hw_revision(void)
149 int hwrev, mode0, mode1;
151 adc_power_control(1);
153 mode0 = get_adc_value(1); /* HWREV_MODE0 */
154 mode1 = get_adc_value(2); /* HWREV_MODE1 */
157 * XXX Always set the default hwrev as the latest board
158 * ADC = (voltage) / 3.3 * 4096
162 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
163 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
164 hwrev = 0x0; /* 0.01V 0.01V */
165 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
166 hwrev = 0x1; /* 610mV 0.01V */
167 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
168 hwrev = 0x2; /* 1.16V 0.01V */
169 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
170 hwrev = 0x3; /* 1.79V 0.01V */
173 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
175 adc_power_control(0);
180 static void check_hw_revision(void)
184 hwrev = get_hw_revision();
189 #ifdef CONFIG_DISPLAY_BOARDINFO
192 puts("Board:\tUniversal C210\n");
197 #ifdef CONFIG_GENERIC_MMC
198 int board_mmc_init(bd_t *bis)
202 switch (get_hwrev()) {
205 * Set the low to enable LDO_EN
206 * But when you use the test board for eMMC booting
207 * you should set it HIGH since it removes the inverter
209 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
210 s5p_gpio_direction_output(&gpio1->e3, 6, 0);
214 * Default reset state is High and there's no inverter
215 * But set it as HIGH to ensure
217 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
218 s5p_gpio_direction_output(&gpio1->e1, 3, 1);
224 * mmc0 : eMMC (8-bit buswidth)
225 * mmc2 : SD card (4-bit buswidth)
227 err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
229 debug("SDMMC0 not configured\n");
231 err = s5p_mmc_init(0, 8);
234 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
235 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
238 * Check the T-flash detect pin
239 * GPX3[4] T-flash detect pin
241 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
242 err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
244 debug("SDMMC2 not configured\n");
246 err = s5p_mmc_init(2, 4);
254 #ifdef CONFIG_USB_GADGET
255 static int s5pc210_phy_control(int on)
258 struct pmic *p = pmic_get("MAX8998_PMIC");
266 ret |= pmic_set_output(p,
267 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
268 MAX8998_SAFEOUT1, LDO_ON);
269 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
270 MAX8998_LDO3, LDO_ON);
271 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
272 MAX8998_LDO8, LDO_ON);
275 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
276 MAX8998_LDO8, LDO_OFF);
277 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
278 MAX8998_LDO3, LDO_OFF);
279 ret |= pmic_set_output(p,
280 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
281 MAX8998_SAFEOUT1, LDO_OFF);
285 puts("MAX8998 LDO setting error!\n");
292 struct s3c_plat_otg_data s5pc210_otg_data = {
293 .phy_control = s5pc210_phy_control,
294 .regs_phy = EXYNOS4_USBPHY_BASE,
295 .regs_otg = EXYNOS4_USBOTG_BASE,
296 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
297 .usb_flags = PHY0_SLEEP,
301 int board_early_init_f(void)
308 #ifdef CONFIG_SOFT_SPI
309 static void soft_spi_init(void)
311 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
312 CONFIG_SOFT_SPI_MODE & SPI_CPOL);
313 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
314 gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
315 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
316 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
319 void spi_cs_activate(struct spi_slave *slave)
321 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
322 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
324 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
325 CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
328 void spi_cs_deactivate(struct spi_slave *slave)
330 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
331 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
334 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
336 return bus == 0 && cs == 0;
339 void universal_spi_scl(int bit)
341 gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
344 void universal_spi_sda(int bit)
346 gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
349 int universal_spi_read(void)
351 return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
355 static void init_pmic_lcd(void)
360 struct pmic *p = get_pmic();
366 val = 0x02; /* (1800 - 1600) / 100; */
367 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
370 val = 0xe; /* (3000 - 1600) / 100; */
371 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
373 /* Disable unneeded regulators */
376 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
377 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
380 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
383 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
384 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
387 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
390 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
391 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
394 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
397 puts("LCD pmic initialisation error!\n");
400 static void lcd_cfg_gpio(void)
402 unsigned int i, f3_end = 4;
404 for (i = 0; i < 8; i++) {
405 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
406 s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
407 s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
408 s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
409 /* pull-up/down disable */
410 s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
411 s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
412 s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
414 /* drive strength to max (24bit) */
415 s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
416 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
417 s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
418 s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
419 s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
420 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
423 for (i = 0; i < f3_end; i++) {
424 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
425 s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
426 /* pull-up/down disable */
427 s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
428 /* drive strength to max (24bit) */
429 s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
430 s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
433 /* gpio pad configuration for LCD reset. */
434 s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
439 static void reset_lcd(void)
441 s5p_gpio_set_value(&gpio2->y4, 5, 1);
443 s5p_gpio_set_value(&gpio2->y4, 5, 0);
445 s5p_gpio_set_value(&gpio2->y4, 5, 1);
449 static void lcd_power_on(void)
451 struct pmic *p = get_pmic();
456 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
457 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
460 vidinfo_t panel_info = {
466 .vl_clkp = CONFIG_SYS_HIGH,
467 .vl_hsp = CONFIG_SYS_HIGH,
468 .vl_vsp = CONFIG_SYS_HIGH,
469 .vl_dp = CONFIG_SYS_HIGH,
471 .vl_bpix = 5, /* Bits per pixel */
473 /* LD9040 LCD Panel */
481 .vl_cmd_allow_len = 0xf,
484 .cfg_gpio = lcd_cfg_gpio,
485 .backlight_on = NULL,
486 .lcd_power_on = lcd_power_on,
487 .reset_lcd = reset_lcd,
488 .dual_lcd_enabled = 0,
491 .power_on_delay = 10000,
492 .reset_delay = 10000,
493 .interface_mode = FIMD_RGB_INTERFACE,
497 void init_panel_info(vidinfo_t *vid)
500 vid->resolution = HD_RESOLUTION;
501 vid->rgb_mode = MODE_RGB_P;
504 get_tizen_logo_info(vid);
508 vid->pclk_name = 1; /* MPLL */
511 vid->cfg_ldo = ld9040_cfg_ldo;
512 vid->enable_ldo = ld9040_enable_ldo;
514 setenv("lcdinfo", "lcd=ld9040");
519 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
520 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
522 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
523 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
525 #if defined(CONFIG_PMIC)
529 #ifdef CONFIG_SOFT_SPI
533 printf("HW Revision:\t0x%x\n", board_rev);