board/ti/k2hk_evm/board.c

   1 /*
   2  * K2HK EVM : Board initialization
   3  *
   4  * (C) Copyright 2012-2014
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <exports.h>
  12 #include <fdt_support.h>
  13 #include <libfdt.h>
  14
  15 #include <asm/arch/hardware.h>
  16 #include <asm/arch/clock.h>
  17 #include <asm/io.h>
  18 #include <asm/mach-types.h>
  19 #include <asm/arch/emac_defs.h>
  20 #include <asm/arch/psc_defs.h>
  21 #include <asm/ti-common/ti-aemif.h>
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 u32 device_big_endian;
  26
  27 unsigned int external_clk[ext_clk_count] = {
  28         [sys_clk]       =       122880000,
  29         [alt_core_clk]  =       125000000,
  30         [pa_clk]        =       122880000,
  31         [tetris_clk]    =       125000000,
  32         [ddr3a_clk]     =       100000000,
  33         [ddr3b_clk]     =       100000000,
  34         [mcm_clk]       =       312500000,
  35         [pcie_clk]      =       100000000,
  36         [sgmii_srio_clk] =      156250000,
  37         [xgmii_clk]     =       156250000,
  38         [usb_clk]       =       100000000,
  39         [rp1_clk]       =       123456789    /* TODO: cannot find
  40                                                 what is that */
  41 };
  42
  43 static struct aemif_config aemif_configs[] = {
  44         {                       /* CS0 */
  45                 .mode           = AEMIF_MODE_NAND,
  46                 .wr_setup       = 0xf,
  47                 .wr_strobe      = 0x3f,
  48                 .wr_hold        = 7,
  49                 .rd_setup       = 0xf,
  50                 .rd_strobe      = 0x3f,
  51                 .rd_hold        = 7,
  52                 .turn_around    = 3,
  53                 .width          = AEMIF_WIDTH_8,
  54         },
  55
  56 };
  57
  58 static struct pll_init_data pll_config[] = {
  59         CORE_PLL_1228,
  60         PASS_PLL_983,
  61         TETRIS_PLL_1200,
  62 };
  63
  64 int dram_init(void)
  65 {
  66         init_ddr3();
  67
  68         gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  69                                     CONFIG_MAX_RAM_BANK_SIZE);
  70         aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
  71         return 0;
  72 }
  73
  74 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
  75 struct eth_priv_t eth_priv_cfg[] = {
  76         {
  77                 .int_name       = "K2HK_EMAC",
  78                 .rx_flow        = 22,
  79                 .phy_addr       = 0,
  80                 .slave_port     = 1,
  81                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
  82         },
  83         {
  84                 .int_name       = "K2HK_EMAC1",
  85                 .rx_flow        = 23,
  86                 .phy_addr       = 1,
  87                 .slave_port     = 2,
  88                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
  89         },
  90         {
  91                 .int_name       = "K2HK_EMAC2",
  92                 .rx_flow        = 24,
  93                 .phy_addr       = 2,
  94                 .slave_port     = 3,
  95                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
  96         },
  97         {
  98                 .int_name       = "K2HK_EMAC3",
  99                 .rx_flow        = 25,
 100                 .phy_addr       = 3,
 101                 .slave_port     = 4,
 102                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
 103         },
 104 };
 105
 106 int get_eth_env_param(char *env_name)
 107 {
 108         char *env;
 109         int  res = -1;
 110
 111         env = getenv(env_name);
 112         if (env)
 113                 res = simple_strtol(env, NULL, 0);
 114
 115         return res;
 116 }
 117
 118 int board_eth_init(bd_t *bis)
 119 {
 120         int     j;
 121         int     res;
 122         char    link_type_name[32];
 123
 124         for (j = 0; j < (sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t));
 125              j++) {
 126                 sprintf(link_type_name, "sgmii%d_link_type", j);
 127                 res = get_eth_env_param(link_type_name);
 128                 if (res >= 0)
 129                         eth_priv_cfg[j].sgmii_link_type = res;
 130
 131                 keystone2_emac_initialize(&eth_priv_cfg[j]);
 132         }
 133
 134         return 0;
 135 }
 136 #endif
 137
 138 /* Byte swap the 32-bit data if the device is BE */
 139 int cpu_to_bus(u32 *ptr, u32 length)
 140 {
 141         u32 i;
 142
 143         if (device_big_endian)
 144                 for (i = 0; i < length; i++, ptr++)
 145                         *ptr = __swab32(*ptr);
 146
 147         return 0;
 148 }
 149
 150 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 151 int board_early_init_f(void)
 152 {
 153         init_plls(ARRAY_SIZE(pll_config), pll_config);
 154         return 0;
 155 }
 156 #endif
 157
 158 int board_init(void)
 159 {
 160         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 161
 162         return 0;
 163 }
 164
 165 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 166 #define K2_DDR3_START_ADDR 0x80000000
 167 void ft_board_setup(void *blob, bd_t *bd)
 168 {
 169         u64 start[2];
 170         u64 size[2];
 171         char name[32], *env, *endp;
 172         int lpae, nodeoffset;
 173         u32 ddr3a_size;
 174         int nbanks;
 175
 176         env = getenv("mem_lpae");
 177         lpae = env && simple_strtol(env, NULL, 0);
 178
 179         ddr3a_size = 0;
 180         if (lpae) {
 181                 env = getenv("ddr3a_size");
 182                 if (env)
 183                         ddr3a_size = simple_strtol(env, NULL, 10);
 184                 if ((ddr3a_size != 8) && (ddr3a_size != 4))
 185                         ddr3a_size = 0;
 186         }
 187
 188         nbanks = 1;
 189         start[0] = bd->bi_dram[0].start;
 190         size[0]  = bd->bi_dram[0].size;
 191
 192         /* adjust memory start address for LPAE */
 193         if (lpae) {
 194                 start[0] -= K2_DDR3_START_ADDR;
 195                 start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
 196         }
 197
 198         if ((size[0] == 0x80000000) && (ddr3a_size != 0)) {
 199                 size[1] = ((u64)ddr3a_size - 2) << 30;
 200                 start[1] = 0x880000000;
 201                 nbanks++;
 202         }
 203
 204         /* reserve memory at start of bank */
 205         sprintf(name, "mem_reserve_head");
 206         env = getenv(name);
 207         if (env) {
 208                 start[0] += ustrtoul(env, &endp, 0);
 209                 size[0] -= ustrtoul(env, &endp, 0);
 210         }
 211
 212         sprintf(name, "mem_reserve");
 213         env = getenv(name);
 214         if (env)
 215                 size[0] -= ustrtoul(env, &endp, 0);
 216
 217         fdt_fixup_memory_banks(blob, start, size, nbanks);
 218
 219         /* Fix up the initrd */
 220         if (lpae) {
 221                 u64 initrd_start, initrd_end;
 222                 u32 *prop1, *prop2;
 223                 int err;
 224                 nodeoffset = fdt_path_offset(blob, "/chosen");
 225                 if (nodeoffset >= 0) {
 226                         prop1 = (u32 *)fdt_getprop(blob, nodeoffset,
 227                                             "linux,initrd-start", NULL);
 228                         prop2 = (u32 *)fdt_getprop(blob, nodeoffset,
 229                                             "linux,initrd-end", NULL);
 230                         if (prop1 && prop2) {
 231                                 initrd_start = __be32_to_cpu(*prop1);
 232                                 initrd_start -= K2_DDR3_START_ADDR;
 233                                 initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
 234                                 initrd_start = __cpu_to_be64(initrd_start);
 235                                 initrd_end = __be32_to_cpu(*prop2);
 236                                 initrd_end -= K2_DDR3_START_ADDR;
 237                                 initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
 238                                 initrd_end = __cpu_to_be64(initrd_end);
 239
 240                                 err = fdt_delprop(blob, nodeoffset,
 241                                                   "linux,initrd-start");
 242                                 if (err < 0)
 243                                         puts("error deleting initrd-start\n");
 244
 245                                 err = fdt_delprop(blob, nodeoffset,
 246                                                   "linux,initrd-end");
 247                                 if (err < 0)
 248                                         puts("error deleting initrd-end\n");
 249
 250                                 err = fdt_setprop(blob, nodeoffset,
 251                                                   "linux,initrd-start",
 252                                                   &initrd_start,
 253                                                   sizeof(initrd_start));
 254                                 if (err < 0)
 255                                         puts("error adding initrd-start\n");
 256
 257                                 err = fdt_setprop(blob, nodeoffset,
 258                                                   "linux,initrd-end",
 259                                                   &initrd_end,
 260                                                   sizeof(initrd_end));
 261                                 if (err < 0)
 262                                         puts("error adding linux,initrd-end\n");
 263                         }
 264                 }
 265         }
 266 }
 267
 268 void ft_board_setup_ex(void *blob, bd_t *bd)
 269 {
 270         int     lpae;
 271         char    *env;
 272         u64     *reserve_start, size;
 273
 274         env = getenv("mem_lpae");
 275         lpae = env && simple_strtol(env, NULL, 0);
 276
 277         if (lpae) {
 278                 /*
 279                  * the initrd and other reserved memory areas are
 280                  * embedded in in the DTB itslef. fix up these addresses
 281                  * to 36 bit format
 282                  */
 283                 reserve_start = (u64 *)((char *)blob +
 284                                        fdt_off_mem_rsvmap(blob));
 285                 while (1) {
 286                         *reserve_start = __cpu_to_be64(*reserve_start);
 287                         size = __cpu_to_be64(*(reserve_start + 1));
 288                         if (size) {
 289                                 *reserve_start -= K2_DDR3_START_ADDR;
 290                                 *reserve_start +=
 291                                         CONFIG_SYS_LPAE_SDRAM_BASE;
 292                                 *reserve_start =
 293                                         __cpu_to_be64(*reserve_start);
 294                         } else {
 295                                 break;
 296                         }
 297                         reserve_start += 2;
 298                 }
 299         }
 300 }
 301 #endif