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mgsuvd: fix compiler warning when using soft_i2c driver
[karo-tx-uboot.git] / drivers / i2c / soft_i2c.c
1 /*
2  * (C) Copyright 2001, 2002
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  *
23  * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24  * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
25  * Neil Russell.
26  */
27
28 #include <common.h>
29 #ifdef  CONFIG_MPC8260                  /* only valid for MPC8260 */
30 #include <ioports.h>
31 #include <asm/io.h>
32 #endif
33 #ifdef  CONFIG_AT91RM9200               /* need this for the at91rm9200 */
34 #include <asm/io.h>
35 #include <asm/arch/hardware.h>
36 #endif
37 #ifdef  CONFIG_IXP425                   /* only valid for IXP425 */
38 #include <asm/arch/ixp425.h>
39 #endif
40 #ifdef CONFIG_LPC2292
41 #include <asm/arch/hardware.h>
42 #endif
43 #ifdef  CONFIG_MPC866                   /* only valid for MPC866 */
44 #include <asm/io.h>
45 #endif
46 #include <i2c.h>
47
48 /* #define      DEBUG_I2C       */
49
50 #ifdef DEBUG_I2C
51 DECLARE_GLOBAL_DATA_PTR;
52 #endif
53
54
55 /*-----------------------------------------------------------------------
56  * Definitions
57  */
58
59 #define RETRIES         0
60
61
62 #define I2C_ACK         0               /* PD_SDA level to ack a byte */
63 #define I2C_NOACK       1               /* PD_SDA level to noack a byte */
64
65
66 #ifdef DEBUG_I2C
67 #define PRINTD(fmt,args...)     do {    \
68         if (gd->have_console)           \
69                 printf (fmt ,##args);   \
70         } while (0)
71 #else
72 #define PRINTD(fmt,args...)
73 #endif
74
75 #if defined(CONFIG_I2C_MULTI_BUS)
76 static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
77 #endif /* CONFIG_I2C_MULTI_BUS */
78
79 /*-----------------------------------------------------------------------
80  * Local functions
81  */
82 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
83 static void  send_reset (void);
84 #endif
85 static void  send_start (void);
86 static void  send_stop  (void);
87 static void  send_ack   (int);
88 static int   write_byte (uchar byte);
89 static uchar read_byte  (int);
90
91 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
92 /*-----------------------------------------------------------------------
93  * Send a reset sequence consisting of 9 clocks with the data signal high
94  * to clock any confused device back into an idle state.  Also send a
95  * <stop> at the end of the sequence for belts & suspenders.
96  */
97 static void send_reset(void)
98 {
99         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
100         int j;
101
102         I2C_SCL(1);
103         I2C_SDA(1);
104 #ifdef  I2C_INIT
105         I2C_INIT;
106 #endif
107         I2C_TRISTATE;
108         for(j = 0; j < 9; j++) {
109                 I2C_SCL(0);
110                 I2C_DELAY;
111                 I2C_DELAY;
112                 I2C_SCL(1);
113                 I2C_DELAY;
114                 I2C_DELAY;
115         }
116         send_stop();
117         I2C_TRISTATE;
118 }
119 #endif
120
121 /*-----------------------------------------------------------------------
122  * START: High -> Low on SDA while SCL is High
123  */
124 static void send_start(void)
125 {
126         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
127
128         I2C_DELAY;
129         I2C_SDA(1);
130         I2C_ACTIVE;
131         I2C_DELAY;
132         I2C_SCL(1);
133         I2C_DELAY;
134         I2C_SDA(0);
135         I2C_DELAY;
136 }
137
138 /*-----------------------------------------------------------------------
139  * STOP: Low -> High on SDA while SCL is High
140  */
141 static void send_stop(void)
142 {
143         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
144
145         I2C_SCL(0);
146         I2C_DELAY;
147         I2C_SDA(0);
148         I2C_ACTIVE;
149         I2C_DELAY;
150         I2C_SCL(1);
151         I2C_DELAY;
152         I2C_SDA(1);
153         I2C_DELAY;
154         I2C_TRISTATE;
155 }
156
157
158 /*-----------------------------------------------------------------------
159  * ack should be I2C_ACK or I2C_NOACK
160  */
161 static void send_ack(int ack)
162 {
163         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
164
165         I2C_SCL(0);
166         I2C_DELAY;
167         I2C_ACTIVE;
168         I2C_SDA(ack);
169         I2C_DELAY;
170         I2C_SCL(1);
171         I2C_DELAY;
172         I2C_DELAY;
173         I2C_SCL(0);
174         I2C_DELAY;
175 }
176
177
178 /*-----------------------------------------------------------------------
179  * Send 8 bits and look for an acknowledgement.
180  */
181 static int write_byte(uchar data)
182 {
183         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
184         int j;
185         int nack;
186
187         I2C_ACTIVE;
188         for(j = 0; j < 8; j++) {
189                 I2C_SCL(0);
190                 I2C_DELAY;
191                 I2C_SDA(data & 0x80);
192                 I2C_DELAY;
193                 I2C_SCL(1);
194                 I2C_DELAY;
195                 I2C_DELAY;
196
197                 data <<= 1;
198         }
199
200         /*
201          * Look for an <ACK>(negative logic) and return it.
202          */
203         I2C_SCL(0);
204         I2C_DELAY;
205         I2C_SDA(1);
206         I2C_TRISTATE;
207         I2C_DELAY;
208         I2C_SCL(1);
209         I2C_DELAY;
210         I2C_DELAY;
211         nack = I2C_READ;
212         I2C_SCL(0);
213         I2C_DELAY;
214         I2C_ACTIVE;
215
216         return(nack);   /* not a nack is an ack */
217 }
218
219 #if defined(CONFIG_I2C_MULTI_BUS)
220 /*
221  * Functions for multiple I2C bus handling
222  */
223 unsigned int i2c_get_bus_num(void)
224 {
225         return i2c_bus_num;
226 }
227
228 int i2c_set_bus_num(unsigned int bus)
229 {
230 #if defined(CONFIG_I2C_MUX)
231         if (bus < CONFIG_SYS_MAX_I2C_BUS) {
232                 i2c_bus_num = bus;
233         } else {
234                 int     ret;
235
236                 ret = i2x_mux_select_mux(bus);
237                 if (ret == 0)
238                         i2c_bus_num = bus;
239                 else
240                         return ret;
241         }
242 #else
243         if (bus >= CONFIG_SYS_MAX_I2C_BUS)
244                 return -1;
245         i2c_bus_num = bus;
246 #endif
247         return 0;
248 }
249
250 /* TODO: add 100/400k switching */
251 unsigned int i2c_get_bus_speed(void)
252 {
253         return CONFIG_SYS_I2C_SPEED;
254 }
255
256 int i2c_set_bus_speed(unsigned int speed)
257 {
258         if (speed != CONFIG_SYS_I2C_SPEED)
259                 return -1;
260
261         return 0;
262 }
263 #endif
264
265 /*-----------------------------------------------------------------------
266  * if ack == I2C_ACK, ACK the byte so can continue reading, else
267  * send I2C_NOACK to end the read.
268  */
269 static uchar read_byte(int ack)
270 {
271         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
272         int  data;
273         int  j;
274
275         /*
276          * Read 8 bits, MSB first.
277          */
278         I2C_TRISTATE;
279         I2C_SDA(1);
280         data = 0;
281         for(j = 0; j < 8; j++) {
282                 I2C_SCL(0);
283                 I2C_DELAY;
284                 I2C_SCL(1);
285                 I2C_DELAY;
286                 data <<= 1;
287                 data |= I2C_READ;
288                 I2C_DELAY;
289         }
290         send_ack(ack);
291
292         return(data);
293 }
294
295 /*=====================================================================*/
296 /*                         Public Functions                            */
297 /*=====================================================================*/
298
299 /*-----------------------------------------------------------------------
300  * Initialization
301  */
302 void i2c_init (int speed, int slaveaddr)
303 {
304 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
305         /* call board specific i2c bus reset routine before accessing the   */
306         /* environment, which might be in a chip on that bus. For details   */
307         /* about this problem see doc/I2C_Edge_Conditions.                  */
308         i2c_init_board();
309 #else
310         /*
311          * WARNING: Do NOT save speed in a static variable: if the
312          * I2C routines are called before RAM is initialized (to read
313          * the DIMM SPD, for instance), RAM won't be usable and your
314          * system will crash.
315          */
316         send_reset ();
317 #endif
318 }
319
320 /*-----------------------------------------------------------------------
321  * Probe to see if a chip is present.  Also good for checking for the
322  * completion of EEPROM writes since the chip stops responding until
323  * the write completes (typically 10mSec).
324  */
325 int i2c_probe(uchar addr)
326 {
327         int rc;
328
329         /*
330          * perform 1 byte write transaction with just address byte
331          * (fake write)
332          */
333         send_start();
334         rc = write_byte ((addr << 1) | 0);
335         send_stop();
336
337         return (rc ? 1 : 0);
338 }
339
340 /*-----------------------------------------------------------------------
341  * Read bytes
342  */
343 int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
344 {
345         int shift;
346         PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
347                 chip, addr, alen, buffer, len);
348
349 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
350         /*
351          * EEPROM chips that implement "address overflow" are ones
352          * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
353          * address and the extra bits end up in the "chip address"
354          * bit slots. This makes a 24WC08 (1Kbyte) chip look like
355          * four 256 byte chips.
356          *
357          * Note that we consider the length of the address field to
358          * still be one byte because the extra address bits are
359          * hidden in the chip address.
360          */
361         chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
362
363         PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
364                 chip, addr);
365 #endif
366
367         /*
368          * Do the addressing portion of a write cycle to set the
369          * chip's address pointer.  If the address length is zero,
370          * don't do the normal write cycle to set the address pointer,
371          * there is no address pointer in this chip.
372          */
373         send_start();
374         if(alen > 0) {
375                 if(write_byte(chip << 1)) {     /* write cycle */
376                         send_stop();
377                         PRINTD("i2c_read, no chip responded %02X\n", chip);
378                         return(1);
379                 }
380                 shift = (alen-1) * 8;
381                 while(alen-- > 0) {
382                         if(write_byte(addr >> shift)) {
383                                 PRINTD("i2c_read, address not <ACK>ed\n");
384                                 return(1);
385                         }
386                         shift -= 8;
387                 }
388                 send_stop();    /* reportedly some chips need a full stop */
389                 send_start();
390         }
391         /*
392          * Send the chip address again, this time for a read cycle.
393          * Then read the data.  On the last byte, we do a NACK instead
394          * of an ACK(len == 0) to terminate the read.
395          */
396         write_byte((chip << 1) | 1);    /* read cycle */
397         while(len-- > 0) {
398                 *buffer++ = read_byte(len == 0);
399         }
400         send_stop();
401         return(0);
402 }
403
404 /*-----------------------------------------------------------------------
405  * Write bytes
406  */
407 int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
408 {
409         int shift, failures = 0;
410
411         PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
412                 chip, addr, alen, buffer, len);
413
414         send_start();
415         if(write_byte(chip << 1)) {     /* write cycle */
416                 send_stop();
417                 PRINTD("i2c_write, no chip responded %02X\n", chip);
418                 return(1);
419         }
420         shift = (alen-1) * 8;
421         while(alen-- > 0) {
422                 if(write_byte(addr >> shift)) {
423                         PRINTD("i2c_write, address not <ACK>ed\n");
424                         return(1);
425                 }
426                 shift -= 8;
427         }
428
429         while(len-- > 0) {
430                 if(write_byte(*buffer++)) {
431                         failures++;
432                 }
433         }
434         send_stop();
435         return(failures);
436 }
437
438 /*-----------------------------------------------------------------------
439  * Read a register
440  */
441 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
442 {
443         uchar buf;
444
445         i2c_read(i2c_addr, reg, 1, &buf, 1);
446
447         return(buf);
448 }
449
450 /*-----------------------------------------------------------------------
451  * Write a register
452  */
453 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
454 {
455         i2c_write(i2c_addr, reg, 1, &val, 1);
456 }