drivers/misc/mxc_ocotp.c

   1 /*
   2  * (C) Copyright 2013 ADVANSEE
   3  * Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
   4  *
   5  * Based on Dirk Behme's
   6  * https://github.com/dirkbehme/u-boot-imx6/blob/28b17e9/drivers/misc/imx_otp.c,
   7  * which is based on Freescale's
   8  * http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/misc/imx_otp.c?h=imx_v2009.08_1.1.0&id=9aa74e6,
   9  * which is:
  10  * Copyright (C) 2011 Freescale Semiconductor, Inc.
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #include <common.h>
  16 #include <fuse.h>
  17 #include <asm/errno.h>
  18 #include <asm/io.h>
  19 #include <asm/arch/clock.h>
  20 #include <asm/arch/imx-regs.h>
  21
  22 #define BO_CTRL_WR_UNLOCK               16
  23 #define BM_CTRL_WR_UNLOCK               0xffff0000
  24 #define BV_CTRL_WR_UNLOCK_KEY           0x3e77
  25 #define BM_CTRL_ERROR                   0x00000200
  26 #define BM_CTRL_BUSY                    0x00000100
  27 #define BO_CTRL_ADDR                    0
  28 #define BM_CTRL_ADDR                    0x0000007f
  29
  30 #define BO_TIMING_STROBE_READ           16
  31 #define BM_TIMING_STROBE_READ           0x003f0000
  32 #define BV_TIMING_STROBE_READ_NS        37
  33 #define BO_TIMING_RELAX                 12
  34 #define BM_TIMING_RELAX                 0x0000f000
  35 #define BV_TIMING_RELAX_NS              17
  36 #define BO_TIMING_STROBE_PROG           0
  37 #define BM_TIMING_STROBE_PROG           0x00000fff
  38 #define BV_TIMING_STROBE_PROG_US        10
  39
  40 #define BM_READ_CTRL_READ_FUSE          0x00000001
  41
  42 #define BF(value, field)                (((value) << BO_##field) & BM_##field)
  43
  44 #define WRITE_POSTAMBLE_US              2
  45
  46 static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us)
  47 {
  48         while (readl(&regs->ctrl) & BM_CTRL_BUSY)
  49                 udelay(delay_us);
  50 }
  51
  52 static void clear_error(struct ocotp_regs *regs)
  53 {
  54         writel(BM_CTRL_ERROR, &regs->ctrl_clr);
  55 }
  56
  57 static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word,
  58                                 int assert, const char *caller)
  59 {
  60         *regs = (struct ocotp_regs *)OCOTP_BASE_ADDR;
  61
  62         if (bank >= ARRAY_SIZE((*regs)->bank) ||
  63                         word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) ||
  64                         !assert) {
  65                 printf("mxc_ocotp %s(): Invalid argument\n", caller);
  66                 return -EINVAL;
  67         }
  68
  69         enable_ocotp_clk(1);
  70
  71         wait_busy(*regs, 1);
  72         clear_error(*regs);
  73
  74         return 0;
  75 }
  76
  77 static int finish_access(struct ocotp_regs *regs, const char *caller)
  78 {
  79         u32 err;
  80
  81         err = !!(readl(&regs->ctrl) & BM_CTRL_ERROR);
  82         clear_error(regs);
  83         enable_ocotp_clk(0);
  84
  85         if (err) {
  86                 printf("mxc_ocotp %s(): Access protect error\n", caller);
  87                 return -EIO;
  88         }
  89
  90         return 0;
  91 }
  92
  93 static int prepare_read(struct ocotp_regs **regs, u32 bank, u32 word, u32 *val,
  94                         const char *caller)
  95 {
  96         return prepare_access(regs, bank, word, val != NULL, caller);
  97 }
  98
  99 int fuse_read(u32 bank, u32 word, u32 *val)
 100 {
 101         struct ocotp_regs *regs;
 102         int ret;
 103
 104         ret = prepare_read(&regs, bank, word, val, __func__);
 105         if (ret)
 106                 return ret;
 107
 108         *val = readl(&regs->bank[bank].fuse_regs[word << 2]);
 109
 110         return finish_access(regs, __func__);
 111 }
 112
 113 static void set_timing(struct ocotp_regs *regs)
 114 {
 115         u32 ipg_clk;
 116         u32 relax, strobe_read, strobe_prog;
 117         u32 timing;
 118
 119         ipg_clk = mxc_get_clock(MXC_IPG_CLK);
 120
 121         relax = DIV_ROUND_UP(ipg_clk * BV_TIMING_RELAX_NS, 1000000000) - 1;
 122         strobe_read = DIV_ROUND_UP(ipg_clk * BV_TIMING_STROBE_READ_NS,
 123                                         1000000000) + 2 * (relax + 1) - 1;
 124         strobe_prog = DIV_ROUND_CLOSEST(ipg_clk * BV_TIMING_STROBE_PROG_US,
 125                                                 1000000) + 2 * (relax + 1) - 1;
 126
 127         timing = BF(strobe_read, TIMING_STROBE_READ) |
 128                         BF(relax, TIMING_RELAX) |
 129                         BF(strobe_prog, TIMING_STROBE_PROG);
 130
 131         clrsetbits_le32(&regs->timing, BM_TIMING_STROBE_READ | BM_TIMING_RELAX |
 132                         BM_TIMING_STROBE_PROG, timing);
 133 }
 134
 135 static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word,
 136                                 int write)
 137 {
 138         u32 wr_unlock = write ? BV_CTRL_WR_UNLOCK_KEY : 0;
 139         u32 addr = bank << 3 | word;
 140
 141         set_timing(regs);
 142         clrsetbits_le32(&regs->ctrl, BM_CTRL_WR_UNLOCK | BM_CTRL_ADDR,
 143                         BF(wr_unlock, CTRL_WR_UNLOCK) |
 144                         BF(addr, CTRL_ADDR));
 145 }
 146
 147 int fuse_sense(u32 bank, u32 word, u32 *val)
 148 {
 149         struct ocotp_regs *regs;
 150         int ret;
 151
 152         ret = prepare_read(&regs, bank, word, val, __func__);
 153         if (ret)
 154                 return ret;
 155
 156         setup_direct_access(regs, bank, word, false);
 157         writel(BM_READ_CTRL_READ_FUSE, &regs->read_ctrl);
 158         wait_busy(regs, 1);
 159         *val = readl(&regs->read_fuse_data);
 160
 161         return finish_access(regs, __func__);
 162 }
 163
 164 static int prepare_write(struct ocotp_regs **regs, u32 bank, u32 word,
 165                                 const char *caller)
 166 {
 167         return prepare_access(regs, bank, word, true, caller);
 168 }
 169
 170 int fuse_prog(u32 bank, u32 word, u32 val)
 171 {
 172         struct ocotp_regs *regs;
 173         int ret;
 174
 175         ret = prepare_write(&regs, bank, word, __func__);
 176         if (ret)
 177                 return ret;
 178
 179         setup_direct_access(regs, bank, word, true);
 180         writel(val, &regs->data);
 181         wait_busy(regs, BV_TIMING_STROBE_PROG_US);
 182         udelay(WRITE_POSTAMBLE_US);
 183
 184         return finish_access(regs, __func__);
 185 }
 186
 187 int fuse_override(u32 bank, u32 word, u32 val)
 188 {
 189         struct ocotp_regs *regs;
 190         int ret;
 191
 192         ret = prepare_write(&regs, bank, word, __func__);
 193         if (ret)
 194                 return ret;
 195
 196         writel(val, &regs->bank[bank].fuse_regs[word << 2]);
 197
 198         return finish_access(regs, __func__);
 199 }