]> git.kernelconcepts.de Git - karo-tx-uboot.git/blob - drivers/mtd/cfi_flash.c
cfi_flash: avoid flash_verbose when possible
[karo-tx-uboot.git] / drivers / mtd / cfi_flash.c
1 /*
2  * (C) Copyright 2002-2004
3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4  *
5  * Copyright (C) 2003 Arabella Software Ltd.
6  * Yuli Barcohen <yuli@arabellasw.com>
7  *
8  * Copyright (C) 2004
9  * Ed Okerson
10  *
11  * Copyright (C) 2006
12  * Tolunay Orkun <listmember@orkun.us>
13  *
14  * See file CREDITS for list of people who contributed to this
15  * project.
16  *
17  * This program is free software; you can redistribute it and/or
18  * modify it under the terms of the GNU General Public License as
19  * published by the Free Software Foundation; either version 2 of
20  * the License, or (at your option) any later version.
21  *
22  * This program is distributed in the hope that it will be useful,
23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
25  * GNU General Public License for more details.
26  *
27  * You should have received a copy of the GNU General Public License
28  * along with this program; if not, write to the Free Software
29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30  * MA 02111-1307 USA
31  *
32  */
33
34 /* The DEBUG define must be before common to enable debugging */
35 /* #define DEBUG        */
36
37 #include <common.h>
38 #include <asm/processor.h>
39 #include <asm/io.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #include <mtd/cfi_flash.h>
43
44 /*
45  * This file implements a Common Flash Interface (CFI) driver for
46  * U-Boot.
47  *
48  * The width of the port and the width of the chips are determined at
49  * initialization.  These widths are used to calculate the address for
50  * access CFI data structures.
51  *
52  * References
53  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57  * AMD CFI Specification, Release 2.0 December 1, 2001
58  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
60  *
61  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62  * reading and writing ... (yes there is such a Hardware).
63  */
64
65 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
66 #ifdef CONFIG_FLASH_CFI_MTD
67 static uint flash_verbose = 1;
68 #else
69 #define flash_verbose 1
70 #endif
71
72 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
73
74 /*
75  * Check if chip width is defined. If not, start detecting with 8bit.
76  */
77 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
78 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
79 #endif
80
81 /*
82  * 0xffff is an undefined value for the configuration register. When
83  * this value is returned, the configuration register shall not be
84  * written at all (default mode).
85  */
86 static u16 cfi_flash_config_reg(int i)
87 {
88 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
89         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
90 #else
91         return 0xffff;
92 #endif
93 }
94
95 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
96 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
97 #endif
98
99 static phys_addr_t __cfi_flash_bank_addr(int i)
100 {
101         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
102 }
103 phys_addr_t cfi_flash_bank_addr(int i)
104         __attribute__((weak, alias("__cfi_flash_bank_addr")));
105
106 static unsigned long __cfi_flash_bank_size(int i)
107 {
108 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
109         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
110 #else
111         return 0;
112 #endif
113 }
114 unsigned long cfi_flash_bank_size(int i)
115         __attribute__((weak, alias("__cfi_flash_bank_size")));
116
117 static void __flash_write8(u8 value, void *addr)
118 {
119         __raw_writeb(value, addr);
120 }
121
122 static void __flash_write16(u16 value, void *addr)
123 {
124         __raw_writew(value, addr);
125 }
126
127 static void __flash_write32(u32 value, void *addr)
128 {
129         __raw_writel(value, addr);
130 }
131
132 static void __flash_write64(u64 value, void *addr)
133 {
134         /* No architectures currently implement __raw_writeq() */
135         *(volatile u64 *)addr = value;
136 }
137
138 static u8 __flash_read8(void *addr)
139 {
140         return __raw_readb(addr);
141 }
142
143 static u16 __flash_read16(void *addr)
144 {
145         return __raw_readw(addr);
146 }
147
148 static u32 __flash_read32(void *addr)
149 {
150         return __raw_readl(addr);
151 }
152
153 static u64 __flash_read64(void *addr)
154 {
155         /* No architectures currently implement __raw_readq() */
156         return *(volatile u64 *)addr;
157 }
158
159 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
160 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
161 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
162 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
163 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
164 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
165 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
166 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
167 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
168 #else
169 #define flash_write8    __flash_write8
170 #define flash_write16   __flash_write16
171 #define flash_write32   __flash_write32
172 #define flash_write64   __flash_write64
173 #define flash_read8     __flash_read8
174 #define flash_read16    __flash_read16
175 #define flash_read32    __flash_read32
176 #define flash_read64    __flash_read64
177 #endif
178
179 /*-----------------------------------------------------------------------
180  */
181 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
182 flash_info_t *flash_get_info(ulong base)
183 {
184         int i;
185         flash_info_t *info = NULL;
186
187         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
188                 info = & flash_info[i];
189                 if (info->size && info->start[0] <= base &&
190                     base <= info->start[0] + info->size - 1)
191                         break;
192         }
193
194         return info;
195 }
196 #endif
197
198 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
199 {
200         if (sect != (info->sector_count - 1))
201                 return info->start[sect + 1] - info->start[sect];
202         else
203                 return info->start[0] + info->size - info->start[sect];
204 }
205
206 /*-----------------------------------------------------------------------
207  * create an address based on the offset and the port width
208  */
209 static inline void *
210 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
211 {
212         unsigned int byte_offset = offset * info->portwidth;
213
214         return (void *)(info->start[sect] + byte_offset);
215 }
216
217 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
218                 unsigned int offset, void *addr)
219 {
220 }
221
222 /*-----------------------------------------------------------------------
223  * make a proper sized command based on the port and chip widths
224  */
225 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
226 {
227         int i;
228         int cword_offset;
229         int cp_offset;
230 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
231         u32 cmd_le = cpu_to_le32(cmd);
232 #endif
233         uchar val;
234         uchar *cp = (uchar *) cmdbuf;
235
236         for (i = info->portwidth; i > 0; i--){
237                 cword_offset = (info->portwidth-i)%info->chipwidth;
238 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
239                 cp_offset = info->portwidth - i;
240                 val = *((uchar*)&cmd_le + cword_offset);
241 #else
242                 cp_offset = i - 1;
243                 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
244 #endif
245                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
246         }
247 }
248
249 #ifdef DEBUG
250 /*-----------------------------------------------------------------------
251  * Debug support
252  */
253 static void print_longlong (char *str, unsigned long long data)
254 {
255         int i;
256         char *cp;
257
258         cp = (char *) &data;
259         for (i = 0; i < 8; i++)
260                 sprintf (&str[i * 2], "%2.2x", *cp++);
261 }
262
263 static void flash_printqry (struct cfi_qry *qry)
264 {
265         u8 *p = (u8 *)qry;
266         int x, y;
267
268         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
269                 debug("%02x : ", x);
270                 for (y = 0; y < 16; y++)
271                         debug("%2.2x ", p[x + y]);
272                 debug(" ");
273                 for (y = 0; y < 16; y++) {
274                         unsigned char c = p[x + y];
275                         if (c >= 0x20 && c <= 0x7e)
276                                 debug("%c", c);
277                         else
278                                 debug(".");
279                 }
280                 debug("\n");
281         }
282 }
283 #endif
284
285
286 /*-----------------------------------------------------------------------
287  * read a character at a port width address
288  */
289 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
290 {
291         uchar *cp;
292         uchar retval;
293
294         cp = flash_map (info, 0, offset);
295 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
296         retval = flash_read8(cp);
297 #else
298         retval = flash_read8(cp + info->portwidth - 1);
299 #endif
300         flash_unmap (info, 0, offset, cp);
301         return retval;
302 }
303
304 /*-----------------------------------------------------------------------
305  * read a word at a port width address, assume 16bit bus
306  */
307 static inline ushort flash_read_word (flash_info_t * info, uint offset)
308 {
309         ushort *addr, retval;
310
311         addr = flash_map (info, 0, offset);
312         retval = flash_read16 (addr);
313         flash_unmap (info, 0, offset, addr);
314         return retval;
315 }
316
317
318 /*-----------------------------------------------------------------------
319  * read a long word by picking the least significant byte of each maximum
320  * port size word. Swap for ppc format.
321  */
322 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
323                               uint offset)
324 {
325         uchar *addr;
326         ulong retval;
327
328 #ifdef DEBUG
329         int x;
330 #endif
331         addr = flash_map (info, sect, offset);
332
333 #ifdef DEBUG
334         debug ("long addr is at %p info->portwidth = %d\n", addr,
335                info->portwidth);
336         for (x = 0; x < 4 * info->portwidth; x++) {
337                 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
338         }
339 #endif
340 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
341         retval = ((flash_read8(addr) << 16) |
342                   (flash_read8(addr + info->portwidth) << 24) |
343                   (flash_read8(addr + 2 * info->portwidth)) |
344                   (flash_read8(addr + 3 * info->portwidth) << 8));
345 #else
346         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
347                   (flash_read8(addr + info->portwidth - 1) << 16) |
348                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
349                   (flash_read8(addr + 3 * info->portwidth - 1)));
350 #endif
351         flash_unmap(info, sect, offset, addr);
352
353         return retval;
354 }
355
356 /*
357  * Write a proper sized command to the correct address
358  */
359 void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
360                       uint offset, u32 cmd)
361 {
362
363         void *addr;
364         cfiword_t cword;
365
366         addr = flash_map (info, sect, offset);
367         flash_make_cmd (info, cmd, &cword);
368         switch (info->portwidth) {
369         case FLASH_CFI_8BIT:
370                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
371                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
372                 flash_write8(cword.c, addr);
373                 break;
374         case FLASH_CFI_16BIT:
375                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
376                        cmd, cword.w,
377                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
378                 flash_write16(cword.w, addr);
379                 break;
380         case FLASH_CFI_32BIT:
381                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
382                        cmd, cword.l,
383                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
384                 flash_write32(cword.l, addr);
385                 break;
386         case FLASH_CFI_64BIT:
387 #ifdef DEBUG
388                 {
389                         char str[20];
390
391                         print_longlong (str, cword.ll);
392
393                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
394                                addr, cmd, str,
395                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
396                 }
397 #endif
398                 flash_write64(cword.ll, addr);
399                 break;
400         }
401
402         /* Ensure all the instructions are fully finished */
403         sync();
404
405         flash_unmap(info, sect, offset, addr);
406 }
407
408 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
409 {
410         flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
411         flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
412 }
413
414 /*-----------------------------------------------------------------------
415  */
416 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
417                           uint offset, uchar cmd)
418 {
419         void *addr;
420         cfiword_t cword;
421         int retval;
422
423         addr = flash_map (info, sect, offset);
424         flash_make_cmd (info, cmd, &cword);
425
426         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
427         switch (info->portwidth) {
428         case FLASH_CFI_8BIT:
429                 debug ("is= %x %x\n", flash_read8(addr), cword.c);
430                 retval = (flash_read8(addr) == cword.c);
431                 break;
432         case FLASH_CFI_16BIT:
433                 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
434                 retval = (flash_read16(addr) == cword.w);
435                 break;
436         case FLASH_CFI_32BIT:
437                 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
438                 retval = (flash_read32(addr) == cword.l);
439                 break;
440         case FLASH_CFI_64BIT:
441 #ifdef DEBUG
442                 {
443                         char str1[20];
444                         char str2[20];
445
446                         print_longlong (str1, flash_read64(addr));
447                         print_longlong (str2, cword.ll);
448                         debug ("is= %s %s\n", str1, str2);
449                 }
450 #endif
451                 retval = (flash_read64(addr) == cword.ll);
452                 break;
453         default:
454                 retval = 0;
455                 break;
456         }
457         flash_unmap(info, sect, offset, addr);
458
459         return retval;
460 }
461
462 /*-----------------------------------------------------------------------
463  */
464 static int flash_isset (flash_info_t * info, flash_sect_t sect,
465                         uint offset, uchar cmd)
466 {
467         void *addr;
468         cfiword_t cword;
469         int retval;
470
471         addr = flash_map (info, sect, offset);
472         flash_make_cmd (info, cmd, &cword);
473         switch (info->portwidth) {
474         case FLASH_CFI_8BIT:
475                 retval = ((flash_read8(addr) & cword.c) == cword.c);
476                 break;
477         case FLASH_CFI_16BIT:
478                 retval = ((flash_read16(addr) & cword.w) == cword.w);
479                 break;
480         case FLASH_CFI_32BIT:
481                 retval = ((flash_read32(addr) & cword.l) == cword.l);
482                 break;
483         case FLASH_CFI_64BIT:
484                 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
485                 break;
486         default:
487                 retval = 0;
488                 break;
489         }
490         flash_unmap(info, sect, offset, addr);
491
492         return retval;
493 }
494
495 /*-----------------------------------------------------------------------
496  */
497 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
498                          uint offset, uchar cmd)
499 {
500         void *addr;
501         cfiword_t cword;
502         int retval;
503
504         addr = flash_map (info, sect, offset);
505         flash_make_cmd (info, cmd, &cword);
506         switch (info->portwidth) {
507         case FLASH_CFI_8BIT:
508                 retval = flash_read8(addr) != flash_read8(addr);
509                 break;
510         case FLASH_CFI_16BIT:
511                 retval = flash_read16(addr) != flash_read16(addr);
512                 break;
513         case FLASH_CFI_32BIT:
514                 retval = flash_read32(addr) != flash_read32(addr);
515                 break;
516         case FLASH_CFI_64BIT:
517                 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
518                            (flash_read32(addr+4) != flash_read32(addr+4)) );
519                 break;
520         default:
521                 retval = 0;
522                 break;
523         }
524         flash_unmap(info, sect, offset, addr);
525
526         return retval;
527 }
528
529 /*
530  * flash_is_busy - check to see if the flash is busy
531  *
532  * This routine checks the status of the chip and returns true if the
533  * chip is busy.
534  */
535 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
536 {
537         int retval;
538
539         switch (info->vendor) {
540         case CFI_CMDSET_INTEL_PROG_REGIONS:
541         case CFI_CMDSET_INTEL_STANDARD:
542         case CFI_CMDSET_INTEL_EXTENDED:
543                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
544                 break;
545         case CFI_CMDSET_AMD_STANDARD:
546         case CFI_CMDSET_AMD_EXTENDED:
547 #ifdef CONFIG_FLASH_CFI_LEGACY
548         case CFI_CMDSET_AMD_LEGACY:
549 #endif
550                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
551                 break;
552         default:
553                 retval = 0;
554         }
555         debug ("flash_is_busy: %d\n", retval);
556         return retval;
557 }
558
559 /*-----------------------------------------------------------------------
560  *  wait for XSR.7 to be set. Time out with an error if it does not.
561  *  This routine does not set the flash to read-array mode.
562  */
563 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
564                                ulong tout, char *prompt)
565 {
566         ulong start;
567
568 #if CONFIG_SYS_HZ != 1000
569         if ((ulong)CONFIG_SYS_HZ > 100000)
570                 tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
571         else
572                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
573 #endif
574
575         /* Wait for command completion */
576         reset_timer();
577         start = get_timer (0);
578         while (flash_is_busy (info, sector)) {
579                 if (get_timer (start) > tout) {
580                         printf ("Flash %s timeout at address %lx data %lx\n",
581                                 prompt, info->start[sector],
582                                 flash_read_long (info, sector, 0));
583                         flash_write_cmd (info, sector, 0, info->cmd_reset);
584                         return ERR_TIMOUT;
585                 }
586                 udelay (1);             /* also triggers watchdog */
587         }
588         return ERR_OK;
589 }
590
591 /*-----------------------------------------------------------------------
592  * Wait for XSR.7 to be set, if it times out print an error, otherwise
593  * do a full status check.
594  *
595  * This routine sets the flash to read-array mode.
596  */
597 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
598                                     ulong tout, char *prompt)
599 {
600         int retcode;
601
602         retcode = flash_status_check (info, sector, tout, prompt);
603         switch (info->vendor) {
604         case CFI_CMDSET_INTEL_PROG_REGIONS:
605         case CFI_CMDSET_INTEL_EXTENDED:
606         case CFI_CMDSET_INTEL_STANDARD:
607                 if ((retcode != ERR_OK)
608                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
609                         retcode = ERR_INVAL;
610                         printf ("Flash %s error at address %lx\n", prompt,
611                                 info->start[sector]);
612                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
613                                          FLASH_STATUS_PSLBS)) {
614                                 puts ("Command Sequence Error.\n");
615                         } else if (flash_isset (info, sector, 0,
616                                                 FLASH_STATUS_ECLBS)) {
617                                 puts ("Block Erase Error.\n");
618                                 retcode = ERR_NOT_ERASED;
619                         } else if (flash_isset (info, sector, 0,
620                                                 FLASH_STATUS_PSLBS)) {
621                                 puts ("Locking Error\n");
622                         }
623                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
624                                 puts ("Block locked.\n");
625                                 retcode = ERR_PROTECTED;
626                         }
627                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
628                                 puts ("Vpp Low Error.\n");
629                 }
630                 flash_write_cmd (info, sector, 0, info->cmd_reset);
631                 break;
632         default:
633                 break;
634         }
635         return retcode;
636 }
637
638 static int use_flash_status_poll(flash_info_t *info)
639 {
640 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
641         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
642             info->vendor == CFI_CMDSET_AMD_STANDARD)
643                 return 1;
644 #endif
645         return 0;
646 }
647
648 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
649                              ulong tout, char *prompt)
650 {
651 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
652         ulong start;
653         int ready;
654
655 #if CONFIG_SYS_HZ != 1000
656         if ((ulong)CONFIG_SYS_HZ > 100000)
657                 tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
658         else
659                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
660 #endif
661
662         /* Wait for command completion */
663         reset_timer();
664         start = get_timer(0);
665         while (1) {
666                 switch (info->portwidth) {
667                 case FLASH_CFI_8BIT:
668                         ready = flash_read8(dst) == flash_read8(src);
669                         break;
670                 case FLASH_CFI_16BIT:
671                         ready = flash_read16(dst) == flash_read16(src);
672                         break;
673                 case FLASH_CFI_32BIT:
674                         ready = flash_read32(dst) == flash_read32(src);
675                         break;
676                 case FLASH_CFI_64BIT:
677                         ready = flash_read64(dst) == flash_read64(src);
678                         break;
679                 default:
680                         ready = 0;
681                         break;
682                 }
683                 if (ready)
684                         break;
685                 if (get_timer(start) > tout) {
686                         printf("Flash %s timeout at address %lx data %lx\n",
687                                prompt, (ulong)dst, (ulong)flash_read8(dst));
688                         return ERR_TIMOUT;
689                 }
690                 udelay(1);              /* also triggers watchdog */
691         }
692 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
693         return ERR_OK;
694 }
695
696 /*-----------------------------------------------------------------------
697  */
698 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
699 {
700 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
701         unsigned short  w;
702         unsigned int    l;
703         unsigned long long ll;
704 #endif
705
706         switch (info->portwidth) {
707         case FLASH_CFI_8BIT:
708                 cword->c = c;
709                 break;
710         case FLASH_CFI_16BIT:
711 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
712                 w = c;
713                 w <<= 8;
714                 cword->w = (cword->w >> 8) | w;
715 #else
716                 cword->w = (cword->w << 8) | c;
717 #endif
718                 break;
719         case FLASH_CFI_32BIT:
720 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
721                 l = c;
722                 l <<= 24;
723                 cword->l = (cword->l >> 8) | l;
724 #else
725                 cword->l = (cword->l << 8) | c;
726 #endif
727                 break;
728         case FLASH_CFI_64BIT:
729 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
730                 ll = c;
731                 ll <<= 56;
732                 cword->ll = (cword->ll >> 8) | ll;
733 #else
734                 cword->ll = (cword->ll << 8) | c;
735 #endif
736                 break;
737         }
738 }
739
740 /*
741  * Loop through the sector table starting from the previously found sector.
742  * Searches forwards or backwards, dependent on the passed address.
743  */
744 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
745 {
746         static flash_sect_t saved_sector = 0; /* previously found sector */
747         flash_sect_t sector = saved_sector;
748
749         while ((info->start[sector] < addr)
750                         && (sector < info->sector_count - 1))
751                 sector++;
752         while ((info->start[sector] > addr) && (sector > 0))
753                 /*
754                  * also decrements the sector in case of an overshot
755                  * in the first loop
756                  */
757                 sector--;
758
759         saved_sector = sector;
760         return sector;
761 }
762
763 /*-----------------------------------------------------------------------
764  */
765 static int flash_write_cfiword (flash_info_t * info, ulong dest,
766                                 cfiword_t cword)
767 {
768         void *dstaddr = (void *)dest;
769         int flag;
770         flash_sect_t sect = 0;
771         char sect_found = 0;
772
773         /* Check if Flash is (sufficiently) erased */
774         switch (info->portwidth) {
775         case FLASH_CFI_8BIT:
776                 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
777                 break;
778         case FLASH_CFI_16BIT:
779                 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
780                 break;
781         case FLASH_CFI_32BIT:
782                 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
783                 break;
784         case FLASH_CFI_64BIT:
785                 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
786                 break;
787         default:
788                 flag = 0;
789                 break;
790         }
791         if (!flag)
792                 return ERR_NOT_ERASED;
793
794         /* Disable interrupts which might cause a timeout here */
795         flag = disable_interrupts ();
796
797         switch (info->vendor) {
798         case CFI_CMDSET_INTEL_PROG_REGIONS:
799         case CFI_CMDSET_INTEL_EXTENDED:
800         case CFI_CMDSET_INTEL_STANDARD:
801                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
802                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
803                 break;
804         case CFI_CMDSET_AMD_EXTENDED:
805         case CFI_CMDSET_AMD_STANDARD:
806                 sect = find_sector(info, dest);
807                 flash_unlock_seq (info, sect);
808                 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
809                 sect_found = 1;
810                 break;
811 #ifdef CONFIG_FLASH_CFI_LEGACY
812         case CFI_CMDSET_AMD_LEGACY:
813                 sect = find_sector(info, dest);
814                 flash_unlock_seq (info, 0);
815                 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
816                 sect_found = 1;
817                 break;
818 #endif
819         }
820
821         switch (info->portwidth) {
822         case FLASH_CFI_8BIT:
823                 flash_write8(cword.c, dstaddr);
824                 break;
825         case FLASH_CFI_16BIT:
826                 flash_write16(cword.w, dstaddr);
827                 break;
828         case FLASH_CFI_32BIT:
829                 flash_write32(cword.l, dstaddr);
830                 break;
831         case FLASH_CFI_64BIT:
832                 flash_write64(cword.ll, dstaddr);
833                 break;
834         }
835
836         /* re-enable interrupts if necessary */
837         if (flag)
838                 enable_interrupts ();
839
840         if (!sect_found)
841                 sect = find_sector (info, dest);
842
843         if (use_flash_status_poll(info))
844                 return flash_status_poll(info, &cword, dstaddr,
845                                          info->write_tout, "write");
846         else
847                 return flash_full_status_check(info, sect,
848                                                info->write_tout, "write");
849 }
850
851 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
852
853 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
854                                   int len)
855 {
856         flash_sect_t sector;
857         int cnt;
858         int retcode;
859         void *src = cp;
860         void *dst = (void *)dest;
861         void *dst2 = dst;
862         int flag = 0;
863         uint offset = 0;
864         unsigned int shift;
865         uchar write_cmd;
866
867         switch (info->portwidth) {
868         case FLASH_CFI_8BIT:
869                 shift = 0;
870                 break;
871         case FLASH_CFI_16BIT:
872                 shift = 1;
873                 break;
874         case FLASH_CFI_32BIT:
875                 shift = 2;
876                 break;
877         case FLASH_CFI_64BIT:
878                 shift = 3;
879                 break;
880         default:
881                 retcode = ERR_INVAL;
882                 goto out_unmap;
883         }
884
885         cnt = len >> shift;
886
887         while ((cnt-- > 0) && (flag == 0)) {
888                 switch (info->portwidth) {
889                 case FLASH_CFI_8BIT:
890                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
891                                 flash_read8(src));
892                         src += 1, dst2 += 1;
893                         break;
894                 case FLASH_CFI_16BIT:
895                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
896                                 flash_read16(src));
897                         src += 2, dst2 += 2;
898                         break;
899                 case FLASH_CFI_32BIT:
900                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
901                                 flash_read32(src));
902                         src += 4, dst2 += 4;
903                         break;
904                 case FLASH_CFI_64BIT:
905                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
906                                 flash_read64(src));
907                         src += 8, dst2 += 8;
908                         break;
909                 }
910         }
911         if (!flag) {
912                 retcode = ERR_NOT_ERASED;
913                 goto out_unmap;
914         }
915
916         src = cp;
917         sector = find_sector (info, dest);
918
919         switch (info->vendor) {
920         case CFI_CMDSET_INTEL_PROG_REGIONS:
921         case CFI_CMDSET_INTEL_STANDARD:
922         case CFI_CMDSET_INTEL_EXTENDED:
923                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
924                                         FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
925                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
926                 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
927                 flash_write_cmd (info, sector, 0, write_cmd);
928                 retcode = flash_status_check (info, sector,
929                                               info->buffer_write_tout,
930                                               "write to buffer");
931                 if (retcode == ERR_OK) {
932                         /* reduce the number of loops by the width of
933                          * the port */
934                         cnt = len >> shift;
935                         flash_write_cmd (info, sector, 0, cnt - 1);
936                         while (cnt-- > 0) {
937                                 switch (info->portwidth) {
938                                 case FLASH_CFI_8BIT:
939                                         flash_write8(flash_read8(src), dst);
940                                         src += 1, dst += 1;
941                                         break;
942                                 case FLASH_CFI_16BIT:
943                                         flash_write16(flash_read16(src), dst);
944                                         src += 2, dst += 2;
945                                         break;
946                                 case FLASH_CFI_32BIT:
947                                         flash_write32(flash_read32(src), dst);
948                                         src += 4, dst += 4;
949                                         break;
950                                 case FLASH_CFI_64BIT:
951                                         flash_write64(flash_read64(src), dst);
952                                         src += 8, dst += 8;
953                                         break;
954                                 default:
955                                         retcode = ERR_INVAL;
956                                         goto out_unmap;
957                                 }
958                         }
959                         flash_write_cmd (info, sector, 0,
960                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
961                         retcode = flash_full_status_check (
962                                 info, sector, info->buffer_write_tout,
963                                 "buffer write");
964                 }
965
966                 break;
967
968         case CFI_CMDSET_AMD_STANDARD:
969         case CFI_CMDSET_AMD_EXTENDED:
970                 flash_unlock_seq(info,0);
971
972 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
973                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
974 #endif
975                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
976                 cnt = len >> shift;
977                 flash_write_cmd(info, sector, offset, cnt - 1);
978
979                 switch (info->portwidth) {
980                 case FLASH_CFI_8BIT:
981                         while (cnt-- > 0) {
982                                 flash_write8(flash_read8(src), dst);
983                                 src += 1, dst += 1;
984                         }
985                         break;
986                 case FLASH_CFI_16BIT:
987                         while (cnt-- > 0) {
988                                 flash_write16(flash_read16(src), dst);
989                                 src += 2, dst += 2;
990                         }
991                         break;
992                 case FLASH_CFI_32BIT:
993                         while (cnt-- > 0) {
994                                 flash_write32(flash_read32(src), dst);
995                                 src += 4, dst += 4;
996                         }
997                         break;
998                 case FLASH_CFI_64BIT:
999                         while (cnt-- > 0) {
1000                                 flash_write64(flash_read64(src), dst);
1001                                 src += 8, dst += 8;
1002                         }
1003                         break;
1004                 default:
1005                         retcode = ERR_INVAL;
1006                         goto out_unmap;
1007                 }
1008
1009                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1010                 if (use_flash_status_poll(info))
1011                         retcode = flash_status_poll(info, src - (1 << shift),
1012                                                     dst - (1 << shift),
1013                                                     info->buffer_write_tout,
1014                                                     "buffer write");
1015                 else
1016                         retcode = flash_full_status_check(info, sector,
1017                                                           info->buffer_write_tout,
1018                                                           "buffer write");
1019                 break;
1020
1021         default:
1022                 debug ("Unknown Command Set\n");
1023                 retcode = ERR_INVAL;
1024                 break;
1025         }
1026
1027 out_unmap:
1028         return retcode;
1029 }
1030 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1031
1032
1033 /*-----------------------------------------------------------------------
1034  */
1035 int flash_erase (flash_info_t * info, int s_first, int s_last)
1036 {
1037         int rcode = 0;
1038         int prot;
1039         flash_sect_t sect;
1040         int st;
1041
1042         if (info->flash_id != FLASH_MAN_CFI) {
1043                 puts ("Can't erase unknown flash type - aborted\n");
1044                 return 1;
1045         }
1046         if ((s_first < 0) || (s_first > s_last)) {
1047                 puts ("- no sectors to erase\n");
1048                 return 1;
1049         }
1050
1051         prot = 0;
1052         for (sect = s_first; sect <= s_last; ++sect) {
1053                 if (info->protect[sect]) {
1054                         prot++;
1055                 }
1056         }
1057         if (prot) {
1058                 printf ("- Warning: %d protected sectors will not be erased!\n",
1059                         prot);
1060         } else if (flash_verbose) {
1061                 putc ('\n');
1062         }
1063
1064
1065         for (sect = s_first; sect <= s_last; sect++) {
1066                 if (info->protect[sect] == 0) { /* not protected */
1067                         switch (info->vendor) {
1068                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1069                         case CFI_CMDSET_INTEL_STANDARD:
1070                         case CFI_CMDSET_INTEL_EXTENDED:
1071                                 flash_write_cmd (info, sect, 0,
1072                                                  FLASH_CMD_CLEAR_STATUS);
1073                                 flash_write_cmd (info, sect, 0,
1074                                                  FLASH_CMD_BLOCK_ERASE);
1075                                 flash_write_cmd (info, sect, 0,
1076                                                  FLASH_CMD_ERASE_CONFIRM);
1077                                 break;
1078                         case CFI_CMDSET_AMD_STANDARD:
1079                         case CFI_CMDSET_AMD_EXTENDED:
1080                                 flash_unlock_seq (info, sect);
1081                                 flash_write_cmd (info, sect,
1082                                                 info->addr_unlock1,
1083                                                 AMD_CMD_ERASE_START);
1084                                 flash_unlock_seq (info, sect);
1085                                 flash_write_cmd (info, sect, 0,
1086                                                  AMD_CMD_ERASE_SECTOR);
1087                                 break;
1088 #ifdef CONFIG_FLASH_CFI_LEGACY
1089                         case CFI_CMDSET_AMD_LEGACY:
1090                                 flash_unlock_seq (info, 0);
1091                                 flash_write_cmd (info, 0, info->addr_unlock1,
1092                                                 AMD_CMD_ERASE_START);
1093                                 flash_unlock_seq (info, 0);
1094                                 flash_write_cmd (info, sect, 0,
1095                                                 AMD_CMD_ERASE_SECTOR);
1096                                 break;
1097 #endif
1098                         default:
1099                                 debug ("Unkown flash vendor %d\n",
1100                                        info->vendor);
1101                                 break;
1102                         }
1103
1104                         if (use_flash_status_poll(info)) {
1105                                 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1106                                 void *dest;
1107                                 dest = flash_map(info, sect, 0);
1108                                 st = flash_status_poll(info, &cword, dest,
1109                                                        info->erase_blk_tout, "erase");
1110                                 flash_unmap(info, sect, 0, dest);
1111                         } else
1112                                 st = flash_full_status_check(info, sect,
1113                                                              info->erase_blk_tout,
1114                                                              "erase");
1115                         if (st)
1116                                 rcode = 1;
1117                         else if (flash_verbose)
1118                                 putc ('.');
1119                 }
1120         }
1121
1122         if (flash_verbose)
1123                 puts (" done\n");
1124
1125         return rcode;
1126 }
1127
1128 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1129 static int sector_erased(flash_info_t *info, int i)
1130 {
1131         int k;
1132         int size;
1133         u32 *flash;
1134
1135         /*
1136          * Check if whole sector is erased
1137          */
1138         size = flash_sector_size(info, i);
1139         flash = (u32 *)info->start[i];
1140         /* divide by 4 for longword access */
1141         size = size >> 2;
1142
1143         for (k = 0; k < size; k++) {
1144                 if (flash_read32(flash++) != 0xffffffff)
1145                         return 0;       /* not erased */
1146         }
1147
1148         return 1;                       /* erased */
1149 }
1150 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1151
1152 void flash_print_info (flash_info_t * info)
1153 {
1154         int i;
1155
1156         if (info->flash_id != FLASH_MAN_CFI) {
1157                 puts ("missing or unknown FLASH type\n");
1158                 return;
1159         }
1160
1161         printf ("%s FLASH (%d x %d)",
1162                 info->name,
1163                 (info->portwidth << 3), (info->chipwidth << 3));
1164         if (info->size < 1024*1024)
1165                 printf ("  Size: %ld kB in %d Sectors\n",
1166                         info->size >> 10, info->sector_count);
1167         else
1168                 printf ("  Size: %ld MB in %d Sectors\n",
1169                         info->size >> 20, info->sector_count);
1170         printf ("  ");
1171         switch (info->vendor) {
1172                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1173                         printf ("Intel Prog Regions");
1174                         break;
1175                 case CFI_CMDSET_INTEL_STANDARD:
1176                         printf ("Intel Standard");
1177                         break;
1178                 case CFI_CMDSET_INTEL_EXTENDED:
1179                         printf ("Intel Extended");
1180                         break;
1181                 case CFI_CMDSET_AMD_STANDARD:
1182                         printf ("AMD Standard");
1183                         break;
1184                 case CFI_CMDSET_AMD_EXTENDED:
1185                         printf ("AMD Extended");
1186                         break;
1187 #ifdef CONFIG_FLASH_CFI_LEGACY
1188                 case CFI_CMDSET_AMD_LEGACY:
1189                         printf ("AMD Legacy");
1190                         break;
1191 #endif
1192                 default:
1193                         printf ("Unknown (%d)", info->vendor);
1194                         break;
1195         }
1196         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1197                 info->manufacturer_id);
1198         printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1199                 info->device_id);
1200         if (info->device_id == 0x7E) {
1201                 printf("%04X", info->device_id2);
1202         }
1203         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1204                 info->erase_blk_tout,
1205                 info->write_tout);
1206         if (info->buffer_size > 1) {
1207                 printf ("  Buffer write timeout: %ld ms, "
1208                         "buffer size: %d bytes\n",
1209                 info->buffer_write_tout,
1210                 info->buffer_size);
1211         }
1212
1213         puts ("\n  Sector Start Addresses:");
1214         for (i = 0; i < info->sector_count; ++i) {
1215                 if (ctrlc())
1216                         break;
1217                 if ((i % 5) == 0)
1218                         putc('\n');
1219 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1220                 /* print empty and read-only info */
1221                 printf ("  %08lX %c %s ",
1222                         info->start[i],
1223                         sector_erased(info, i) ? 'E' : ' ',
1224                         info->protect[i] ? "RO" : "  ");
1225 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1226                 printf ("  %08lX   %s ",
1227                         info->start[i],
1228                         info->protect[i] ? "RO" : "  ");
1229 #endif
1230         }
1231         putc ('\n');
1232         return;
1233 }
1234
1235 /*-----------------------------------------------------------------------
1236  * This is used in a few places in write_buf() to show programming
1237  * progress.  Making it a function is nasty because it needs to do side
1238  * effect updates to digit and dots.  Repeated code is nasty too, so
1239  * we define it once here.
1240  */
1241 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1242 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1243         if (flash_verbose) { \
1244                 dots -= dots_sub; \
1245                 if ((scale > 0) && (dots <= 0)) { \
1246                         if ((digit % 5) == 0) \
1247                                 printf ("%d", digit / 5); \
1248                         else \
1249                                 putc ('.'); \
1250                         digit--; \
1251                         dots += scale; \
1252                 } \
1253         }
1254 #else
1255 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1256 #endif
1257
1258 /*-----------------------------------------------------------------------
1259  * Copy memory to flash, returns:
1260  * 0 - OK
1261  * 1 - write timeout
1262  * 2 - Flash not erased
1263  */
1264 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1265 {
1266         ulong wp;
1267         uchar *p;
1268         int aln;
1269         cfiword_t cword;
1270         int i, rc;
1271 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1272         int buffered_size;
1273 #endif
1274 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1275         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1276         int scale = 0;
1277         int dots  = 0;
1278
1279         /*
1280          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1281          */
1282         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1283                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1284                         CONFIG_FLASH_SHOW_PROGRESS);
1285         }
1286 #endif
1287
1288         /* get lower aligned address */
1289         wp = (addr & ~(info->portwidth - 1));
1290
1291         /* handle unaligned start */
1292         if ((aln = addr - wp) != 0) {
1293                 cword.l = 0;
1294                 p = (uchar *)wp;
1295                 for (i = 0; i < aln; ++i)
1296                         flash_add_byte (info, &cword, flash_read8(p + i));
1297
1298                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1299                         flash_add_byte (info, &cword, *src++);
1300                         cnt--;
1301                 }
1302                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1303                         flash_add_byte (info, &cword, flash_read8(p + i));
1304
1305                 rc = flash_write_cfiword (info, wp, cword);
1306                 if (rc != 0)
1307                         return rc;
1308
1309                 wp += i;
1310                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1311         }
1312
1313         /* handle the aligned part */
1314 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1315         buffered_size = (info->portwidth / info->chipwidth);
1316         buffered_size *= info->buffer_size;
1317         while (cnt >= info->portwidth) {
1318                 /* prohibit buffer write when buffer_size is 1 */
1319                 if (info->buffer_size == 1) {
1320                         cword.l = 0;
1321                         for (i = 0; i < info->portwidth; i++)
1322                                 flash_add_byte (info, &cword, *src++);
1323                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1324                                 return rc;
1325                         wp += info->portwidth;
1326                         cnt -= info->portwidth;
1327                         continue;
1328                 }
1329
1330                 /* write buffer until next buffered_size aligned boundary */
1331                 i = buffered_size - (wp % buffered_size);
1332                 if (i > cnt)
1333                         i = cnt;
1334                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1335                         return rc;
1336                 i -= i & (info->portwidth - 1);
1337                 wp += i;
1338                 src += i;
1339                 cnt -= i;
1340                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1341         }
1342 #else
1343         while (cnt >= info->portwidth) {
1344                 cword.l = 0;
1345                 for (i = 0; i < info->portwidth; i++) {
1346                         flash_add_byte (info, &cword, *src++);
1347                 }
1348                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1349                         return rc;
1350                 wp += info->portwidth;
1351                 cnt -= info->portwidth;
1352                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1353         }
1354 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1355
1356         if (cnt == 0) {
1357                 return (0);
1358         }
1359
1360         /*
1361          * handle unaligned tail bytes
1362          */
1363         cword.l = 0;
1364         p = (uchar *)wp;
1365         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1366                 flash_add_byte (info, &cword, *src++);
1367                 --cnt;
1368         }
1369         for (; i < info->portwidth; ++i)
1370                 flash_add_byte (info, &cword, flash_read8(p + i));
1371
1372         return flash_write_cfiword (info, wp, cword);
1373 }
1374
1375 /*-----------------------------------------------------------------------
1376  */
1377 #ifdef CONFIG_SYS_FLASH_PROTECTION
1378
1379 int flash_real_protect (flash_info_t * info, long sector, int prot)
1380 {
1381         int retcode = 0;
1382
1383         switch (info->vendor) {
1384                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1385                 case CFI_CMDSET_INTEL_STANDARD:
1386                 case CFI_CMDSET_INTEL_EXTENDED:
1387                         /*
1388                          * see errata called
1389                          * "Numonyx Axcell P33/P30 Specification Update" :)
1390                          */
1391                         flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1392                         if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1393                                             prot)) {
1394                                 /*
1395                                  * cmd must come before FLASH_CMD_PROTECT + 20us
1396                                  * Disable interrupts which might cause a timeout here.
1397                                  */
1398                                 int flag = disable_interrupts ();
1399                                 unsigned short cmd;
1400
1401                                 if (prot)
1402                                         cmd = FLASH_CMD_PROTECT_SET;
1403                                 else
1404                                         cmd = FLASH_CMD_PROTECT_CLEAR;
1405
1406                                 flash_write_cmd (info, sector, 0,
1407                                                   FLASH_CMD_PROTECT);
1408                                 flash_write_cmd (info, sector, 0, cmd);
1409                                 /* re-enable interrupts if necessary */
1410                                 if (flag)
1411                                         enable_interrupts ();
1412                         }
1413                         break;
1414                 case CFI_CMDSET_AMD_EXTENDED:
1415                 case CFI_CMDSET_AMD_STANDARD:
1416                         /* U-Boot only checks the first byte */
1417                         if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1418                                 if (prot) {
1419                                         flash_unlock_seq (info, 0);
1420                                         flash_write_cmd (info, 0,
1421                                                         info->addr_unlock1,
1422                                                         ATM_CMD_SOFTLOCK_START);
1423                                         flash_unlock_seq (info, 0);
1424                                         flash_write_cmd (info, sector, 0,
1425                                                         ATM_CMD_LOCK_SECT);
1426                                 } else {
1427                                         flash_write_cmd (info, 0,
1428                                                         info->addr_unlock1,
1429                                                         AMD_CMD_UNLOCK_START);
1430                                         if (info->device_id == ATM_ID_BV6416)
1431                                                 flash_write_cmd (info, sector,
1432                                                         0, ATM_CMD_UNLOCK_SECT);
1433                                 }
1434                         }
1435                         break;
1436 #ifdef CONFIG_FLASH_CFI_LEGACY
1437                 case CFI_CMDSET_AMD_LEGACY:
1438                         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1439                         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1440                         if (prot)
1441                                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1442                         else
1443                                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1444 #endif
1445         };
1446
1447         /*
1448          * Flash needs to be in status register read mode for
1449          * flash_full_status_check() to work correctly
1450          */
1451         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1452         if ((retcode =
1453              flash_full_status_check (info, sector, info->erase_blk_tout,
1454                                       prot ? "protect" : "unprotect")) == 0) {
1455
1456                 info->protect[sector] = prot;
1457
1458                 /*
1459                  * On some of Intel's flash chips (marked via legacy_unlock)
1460                  * unprotect unprotects all locking.
1461                  */
1462                 if ((prot == 0) && (info->legacy_unlock)) {
1463                         flash_sect_t i;
1464
1465                         for (i = 0; i < info->sector_count; i++) {
1466                                 if (info->protect[i])
1467                                         flash_real_protect (info, i, 1);
1468                         }
1469                 }
1470         }
1471         return retcode;
1472 }
1473
1474 /*-----------------------------------------------------------------------
1475  * flash_read_user_serial - read the OneTimeProgramming cells
1476  */
1477 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1478                              int len)
1479 {
1480         uchar *src;
1481         uchar *dst;
1482
1483         dst = buffer;
1484         src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1485         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1486         memcpy (dst, src + offset, len);
1487         flash_write_cmd (info, 0, 0, info->cmd_reset);
1488         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1489 }
1490
1491 /*
1492  * flash_read_factory_serial - read the device Id from the protection area
1493  */
1494 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1495                                 int len)
1496 {
1497         uchar *src;
1498
1499         src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1500         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1501         memcpy (buffer, src + offset, len);
1502         flash_write_cmd (info, 0, 0, info->cmd_reset);
1503         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1504 }
1505
1506 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1507
1508 /*-----------------------------------------------------------------------
1509  * Reverse the order of the erase regions in the CFI QRY structure.
1510  * This is needed for chips that are either a) correctly detected as
1511  * top-boot, or b) buggy.
1512  */
1513 static void cfi_reverse_geometry(struct cfi_qry *qry)
1514 {
1515         unsigned int i, j;
1516         u32 tmp;
1517
1518         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1519                 tmp = qry->erase_region_info[i];
1520                 qry->erase_region_info[i] = qry->erase_region_info[j];
1521                 qry->erase_region_info[j] = tmp;
1522         }
1523 }
1524
1525 /*-----------------------------------------------------------------------
1526  * read jedec ids from device and set corresponding fields in info struct
1527  *
1528  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1529  *
1530  */
1531 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1532 {
1533         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1534         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1535         udelay(1000); /* some flash are slow to respond */
1536         info->manufacturer_id = flash_read_uchar (info,
1537                                         FLASH_OFFSET_MANUFACTURER_ID);
1538         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1539                         flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1540                         flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1541         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1542 }
1543
1544 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1545 {
1546         info->cmd_reset = FLASH_CMD_RESET;
1547
1548         cmdset_intel_read_jedec_ids(info);
1549         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1550
1551 #ifdef CONFIG_SYS_FLASH_PROTECTION
1552         /* read legacy lock/unlock bit from intel flash */
1553         if (info->ext_addr) {
1554                 info->legacy_unlock = flash_read_uchar (info,
1555                                 info->ext_addr + 5) & 0x08;
1556         }
1557 #endif
1558
1559         return 0;
1560 }
1561
1562 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1563 {
1564         ushort bankId = 0;
1565         uchar  manuId;
1566
1567         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1568         flash_unlock_seq(info, 0);
1569         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1570         udelay(1000); /* some flash are slow to respond */
1571
1572         manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1573         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1574         while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1575                 bankId += 0x100;
1576                 manuId = flash_read_uchar (info,
1577                         bankId | FLASH_OFFSET_MANUFACTURER_ID);
1578         }
1579         info->manufacturer_id = manuId;
1580
1581         switch (info->chipwidth){
1582         case FLASH_CFI_8BIT:
1583                 info->device_id = flash_read_uchar (info,
1584                                                 FLASH_OFFSET_DEVICE_ID);
1585                 if (info->device_id == 0x7E) {
1586                         /* AMD 3-byte (expanded) device ids */
1587                         info->device_id2 = flash_read_uchar (info,
1588                                                 FLASH_OFFSET_DEVICE_ID2);
1589                         info->device_id2 <<= 8;
1590                         info->device_id2 |= flash_read_uchar (info,
1591                                                 FLASH_OFFSET_DEVICE_ID3);
1592                 }
1593                 break;
1594         case FLASH_CFI_16BIT:
1595                 info->device_id = flash_read_word (info,
1596                                                 FLASH_OFFSET_DEVICE_ID);
1597                 break;
1598         default:
1599                 break;
1600         }
1601         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1602 }
1603
1604 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1605 {
1606         info->cmd_reset = AMD_CMD_RESET;
1607
1608         cmdset_amd_read_jedec_ids(info);
1609         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1610
1611         return 0;
1612 }
1613
1614 #ifdef CONFIG_FLASH_CFI_LEGACY
1615 static void flash_read_jedec_ids (flash_info_t * info)
1616 {
1617         info->manufacturer_id = 0;
1618         info->device_id       = 0;
1619         info->device_id2      = 0;
1620
1621         switch (info->vendor) {
1622         case CFI_CMDSET_INTEL_PROG_REGIONS:
1623         case CFI_CMDSET_INTEL_STANDARD:
1624         case CFI_CMDSET_INTEL_EXTENDED:
1625                 cmdset_intel_read_jedec_ids(info);
1626                 break;
1627         case CFI_CMDSET_AMD_STANDARD:
1628         case CFI_CMDSET_AMD_EXTENDED:
1629                 cmdset_amd_read_jedec_ids(info);
1630                 break;
1631         default:
1632                 break;
1633         }
1634 }
1635
1636 /*-----------------------------------------------------------------------
1637  * Call board code to request info about non-CFI flash.
1638  * board_flash_get_legacy needs to fill in at least:
1639  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1640  */
1641 static int flash_detect_legacy(phys_addr_t base, int banknum)
1642 {
1643         flash_info_t *info = &flash_info[banknum];
1644
1645         if (board_flash_get_legacy(base, banknum, info)) {
1646                 /* board code may have filled info completely. If not, we
1647                    use JEDEC ID probing. */
1648                 if (!info->vendor) {
1649                         int modes[] = {
1650                                 CFI_CMDSET_AMD_STANDARD,
1651                                 CFI_CMDSET_INTEL_STANDARD
1652                         };
1653                         int i;
1654
1655                         for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1656                                 info->vendor = modes[i];
1657                                 info->start[0] =
1658                                         (ulong)map_physmem(base,
1659                                                            info->portwidth,
1660                                                            MAP_NOCACHE);
1661                                 if (info->portwidth == FLASH_CFI_8BIT
1662                                         && info->interface == FLASH_CFI_X8X16) {
1663                                         info->addr_unlock1 = 0x2AAA;
1664                                         info->addr_unlock2 = 0x5555;
1665                                 } else {
1666                                         info->addr_unlock1 = 0x5555;
1667                                         info->addr_unlock2 = 0x2AAA;
1668                                 }
1669                                 flash_read_jedec_ids(info);
1670                                 debug("JEDEC PROBE: ID %x %x %x\n",
1671                                                 info->manufacturer_id,
1672                                                 info->device_id,
1673                                                 info->device_id2);
1674                                 if (jedec_flash_match(info, info->start[0]))
1675                                         break;
1676                                 else
1677                                         unmap_physmem((void *)info->start[0],
1678                                                       MAP_NOCACHE);
1679                         }
1680                 }
1681
1682                 switch(info->vendor) {
1683                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1684                 case CFI_CMDSET_INTEL_STANDARD:
1685                 case CFI_CMDSET_INTEL_EXTENDED:
1686                         info->cmd_reset = FLASH_CMD_RESET;
1687                         break;
1688                 case CFI_CMDSET_AMD_STANDARD:
1689                 case CFI_CMDSET_AMD_EXTENDED:
1690                 case CFI_CMDSET_AMD_LEGACY:
1691                         info->cmd_reset = AMD_CMD_RESET;
1692                         break;
1693                 }
1694                 info->flash_id = FLASH_MAN_CFI;
1695                 return 1;
1696         }
1697         return 0; /* use CFI */
1698 }
1699 #else
1700 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1701 {
1702         return 0; /* use CFI */
1703 }
1704 #endif
1705
1706 /*-----------------------------------------------------------------------
1707  * detect if flash is compatible with the Common Flash Interface (CFI)
1708  * http://www.jedec.org/download/search/jesd68.pdf
1709  */
1710 static void flash_read_cfi (flash_info_t *info, void *buf,
1711                 unsigned int start, size_t len)
1712 {
1713         u8 *p = buf;
1714         unsigned int i;
1715
1716         for (i = 0; i < len; i++)
1717                 p[i] = flash_read_uchar(info, start + i);
1718 }
1719
1720 void __flash_cmd_reset(flash_info_t *info)
1721 {
1722         /*
1723          * We do not yet know what kind of commandset to use, so we issue
1724          * the reset command in both Intel and AMD variants, in the hope
1725          * that AMD flash roms ignore the Intel command.
1726          */
1727         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1728         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1729 }
1730 void flash_cmd_reset(flash_info_t *info)
1731         __attribute__((weak,alias("__flash_cmd_reset")));
1732
1733 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1734 {
1735         int cfi_offset;
1736
1737         /* Issue FLASH reset command */
1738         flash_cmd_reset(info);
1739
1740         for (cfi_offset=0;
1741              cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1742              cfi_offset++) {
1743                 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1744                                  FLASH_CMD_CFI);
1745                 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1746                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1747                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1748                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1749                                         sizeof(struct cfi_qry));
1750                         info->interface = le16_to_cpu(qry->interface_desc);
1751
1752                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1753                         debug ("device interface is %d\n",
1754                                info->interface);
1755                         debug ("found port %d chip %d ",
1756                                info->portwidth, info->chipwidth);
1757                         debug ("port %d bits chip %d bits\n",
1758                                info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1759                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1760
1761                         /* calculate command offsets as in the Linux driver */
1762                         info->addr_unlock1 = 0x555;
1763                         info->addr_unlock2 = 0x2aa;
1764
1765                         /*
1766                          * modify the unlock address if we are
1767                          * in compatibility mode
1768                          */
1769                         if (    /* x8/x16 in x8 mode */
1770                                 ((info->chipwidth == FLASH_CFI_BY8) &&
1771                                         (info->interface == FLASH_CFI_X8X16)) ||
1772                                 /* x16/x32 in x16 mode */
1773                                 ((info->chipwidth == FLASH_CFI_BY16) &&
1774                                         (info->interface == FLASH_CFI_X16X32)))
1775                         {
1776                                 info->addr_unlock1 = 0xaaa;
1777                                 info->addr_unlock2 = 0x555;
1778                         }
1779
1780                         info->name = "CFI conformant";
1781                         return 1;
1782                 }
1783         }
1784
1785         return 0;
1786 }
1787
1788 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1789 {
1790         debug ("flash detect cfi\n");
1791
1792         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1793              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1794                 for (info->chipwidth = FLASH_CFI_BY8;
1795                      info->chipwidth <= info->portwidth;
1796                      info->chipwidth <<= 1)
1797                         if (__flash_detect_cfi(info, qry))
1798                                 return 1;
1799         }
1800         debug ("not found\n");
1801         return 0;
1802 }
1803
1804 /*
1805  * Manufacturer-specific quirks. Add workarounds for geometry
1806  * reversal, etc. here.
1807  */
1808 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1809 {
1810         /* check if flash geometry needs reversal */
1811         if (qry->num_erase_regions > 1) {
1812                 /* reverse geometry if top boot part */
1813                 if (info->cfi_version < 0x3131) {
1814                         /* CFI < 1.1, try to guess from device id */
1815                         if ((info->device_id & 0x80) != 0)
1816                                 cfi_reverse_geometry(qry);
1817                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1818                         /* CFI >= 1.1, deduct from top/bottom flag */
1819                         /* note: ext_addr is valid since cfi_version > 0 */
1820                         cfi_reverse_geometry(qry);
1821                 }
1822         }
1823 }
1824
1825 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1826 {
1827         int reverse_geometry = 0;
1828
1829         /* Check the "top boot" bit in the PRI */
1830         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1831                 reverse_geometry = 1;
1832
1833         /* AT49BV6416(T) list the erase regions in the wrong order.
1834          * However, the device ID is identical with the non-broken
1835          * AT49BV642D they differ in the high byte.
1836          */
1837         if (info->device_id == 0xd6 || info->device_id == 0xd2)
1838                 reverse_geometry = !reverse_geometry;
1839
1840         if (reverse_geometry)
1841                 cfi_reverse_geometry(qry);
1842 }
1843
1844 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1845 {
1846         /* check if flash geometry needs reversal */
1847         if (qry->num_erase_regions > 1) {
1848                 /* reverse geometry if top boot part */
1849                 if (info->cfi_version < 0x3131) {
1850                         /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1851                         if (info->device_id == 0x22CA ||
1852                             info->device_id == 0x2256) {
1853                                 cfi_reverse_geometry(qry);
1854                         }
1855                 }
1856         }
1857 }
1858
1859 /*
1860  * The following code cannot be run from FLASH!
1861  *
1862  */
1863 ulong flash_get_size (phys_addr_t base, int banknum)
1864 {
1865         flash_info_t *info = &flash_info[banknum];
1866         int i, j;
1867         flash_sect_t sect_cnt;
1868         phys_addr_t sector;
1869         unsigned long tmp;
1870         int size_ratio;
1871         uchar num_erase_regions;
1872         int erase_region_size;
1873         int erase_region_count;
1874         struct cfi_qry qry;
1875         unsigned long max_size;
1876
1877         memset(&qry, 0, sizeof(qry));
1878
1879         info->ext_addr = 0;
1880         info->cfi_version = 0;
1881 #ifdef CONFIG_SYS_FLASH_PROTECTION
1882         info->legacy_unlock = 0;
1883 #endif
1884
1885         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
1886
1887         if (flash_detect_cfi (info, &qry)) {
1888                 info->vendor = le16_to_cpu(qry.p_id);
1889                 info->ext_addr = le16_to_cpu(qry.p_adr);
1890                 num_erase_regions = qry.num_erase_regions;
1891
1892                 if (info->ext_addr) {
1893                         info->cfi_version = (ushort) flash_read_uchar (info,
1894                                                 info->ext_addr + 3) << 8;
1895                         info->cfi_version |= (ushort) flash_read_uchar (info,
1896                                                 info->ext_addr + 4);
1897                 }
1898
1899 #ifdef DEBUG
1900                 flash_printqry (&qry);
1901 #endif
1902
1903                 switch (info->vendor) {
1904                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1905                 case CFI_CMDSET_INTEL_STANDARD:
1906                 case CFI_CMDSET_INTEL_EXTENDED:
1907                         cmdset_intel_init(info, &qry);
1908                         break;
1909                 case CFI_CMDSET_AMD_STANDARD:
1910                 case CFI_CMDSET_AMD_EXTENDED:
1911                         cmdset_amd_init(info, &qry);
1912                         break;
1913                 default:
1914                         printf("CFI: Unknown command set 0x%x\n",
1915                                         info->vendor);
1916                         /*
1917                          * Unfortunately, this means we don't know how
1918                          * to get the chip back to Read mode. Might
1919                          * as well try an Intel-style reset...
1920                          */
1921                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1922                         return 0;
1923                 }
1924
1925                 /* Do manufacturer-specific fixups */
1926                 switch (info->manufacturer_id) {
1927                 case 0x0001:
1928                         flash_fixup_amd(info, &qry);
1929                         break;
1930                 case 0x001f:
1931                         flash_fixup_atmel(info, &qry);
1932                         break;
1933                 case 0x0020:
1934                         flash_fixup_stm(info, &qry);
1935                         break;
1936                 }
1937
1938                 debug ("manufacturer is %d\n", info->vendor);
1939                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1940                 debug ("device id is 0x%x\n", info->device_id);
1941                 debug ("device id2 is 0x%x\n", info->device_id2);
1942                 debug ("cfi version is 0x%04x\n", info->cfi_version);
1943
1944                 size_ratio = info->portwidth / info->chipwidth;
1945                 /* if the chip is x8/x16 reduce the ratio by half */
1946                 if ((info->interface == FLASH_CFI_X8X16)
1947                     && (info->chipwidth == FLASH_CFI_BY8)) {
1948                         size_ratio >>= 1;
1949                 }
1950                 debug ("size_ratio %d port %d bits chip %d bits\n",
1951                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1952                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1953                 info->size = 1 << qry.dev_size;
1954                 /* multiply the size by the number of chips */
1955                 info->size *= size_ratio;
1956                 max_size = cfi_flash_bank_size(banknum);
1957                 if (max_size && (info->size > max_size)) {
1958                         debug("[truncated from %ldMiB]", info->size >> 20);
1959                         info->size = max_size;
1960                 }
1961                 debug ("found %d erase regions\n", num_erase_regions);
1962                 sect_cnt = 0;
1963                 sector = base;
1964                 for (i = 0; i < num_erase_regions; i++) {
1965                         if (i > NUM_ERASE_REGIONS) {
1966                                 printf ("%d erase regions found, only %d used\n",
1967                                         num_erase_regions, NUM_ERASE_REGIONS);
1968                                 break;
1969                         }
1970
1971                         tmp = le32_to_cpu(qry.erase_region_info[i]);
1972                         debug("erase region %u: 0x%08lx\n", i, tmp);
1973
1974                         erase_region_count = (tmp & 0xffff) + 1;
1975                         tmp >>= 16;
1976                         erase_region_size =
1977                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1978                         debug ("erase_region_count = %d erase_region_size = %d\n",
1979                                 erase_region_count, erase_region_size);
1980                         for (j = 0; j < erase_region_count; j++) {
1981                                 if (sector - base >= info->size)
1982                                         break;
1983                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
1984                                         printf("ERROR: too many flash sectors\n");
1985                                         break;
1986                                 }
1987                                 info->start[sect_cnt] =
1988                                         (ulong)map_physmem(sector,
1989                                                            info->portwidth,
1990                                                            MAP_NOCACHE);
1991                                 sector += (erase_region_size * size_ratio);
1992
1993                                 /*
1994                                  * Only read protection status from
1995                                  * supported devices (intel...)
1996                                  */
1997                                 switch (info->vendor) {
1998                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1999                                 case CFI_CMDSET_INTEL_EXTENDED:
2000                                 case CFI_CMDSET_INTEL_STANDARD:
2001                                         /*
2002                                          * Set flash to read-id mode. Otherwise
2003                                          * reading protected status is not
2004                                          * guaranteed.
2005                                          */
2006                                         flash_write_cmd(info, sect_cnt, 0,
2007                                                         FLASH_CMD_READ_ID);
2008                                         info->protect[sect_cnt] =
2009                                                 flash_isset (info, sect_cnt,
2010                                                              FLASH_OFFSET_PROTECT,
2011                                                              FLASH_STATUS_PROTECT);
2012                                         break;
2013                                 default:
2014                                         /* default: not protected */
2015                                         info->protect[sect_cnt] = 0;
2016                                 }
2017
2018                                 sect_cnt++;
2019                         }
2020                 }
2021
2022                 info->sector_count = sect_cnt;
2023                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2024                 tmp = 1 << qry.block_erase_timeout_typ;
2025                 info->erase_blk_tout = tmp *
2026                         (1 << qry.block_erase_timeout_max);
2027                 tmp = (1 << qry.buf_write_timeout_typ) *
2028                         (1 << qry.buf_write_timeout_max);
2029
2030                 /* round up when converting to ms */
2031                 info->buffer_write_tout = (tmp + 999) / 1000;
2032                 tmp = (1 << qry.word_write_timeout_typ) *
2033                         (1 << qry.word_write_timeout_max);
2034                 /* round up when converting to ms */
2035                 info->write_tout = (tmp + 999) / 1000;
2036                 info->flash_id = FLASH_MAN_CFI;
2037                 if ((info->interface == FLASH_CFI_X8X16) &&
2038                     (info->chipwidth == FLASH_CFI_BY8)) {
2039                         /* XXX - Need to test on x8/x16 in parallel. */
2040                         info->portwidth >>= 1;
2041                 }
2042
2043                 flash_write_cmd (info, 0, 0, info->cmd_reset);
2044         }
2045
2046         return (info->size);
2047 }
2048
2049 #ifdef CONFIG_FLASH_CFI_MTD
2050 void flash_set_verbose(uint v)
2051 {
2052         flash_verbose = v;
2053 }
2054 #endif
2055
2056 static void cfi_flash_set_config_reg(u32 base, u16 val)
2057 {
2058 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2059         /*
2060          * Only set this config register if really defined
2061          * to a valid value (0xffff is invalid)
2062          */
2063         if (val == 0xffff)
2064                 return;
2065
2066         /*
2067          * Set configuration register. Data is "encrypted" in the 16 lower
2068          * address bits.
2069          */
2070         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2071         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2072
2073         /*
2074          * Finally issue reset-command to bring device back to
2075          * read-array mode
2076          */
2077         flash_write16(FLASH_CMD_RESET, (void *)base);
2078 #endif
2079 }
2080
2081 /*-----------------------------------------------------------------------
2082  */
2083 unsigned long flash_init (void)
2084 {
2085         unsigned long size = 0;
2086         int i;
2087 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2088         struct apl_s {
2089                 ulong start;
2090                 ulong size;
2091         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2092 #endif
2093
2094 #ifdef CONFIG_SYS_FLASH_PROTECTION
2095         /* read environment from EEPROM */
2096         char s[64];
2097         getenv_f("unlock", s, sizeof(s));
2098 #endif
2099
2100         /* Init: no FLASHes known */
2101         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2102                 flash_info[i].flash_id = FLASH_UNKNOWN;
2103
2104                 /* Optionally write flash configuration register */
2105                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2106                                          cfi_flash_config_reg(i));
2107
2108                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2109                         flash_get_size(cfi_flash_bank_addr(i), i);
2110                 size += flash_info[i].size;
2111                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2112 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2113                         printf ("## Unknown FLASH on Bank %d "
2114                                 "- Size = 0x%08lx = %ld MB\n",
2115                                 i+1, flash_info[i].size,
2116                                 flash_info[i].size >> 20);
2117 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2118                 }
2119 #ifdef CONFIG_SYS_FLASH_PROTECTION
2120                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2121                         /*
2122                          * Only the U-Boot image and it's environment
2123                          * is protected, all other sectors are
2124                          * unprotected (unlocked) if flash hardware
2125                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2126                          * and the environment variable "unlock" is
2127                          * set to "yes".
2128                          */
2129                         if (flash_info[i].legacy_unlock) {
2130                                 int k;
2131
2132                                 /*
2133                                  * Disable legacy_unlock temporarily,
2134                                  * since flash_real_protect would
2135                                  * relock all other sectors again
2136                                  * otherwise.
2137                                  */
2138                                 flash_info[i].legacy_unlock = 0;
2139
2140                                 /*
2141                                  * Legacy unlocking (e.g. Intel J3) ->
2142                                  * unlock only one sector. This will
2143                                  * unlock all sectors.
2144                                  */
2145                                 flash_real_protect (&flash_info[i], 0, 0);
2146
2147                                 flash_info[i].legacy_unlock = 1;
2148
2149                                 /*
2150                                  * Manually mark other sectors as
2151                                  * unlocked (unprotected)
2152                                  */
2153                                 for (k = 1; k < flash_info[i].sector_count; k++)
2154                                         flash_info[i].protect[k] = 0;
2155                         } else {
2156                                 /*
2157                                  * No legancy unlocking -> unlock all sectors
2158                                  */
2159                                 flash_protect (FLAG_PROTECT_CLEAR,
2160                                                flash_info[i].start[0],
2161                                                flash_info[i].start[0]
2162                                                + flash_info[i].size - 1,
2163                                                &flash_info[i]);
2164                         }
2165                 }
2166 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2167         }
2168
2169         /* Monitor protection ON by default */
2170 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2171         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2172         flash_protect (FLAG_PROTECT_SET,
2173                        CONFIG_SYS_MONITOR_BASE,
2174                        CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2175                        flash_get_info(CONFIG_SYS_MONITOR_BASE));
2176 #endif
2177
2178         /* Environment protection ON by default */
2179 #ifdef CONFIG_ENV_IS_IN_FLASH
2180         flash_protect (FLAG_PROTECT_SET,
2181                        CONFIG_ENV_ADDR,
2182                        CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2183                        flash_get_info(CONFIG_ENV_ADDR));
2184 #endif
2185
2186         /* Redundant environment protection ON by default */
2187 #ifdef CONFIG_ENV_ADDR_REDUND
2188         flash_protect (FLAG_PROTECT_SET,
2189                        CONFIG_ENV_ADDR_REDUND,
2190                        CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2191                        flash_get_info(CONFIG_ENV_ADDR_REDUND));
2192 #endif
2193
2194 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2195         for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2196                 debug("autoprotecting from %08x to %08x\n",
2197                       apl[i].start, apl[i].start + apl[i].size - 1);
2198                 flash_protect (FLAG_PROTECT_SET,
2199                                apl[i].start,
2200                                apl[i].start + apl[i].size - 1,
2201                                flash_get_info(apl[i].start));
2202         }
2203 #endif
2204
2205 #ifdef CONFIG_FLASH_CFI_MTD
2206         cfi_mtd_init();
2207 #endif
2208
2209         return (size);
2210 }