drivers/mtd/nand/atmel_nand.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian.pop@leadtechdesign.com>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <common.h>
  28 #include <asm/arch/hardware.h>
  29 #include <asm/arch/gpio.h>
  30 #include <asm/arch/at91_pio.h>
  31
  32 #include <nand.h>
  33
  34 static void at91_nand_hwcontrol(struct mtd_info *mtd,
  35                                          int cmd, unsigned int ctrl)
  36 {
  37         struct nand_chip *this = mtd->priv;
  38
  39         if (ctrl & NAND_CTRL_CHANGE) {
  40                 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
  41                 IO_ADDR_W &= ~(CONFIG_SYS_NAND_MASK_ALE
  42                              | CONFIG_SYS_NAND_MASK_CLE);
  43
  44                 if (ctrl & NAND_CLE)
  45                         IO_ADDR_W |= CONFIG_SYS_NAND_MASK_CLE;
  46                 if (ctrl & NAND_ALE)
  47                         IO_ADDR_W |= CONFIG_SYS_NAND_MASK_ALE;
  48
  49                 at91_set_gpio_value(CONFIG_SYS_NAND_ENABLE_PIN,
  50                                     !(ctrl & NAND_NCE));
  51                 this->IO_ADDR_W = (void *) IO_ADDR_W;
  52         }
  53
  54         if (cmd != NAND_CMD_NONE)
  55                 writeb(cmd, this->IO_ADDR_W);
  56 }
  57
  58 #ifdef CONFIG_SYS_NAND_READY_PIN
  59 static int at91_nand_ready(struct mtd_info *mtd)
  60 {
  61         return at91_get_gpio_value(CONFIG_SYS_NAND_READY_PIN);
  62 }
  63 #endif
  64
  65 int board_nand_init(struct nand_chip *nand)
  66 {
  67         nand->ecc.mode = NAND_ECC_SOFT;
  68 #ifdef CONFIG_SYS_NAND_DBW_16
  69         nand->options = NAND_BUSWIDTH_16;
  70 #endif
  71         nand->cmd_ctrl = at91_nand_hwcontrol;
  72 #ifdef CONFIG_SYS_NAND_READY_PIN
  73         nand->dev_ready = at91_nand_ready;
  74 #endif
  75         nand->chip_delay = 20;
  76
  77         return 0;
  78 }