2 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <spi_flash.h>
27 #include <asm/errno.h>
28 #include <linux/types.h>
32 #include <imx_spi_nor.h>
34 static u8 g_tx_buf[256];
35 static u8 g_rx_buf[256];
37 #define WRITE_ENABLE(a) spi_nor_cmd_1byte(a, WREN)
38 #define WRITE_DISABLE(a) spi_nor_cmd_1byte(a, WRDI)
39 #define ENABLE_WRITE_STATUS(a) spi_nor_cmd_1byte(a, EWSR)
41 struct imx_spi_flash_params {
49 struct imx_spi_flash {
50 const struct imx_spi_flash_params *params;
51 struct spi_flash flash;
54 static inline struct imx_spi_flash *
55 to_imx_spi_flash(struct spi_flash *flash)
57 return container_of(flash, struct imx_spi_flash, flash);
60 static const struct imx_spi_flash_params imx_spi_flash_table[] = {
65 .device_size = SZ_64K * 32,
66 .name = "SST25VF016B - 2MB",
70 static s32 spi_nor_flash_query(struct spi_flash *flash, void* data)
73 u8 *pData = (u8 *)data;
75 g_tx_buf[3] = JEDEC_ID;
77 if (spi_xfer(flash->spi, (4 << 3), g_tx_buf, au8Tmp,
78 SPI_XFER_BEGIN | SPI_XFER_END)) {
82 printf("JEDEC ID: 0x%02x:0x%02x:0x%02x\n",
83 au8Tmp[2], au8Tmp[1], au8Tmp[0]);
92 static s32 spi_nor_cmd_1byte(struct spi_flash *flash, u8 cmd)
96 if (spi_xfer(flash->spi, (1 << 3), g_tx_buf, g_rx_buf,
97 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
98 printf("Error: %s(): %d\n", __func__, __LINE__);
104 static s32 spi_nor_status(struct spi_flash *flash)
108 if (spi_xfer(flash->spi, 2 << 3, g_tx_buf, g_rx_buf,
109 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
110 printf("Error: %s(): %d\n", __func__, __LINE__);
116 static int spi_nor_program_1byte(struct spi_flash *flash,
119 u32 addr_val = (u32)addr;
121 /* need to do write-enable command */
122 if (WRITE_ENABLE(flash) != 0) {
123 printf("Error : %d\n", __LINE__);
126 g_tx_buf[0] = BYTE_PROG; /* need to skip bytes 1, 2, 3 */
128 g_tx_buf[5] = addr_val & 0xFF;
129 g_tx_buf[6] = (addr_val >> 8) & 0xFF;
130 g_tx_buf[7] = (addr_val >> 16) & 0xFF;
132 debug("0x%x: 0x%x\n", *(u32 *)g_tx_buf, *(u32 *)(g_tx_buf + 4));
133 debug("addr=0x%x\n", addr_val);
135 if (spi_xfer(flash->spi, 5 << 3, g_tx_buf, g_rx_buf,
136 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
137 printf("Error: %s(%d): failed\n", __FILE__, __LINE__);
141 while (spi_nor_status(flash) & RDSR_BUSY)
148 * Write 'val' to flash WRSR (write status register)
150 static int spi_nor_write_status(struct spi_flash *flash, u8 val)
155 if (spi_xfer(flash->spi, 2 << 3, g_tx_buf, g_rx_buf,
156 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
157 printf("Error: %s(): %d\n", __func__, __LINE__);
164 * Erase a block_size data from block_addr offset in the flash
166 static int spi_nor_erase_block(struct spi_flash *flash,
167 void *block_addr, u32 block_size)
169 u32 *cmd = (u32 *)g_tx_buf;
170 u32 addr = (u32) block_addr;
172 if (block_size != SZ_64K &&
173 block_size != SZ_32K &&
174 block_size != SZ_4K) {
175 printf("Error - block_size is not "
176 "4kB, 32kB or 64kB: 0x%x\n",
181 if ((addr & (block_size - 1)) != 0) {
182 printf("Error - block_addr is not "
183 "4kB, 32kB or 64kB aligned: %p\n",
188 if (ENABLE_WRITE_STATUS(flash) != 0 ||
189 spi_nor_write_status(flash, 0) != 0) {
190 printf("Error: %s: %d\n", __func__, __LINE__);
194 /* need to do write-enable command */
195 if (WRITE_ENABLE(flash) != 0) {
196 printf("Error : %d\n", __LINE__);
200 if (block_size == SZ_64K)
201 *cmd = (ERASE_64K << 24) | (addr & 0x00FFFFFF);
202 else if (block_size == SZ_32K)
203 *cmd = (ERASE_32K << 24) | (addr & 0x00FFFFFF);
204 else if (block_size == SZ_4K)
205 *cmd = (ERASE_4K << 24) | (addr & 0x00FFFFFF);
207 /* now do the block erase */
208 if (spi_xfer(flash->spi, 4 << 3, g_tx_buf, g_rx_buf,
209 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
213 while (spi_nor_status(flash) & RDSR_BUSY)
219 static int spi_nor_flash_read(struct spi_flash *flash, u32 offset,
220 size_t len, void *buf)
222 struct imx_spi_flash *imx_sf = to_imx_spi_flash(flash);
223 u32 *cmd = (u32 *)g_tx_buf;
224 u32 max_rx_sz = (MAX_SPI_BYTES) - 4;
225 u8 *d_buf = (u8 *)buf;
227 s32 s32remain_size = len;
233 printf("Reading SPI NOR flash 0x%x [0x%x bytes] -> ram 0x%p\n",
235 debug("%s(from flash=0x%08x to ram=%p len=0x%x)\n",
242 *cmd = (READ << 24) | ((u32)offset & 0x00FFFFFF);
244 for (; s32remain_size > 0; s32remain_size -= max_rx_sz, *cmd += max_rx_sz) {
245 debug("Addr:0x%p=>Offset:0x%08x, %d bytes transferred\n",
248 (len - s32remain_size));
249 debug("%d%% completed\n", ((len - s32remain_size) * 100 / len));
251 if (s32remain_size < max_rx_sz) {
252 debug("100%% completed\n");
254 if (spi_xfer(flash->spi, (s32remain_size + 4) << 3,
256 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
257 printf("Error: %s(%d): failed\n", __FILE__, __LINE__);
260 /* throw away 4 bytes (5th received bytes is real) */
261 s_buf = g_rx_buf + 4;
263 /* now adjust the endianness */
264 for (i = s32remain_size; i >= 0; i -= 4, s_buf += 4) {
276 printf("SUCCESS\n\n");
287 /* now grab max_rx_sz data (+4 is
288 *needed due to 4-throw away bytes */
289 if (spi_xfer(flash->spi, (max_rx_sz + 4) << 3,
290 g_tx_buf, g_rx_buf, SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
291 printf("Error: %s(%d): failed\n", __FILE__, __LINE__);
294 /* throw away 4 bytes (5th received bytes is real) */
295 s_buf = g_rx_buf + 4;
296 /* now adjust the endianness */
297 for (i = 0; i < max_rx_sz; i += 4, s_buf += 4) {
304 if ((s32remain_size % imx_sf->params->block_size) == 0)
307 printf("SUCCESS\n\n");
312 static int spi_nor_flash_write(struct spi_flash *flash, u32 offset,
313 size_t len, const void *buf)
315 struct imx_spi_flash *imx_sf = to_imx_spi_flash(flash);
317 u8 *s_buf = (u8 *)buf;
318 s32 s32remain_size = len;
326 printf("Writing SPI NOR flash 0x%x [0x%x bytes] <- ram 0x%p\n",
328 debug("%s(flash addr=0x%08x, ram=%p, len=0x%x)\n",
329 __func__, offset, buf, len);
331 if (ENABLE_WRITE_STATUS(flash) != 0 ||
332 spi_nor_write_status(flash, 0) != 0) {
333 printf("Error: %s: %d\n", __func__, __LINE__);
337 if ((d_addr & 1) != 0) {
338 /* program 1st byte */
339 if (spi_nor_program_1byte(flash, s_buf[0],
340 (void *)d_addr) != 0) {
341 printf("Error: %s(%d)\n", __func__, __LINE__);
344 if (--s32remain_size == 0)
350 /* need to do write-enable command */
351 if (WRITE_ENABLE(flash) != 0) {
352 printf("Error : %d\n", __LINE__);
357 These two bytes write will be copied to txfifo first with
358 g_tx_buf[1] being shifted out and followed by g_tx_buf[0].
359 The reason for this is we will specify burst len=6. So SPI will
360 do this kind of data movement.
362 g_tx_buf[0] = d_addr >> 16;
363 g_tx_buf[1] = AAI_PROG; /* need to skip bytes 1, 2 */
364 /* byte shifted order is: 7, 6, 5, 4 */
365 g_tx_buf[4] = s_buf[1];
366 g_tx_buf[5] = s_buf[0];
367 g_tx_buf[6] = d_addr;
368 g_tx_buf[7] = d_addr >> 8;
369 if (spi_xfer(flash->spi, 6 << 3, g_tx_buf, g_rx_buf,
370 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
371 printf("Error: %s(%d): failed\n",
376 while (spi_nor_status(flash) & RDSR_BUSY)
379 for (d_addr += 2, s_buf += 2, s32remain_size -= 2;
381 d_addr += 2, s_buf += 2, s32remain_size -= 2) {
382 debug("%d%% transferred\n",
383 ((len - s32remain_size) * 100 / len));
384 /* byte shifted order is: 2,1,0 */
385 g_tx_buf[2] = AAI_PROG;
386 g_tx_buf[1] = s_buf[0];
387 g_tx_buf[0] = s_buf[1];
389 if (spi_xfer(flash->spi, 3 << 3, g_tx_buf, g_rx_buf,
390 SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
391 printf("Error: %s(%d): failed\n",
396 while (spi_nor_status(flash) & RDSR_BUSY)
399 if ((s32remain_size % imx_sf->params->block_size) == 0)
402 printf("SUCCESS\n\n");
403 debug("100%% transferred\n");
405 WRITE_DISABLE(flash);
406 while (spi_nor_status(flash) & RDSR_BUSY)
409 if (WRITE_ENABLE(flash) != 0) {
410 printf("Error : %d\n", __LINE__);
415 /* need to do write-enable command */
416 /* only 1 byte left */
417 if (spi_nor_program_1byte(flash, s_buf[0],
418 (void *)d_addr) != 0) {
419 printf("Error: %s(%d)\n",
427 static int spi_nor_flash_erase(struct spi_flash *flash, u32 offset,
430 s32 s32remain_size = len;
435 printf("Erasing SPI NOR flash 0x%x [0x%x bytes]\n",
438 if ((len % SZ_4K) != 0 || len == 0) {
439 printf("Error: size (0x%x) is not integer multiples of 4kB(0x1000)\n",
443 if ((offset & (SZ_4K - 1)) != 0) {
444 printf("Error - addr is not 4kB(0x1000) aligned: 0x%08x\n",
448 for (; s32remain_size > 0; s32remain_size -= SZ_4K, offset += SZ_4K) {
449 debug("Erasing 0x%08x, %d%% erased\n",
451 ((len - s32remain_size) * 100 / len));
452 if (spi_nor_erase_block(flash,
453 (void *)offset, SZ_4K) != 0) {
454 printf("Error: spi_nor_flash_erase(): %d\n", __LINE__);
459 printf("SUCCESS\n\n");
460 debug("100%% erased\n");
464 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode)
466 struct spi_slave *spi = NULL;
467 const struct imx_spi_flash_params *params = NULL;
468 struct imx_spi_flash *imx_sf = NULL;
469 u8 idcode[4] = { 0 };
473 if (CONFIG_SPI_FLASH_CS != cs) {
474 printf("Invalid cs for SPI NOR.\n");
478 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
481 debug("SF: Failed to set up slave\n");
485 ret = spi_claim_bus(spi);
487 debug("SF: Failed to claim SPI bus: %d\n", ret);
491 imx_sf = (struct imx_spi_flash *)malloc(sizeof(struct imx_spi_flash));
494 debug("SF: Failed to allocate memory\n");
499 imx_sf->flash.spi = spi;
501 /* Read the ID codes */
502 ret = spi_nor_flash_query(&(imx_sf->flash), idcode);
506 for (i = 0; i < ARRAY_SIZE(imx_spi_flash_table); ++i) {
507 params = &imx_spi_flash_table[i];
508 if (params->idcode1 == idcode[1])
512 if (i == ARRAY_SIZE(imx_spi_flash_table)) {
513 debug("SF: Unsupported DataFlash ID %02x\n",
516 goto err_invalid_dev;
519 imx_sf->params = params;
521 imx_sf->flash.name = params->name;
522 imx_sf->flash.size = params->device_size;
524 imx_sf->flash.read = spi_nor_flash_read;
525 imx_sf->flash.write = spi_nor_flash_write;
526 imx_sf->flash.erase = spi_nor_flash_erase;
528 debug("SF: Detected %s with block size %lu, "
529 "block count %lu, total %u bytes\n",
533 params->device_size);
535 return &(imx_sf->flash);
538 spi_release_bus(spi);
548 void spi_flash_free(struct spi_flash *flash)
550 struct imx_spi_flash *imx_sf = NULL;
555 imx_sf = to_imx_spi_flash(flash);
558 spi_free_slave(flash->spi);