2 * @file IxAtmdAccCtrl.h
6 * @brief IxAtmdAcc Public API
8 * This file contains the public API of IxAtmdAcc, related to the
9 * control functions of the component.
13 * IXP400 SW Release version 2.0
15 * -- Copyright Notice --
18 * Copyright 2001-2005, Intel Corporation.
19 * All rights reserved.
22 * SPDX-License-Identifier: BSD-3-Clause
24 * -- End of Copyright Notice --
27 /* ------------------------------------------------------
28 Doxygen group definitions
29 ------------------------------------------------------ */
33 * @defgroup IxAtmdAccCtrlAPI IXP400 ATM Driver Access (IxAtmdAcc) Control API
35 * @brief The public API for the IXP400 Atm Driver Control component
37 * IxAtmdAcc is the low level interface by which AAL PDU get transmitted
38 * to,and received from the Utopia bus
40 * This part is related to the Control configuration
45 #ifndef IXATMDACCCTRL_H
46 #define IXATMDACCCTRL_H
48 #include "IxAtmdAcc.h"
50 /* ------------------------------------------------------
51 AtmdAccCtrl Data Types definition
52 ------------------------------------------------------ */
56 * @ingroup IxAtmdAccCtrlAPI
58 * @def IX_ATMDACC_PORT_DISABLE_IN_PROGRESS
60 * @brief Port enable return code
62 * This constant is used to tell IxAtmDAcc user that the port disable
63 * functions are not complete. The user can call ixAtmdAccPortDisableComplete()
64 * to find out when the disable has finished. The port enable can then proceed.
67 #define IX_ATMDACC_PORT_DISABLE_IN_PROGRESS 5
71 * @ingroup IxAtmdAccCtrlAPI
73 * @def IX_ATMDACC_ALLPDUS
77 * This constant is used to tell IxAtmDAcc to process all PDUs from
78 * the RX queue or the TX Done
80 * @sa IxAtmdAccRxDispatcher
81 * @sa IxAtmdAccTxDoneDispatcher
84 #define IX_ATMDACC_ALLPDUS 0xffffffff
86 /* ------------------------------------------------------
87 Part of the IxAtmdAcc interface related to RX traffic
88 ------------------------------------------------------ */
92 * @ingroup IxAtmdAccCtrlAPI
94 * @brief Callback prototype for notification of available PDUs for
97 * This a protoype for a function which is called when there is at
98 * least one Pdu available for processing on a particular Rx Q.
100 * This function should call @a ixAtmdAccRxDispatch() with
101 * the aprropriate number of parameters to read and process the Rx Q.
103 * @sa ixAtmdAccRxDispatch
104 * @sa ixAtmdAccRxVcConnect
105 * @sa ixAtmdAccRxDispatcherRegister
107 * @param rxQueueId @ref IxAtmRxQueueId [in] indicates which RX queue to has Pdus to process.
108 * @param numberOfPdusToProcess unsigned int [in] indicates the minimum number of
109 * PDUs available to process all PDUs from the queue.
110 * @param reservedPtr unsigned int* [out] pointer to a int location which can
111 * be written to, but does not retain written values. This is
112 * provided to make this prototype compatible
113 * with @a ixAtmdAccRxDispatch()
115 * @return @li int - ignored.
118 typedef IX_STATUS (*IxAtmdAccRxDispatcher) (IxAtmRxQueueId rxQueueId,
119 unsigned int numberOfPdusToProcess,
120 unsigned int *reservedPtr);
122 /* ------------------------------------------------------
123 Part of the IxAtmdAcc interface related to TX traffic
124 ------------------------------------------------------ */
128 * @ingroup IxAtmdAccCtrlAPI
130 * @brief Callback prototype for transmitted mbuf when threshold level is
133 * IxAtmdAccTxDoneDispatcher is the prototype of the user function
134 * which get called when pdus are completely transmitted. This function
135 * is likely to call the @a ixAtmdAccTxDoneDispatch() function.
137 * This function is called when the number of available pdus for
138 * reception is crossing the threshold level as defined
139 * in @a ixAtmdAccTxDoneDispatcherRegister()
141 * This function is called inside an Qmgr dispatch context. No system
142 * resource or interrupt-unsafe feature should be used inside this
145 * Transmitted buffers recycling implementation is a sytem-wide mechanism
146 * and needs to be set before any traffic is started. If this threshold
147 * mechanism is not used, the user is responsible for polling the
148 * transmitted buffers with @a ixAtmdAccTxDoneDispatch()
149 * and @a ixAtmdAccTxDoneLevelQuery() functions.
151 * @sa ixAtmdAccTxDoneDispatcherRegister
152 * @sa ixAtmdAccTxDoneDispatch
153 * @sa ixAtmdAccTxDoneLevelQuery
155 * @param numberOfPdusToProcess unsigned int [in] - The current number of pdus currently
156 * available for recycling
157 * @param *reservedPtr unsigned int [out] - pointer to a int location which can be
158 * written to but does not retain written values. This is provided
159 * to make this prototype compatible
160 * with @a ixAtmdAccTxDoneDispatch()
162 * @return @li IX_SUCCESS This is provided to make
163 * this prototype compatible with @a ixAtmdAccTxDoneDispatch()
164 * @return @li IX_FAIL invalid parameters or some unspecified internal
165 * error occured. This is provided to make
166 * this prototype compatible with @a ixAtmdAccTxDoneDispatch()
169 typedef IX_STATUS (*IxAtmdAccTxDoneDispatcher) (unsigned int numberOfPdusToProcess,
170 unsigned int *reservedPtr);
174 * @ingroup IxAtmdAccCtrlAPI
176 * @brief Notification that the threshold number of scheduled cells
177 * remains in a port's transmit Q.
179 * The is the prototype for of the user notification function which
180 * gets called on a per-port basis, when the number of remaining
181 * scheduled cells to be transmitted decreases to the threshold level.
182 * The number of cells passed as a parameter can be used for scheduling
183 * purposes as the maximum number of cells that can be passed in a
184 * schedule table to the @a ixAtmdAccPortTxProcess() function.
186 * @sa ixAtmdAccPortTxCallbackRegister
187 * @sa ixAtmdAccPortTxProcess
188 * @sa ixAtmdAccPortTxFreeEntriesQuery
190 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
191 * @param numberOfAvailableCells unsigned int [in] - number of available
192 * cell entries.for the port
194 * @note - This functions shall not use system resources when used
195 * inside an interrupt context.
198 typedef void (*IxAtmdAccPortTxLowCallback) (IxAtmLogicalPort port,
199 unsigned int numberOfAvailableCells);
203 * @ingroup IxAtmdAccCtrlAPI
205 * @brief Prototype to submit cells for transmission
207 * IxAtmdAccTxVcDemandUpdateCallback is the prototype of the callback
208 * function used by AtmD to notify an ATM Scheduler that the user of
209 * a VC has submitted cells for transmission.
211 * @sa IxAtmdAccTxVcDemandUpdateCallback
212 * @sa IxAtmdAccTxVcDemandClearCallback
213 * @sa IxAtmdAccTxSchVcIdGetCallback
214 * @sa ixAtmdAccPortTxScheduledModeEnable
216 * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be updated
218 * @param vcId int [in] - Identifies the VC to be updated. This is the value
219 * returned by the @a IxAtmdAccTxSchVcIdGetCallback() call .
220 * @param numberOfCells unsigned int [in] - Indicates how many ATM cells should be added
221 * to the queue for this VC.
223 * @return @li IX_SUCCESS the function is registering the cell demand for
225 * @return @li IX_FAIL the function cannot register cell for this VC : the
226 * scheduler maybe overloaded or misconfigured
229 typedef IX_STATUS (*IxAtmdAccTxVcDemandUpdateCallback) (IxAtmLogicalPort port,
231 unsigned int numberOfCells);
235 * @ingroup IxAtmdAccCtrlAPI
237 * @brief prototype to remove all currently queued cells from a
240 * IxAtmdAccTxVcDemandClearCallback is the prototype of the function
241 * to remove all currently queued cells from a registered VC. The
242 * pending cell count for the specified VC is reset to zero. After the
243 * use of this callback, the scheduler shall not schedule more cells
246 * This callback function is called during a VC disconnection
247 * @a ixAtmdAccTxVcTryDisconnect()
249 * @sa IxAtmdAccTxVcDemandUpdateCallback
250 * @sa IxAtmdAccTxVcDemandClearCallback
251 * @sa IxAtmdAccTxSchVcIdGetCallback
252 * @sa ixAtmdAccPortTxScheduledModeEnable
253 * @sa ixAtmdAccTxVcTryDisconnect
255 * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be cleared
257 * @param vcId int [in] - Identifies the VC to be cleared. This is the value
258 * returned by the @a IxAtmdAccTxSchVcIdGetCallback() call .
263 typedef void (*IxAtmdAccTxVcDemandClearCallback) (IxAtmLogicalPort port,
268 * @ingroup IxAtmdAccCtrlAPI
270 * @brief prototype to get a scheduler vc id
272 * IxAtmdAccTxSchVcIdGetCallback is the prototype of the function to get
275 * @sa IxAtmdAccTxVcDemandUpdateCallback
276 * @sa IxAtmdAccTxVcDemandClearCallback
277 * @sa IxAtmdAccTxSchVcIdGetCallback
278 * @sa ixAtmdAccPortTxScheduledModeEnable
280 * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM logical port on which the VC is
282 * @param vpi unsigned int [in] - For AAL0/AAL5 specifies the ATM vpi on which the
284 * For OAM specifies the dedicated "OAM Tx channel" VPI.
285 * @param vci unsigned int [in] - For AAL0/AAL5 specifies the ATM vci on which the
287 * For OAM specifies the dedicated "OAM Tx channel" VCI.
288 * @param connId @ref IxAtmConnId [in] - specifies the IxAtmdAcc connection Id already
289 * associated with this VC
290 * @param vcId int* [out] - pointer to a vcId
292 * @return @li IX_SUCCESS the function is returning a Scheduler vcId for this
294 * @return @li IX_FAIL the function cannot process scheduling for this VC.
295 * the contents of vcId is unspecified
298 typedef IX_STATUS (*IxAtmdAccTxSchVcIdGetCallback) (IxAtmLogicalPort port,
304 /* ------------------------------------------------------
305 Part of the IxAtmdAcc interface related to RX traffic
306 ------------------------------------------------------ */
310 * @ingroup IxAtmdAccCtrlAPI
312 * @fn ixAtmdAccRxDispatcherRegister (
313 IxAtmRxQueueId queueId,
314 IxAtmdAccRxDispatcher callback)
316 * @brief Register a notification callback to be invoked when there is
317 * at least one entry on a particular Rx queue.
319 * This function registers a callback to be invoked when there is at
320 * least one entry in a particular queue. The registered callback is
321 * called every time when the hardware adds one or more pdus to the
322 * specified Rx queue.
324 * This function cannot be used when a Rx Vc using this queue is
327 * @note -The callback function can be the API function
328 * @a ixAtmdAccRxDispatch() : every time the threhold level
329 * of the queue is reached, the ixAtmdAccRxDispatch() is
330 * invoked to remove all entries from the queue.
332 * @sa ixAtmdAccRxDispatch
333 * @sa IxAtmdAccRxDispatcher
335 * @param queueId @ref IxAtmRxQueueId [in] RX queue identification
336 * @param callback @ref IxAtmdAccRxDispatcher [in] function triggering the delivery of incoming
337 * traffic. This parameter cannot be a null pointer.
339 * @return @li IX_SUCCESS Successful call to @a ixAtmdAccRxDispatcherRegister()
340 * @return @li IX_FAIL error in the parameters, or there is an
341 * already active RX VC for this queue or some unspecified
342 * internal error occurred.
345 PUBLIC IX_STATUS ixAtmdAccRxDispatcherRegister (
346 IxAtmRxQueueId queueId,
347 IxAtmdAccRxDispatcher callback);
351 * @ingroup IxAtmdAccCtrlAPI
353 * @fn ixAtmdAccRxDispatch (IxAtmRxQueueId rxQueueId,
354 unsigned int numberOfPdusToProcess,
355 unsigned int *numberOfPdusProcessedPtr)
358 * @brief Control function which executes Rx processing for a particular
361 * The @a IxAtmdAccRxDispatch() function is used to process received Pdus
362 * available from one of the two incoming RX streams. When this function
363 * is invoked, the incoming traffic (up to the number of PDUs passed as
364 * a parameter) will be transferred to the IxAtmdAcc users through the
365 * callback @a IxAtmdAccRxVcRxCallback(), as registered during the
366 * @a ixAtmdAccRxVcConnect() call.
368 * The user receive callbacks will be executed in the context of this
371 * Failing to use this function on a regular basis when there is traffic
372 * will block incoming traffic and can result in Pdus being dropped by
375 * This should be used to control when received pdus are handed off from
376 * the hardware to Aal users from a particluar stream. The function can
377 * be used from a timer context, or can be registered as a callback in
378 * response to an rx stream threshold event, or can be used inside an
379 * active polling mechanism which is under user control.
381 * @note - The signature of this function is directly compatible with the
382 * callback prototype which can be register with @a ixAtmdAccRxDispatcherRegister().
384 * @sa ixAtmdAccRxDispatcherRegister
385 * @sa IxAtmdAccRxVcRxCallback
386 * @sa ixAtmdAccRxVcFreeEntriesQuery
388 * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which RX queue to process.
389 * @param numberOfPdusToProcess unsigned int [in] - indicates the maxiumum number of PDU to
390 * remove from the RX queue. A value of IX_ATMDACC_ALLPDUS indicates
391 * to process all PDUs from the queue. This includes at least the PDUs
392 * in the queue when the fuction is invoked. Because of real-time
393 * constraints, there is no guarantee thatthe queue will be empty
394 * when the function exits. If this parameter is greater than the
395 * number of entries of the queues, the function will succeed
396 * and the parameter numberOfPdusProcessedPtr will reflect the exact
397 * number of PDUs processed.
398 * @param *numberOfPdusProcessedPtr unsigned int [out] - indicates the actual number of PDU
399 * processed during this call. This parameter cannot be a null
402 * @return @li IX_SUCCESS the number of PDUs as indicated in
403 * numberOfPdusProcessedPtr are removed from the RX queue and the VC callback
405 * @return @li IX_FAIL invalid parameters or some unspecified internal
409 PUBLIC IX_STATUS ixAtmdAccRxDispatch (IxAtmRxQueueId rxQueueId,
410 unsigned int numberOfPdusToProcess,
411 unsigned int *numberOfPdusProcessedPtr);
415 * @ingroup IxAtmdAccCtrlAPI
417 * @fn ixAtmdAccRxLevelQuery (IxAtmRxQueueId rxQueueId,
418 unsigned int *numberOfPdusPtr)
420 * @brief Query the number of entries in a particular RX queue.
422 * This function is used to retrieve the number of pdus received by
423 * the hardware and ready for distribution to users.
425 * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which of two RX queues to query.
426 * @param numberOfPdusPtr unsigned int* [out] - Pointer to store the number of available
427 * PDUs in the RX queue. This parameter cannot be a null pointer.
429 * @return @li IX_SUCCESS the value in numberOfPdusPtr specifies the
430 * number of incoming pdus waiting in this queue
431 * @return @li IX_FAIL an error occurs during processing.
432 * The value in numberOfPdusPtr is unspecified.
434 * @note - This function is reentrant, doesn't use system resources
435 * and can be used from an interrupt context.
438 PUBLIC IX_STATUS ixAtmdAccRxLevelQuery (IxAtmRxQueueId rxQueueId,
439 unsigned int *numberOfPdusPtr);
443 * @ingroup IxAtmdAccCtrlAPI
445 * @fn ixAtmdAccRxQueueSizeQuery (IxAtmRxQueueId rxQueueId,
446 unsigned int *numberOfPdusPtr)
448 * @brief Query the size of a particular RX queue.
450 * This function is used to retrieve the number of pdus the system is
451 * able to queue when reception is complete.
453 * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which of two RX queues to query.
454 * @param numberOfPdusPtr unsigned int* [out] - Pointer to store the number of pdus
455 * the system is able to queue in the RX queue. This parameter
456 * cannot be a null pointer.
458 * @return @li IX_SUCCESS the value in numberOfPdusPtr specifies the
459 * number of pdus the system is able to queue.
460 * @return @li IX_FAIL an error occurs during processing.
461 * The value in numberOfPdusPtr is unspecified.
463 * @note - This function is reentrant, doesn't use system resources
464 * and can be used from an interrupt context.
467 PUBLIC IX_STATUS ixAtmdAccRxQueueSizeQuery (IxAtmRxQueueId rxQueueId,
468 unsigned int *numberOfPdusPtr);
470 /* ------------------------------------------------------
471 Part of the IxAtmdAcc interface related to TX traffic
472 ------------------------------------------------------ */
476 * @ingroup IxAtmdAccCtrlAPI
478 * @fn ixAtmdAccPortTxFreeEntriesQuery (IxAtmLogicalPort port,
479 unsigned int *numberOfCellsPtr)
481 * @brief Get the number of available cells the system can accept for
484 * The function is used to retrieve the number of cells that can be
485 * queued for transmission to the hardware.
487 * This number is based on the worst schedule table where one cell
488 * is stored in one schedule table entry, depending on the pdus size
489 * and mbuf size and fragmentation.
491 * This function doesn't use system resources and can be used from a
492 * timer context, or can be associated with a threshold event, or can
493 * be used inside an active polling mechanism
495 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
496 * @param numberOfCellsPtr unsigned int* [out] - number of available cells.
497 * This parameter cannot be a null pointer.
499 * @sa ixAtmdAccPortTxProcess
501 * @return @li IX_SUCCESS numberOfCellsPtr contains the number of cells that can be scheduled
503 * @return @li IX_FAIL error in the parameters, or some processing error
507 PUBLIC IX_STATUS ixAtmdAccPortTxFreeEntriesQuery (IxAtmLogicalPort port,
508 unsigned int *numberOfCellsPtr);
512 * @ingroup IxAtmdAccCtrlAPI
514 * @fn ixAtmdAccPortTxCallbackRegister (IxAtmLogicalPort port,
515 unsigned int numberOfCells,
516 IxAtmdAccPortTxLowCallback callback)
518 * @brief Configure the Tx port threshold value and register a callback to handle
519 * threshold notifications.
521 * This function sets the threshold in cells
523 * @sa ixAtmdAccPortTxCallbackRegister
524 * @sa ixAtmdAccPortTxProcess
525 * @sa ixAtmdAccPortTxFreeEntriesQuery
527 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
528 * @param numberOfCells unsigned int [in] - threshold value which triggers the callback
529 * invocation, This number has to be one of the
530 * values 0,1,2,4,8,16,32 ....
531 * The maximum value cannot be more than half of the txVc queue
532 * size (which can be retrieved using @a ixAtmdAccPortTxFreeEntriesQuery()
533 * before any Tx traffic is sent for this port)
534 * @param callback @ref IxAtmdAccPortTxLowCallback [in] - callback function to invoke when the threshold
536 * This parameter cannot be a null pointer.
538 * @return @li IX_SUCCESS Successful call to @a ixAtmdAccPortTxCallbackRegister()
539 * @return @li IX_FAIL error in the parameters, Tx channel already set for this port
540 * threshold level is not correct or within the range regarding the
541 * queue size:or unspecified error during processing:
543 * @note - This callback function get called when the threshold level drops from
544 * (numberOfCells+1) cells to (numberOfCells) cells
546 * @note - This function should be called during system initialisation,
547 * outside an interrupt context
550 PUBLIC IX_STATUS ixAtmdAccPortTxCallbackRegister (IxAtmLogicalPort port,
551 unsigned int numberOfCells,
552 IxAtmdAccPortTxLowCallback callback);
556 * @ingroup IxAtmdAccCtrlAPI
558 * @fn ixAtmdAccPortTxScheduledModeEnable (IxAtmLogicalPort port,
559 IxAtmdAccTxVcDemandUpdateCallback vcDemandUpdateCallback,
560 IxAtmdAccTxVcDemandClearCallback vcDemandClearCallback,
561 IxAtmdAccTxSchVcIdGetCallback vcIdGetCallback)
563 * @brief Put the port into Scheduled Mode
565 * This function puts the specified port into scheduled mode of
566 * transmission which means an external s/w entity controls the
567 * transmission of cells on this port. This faciltates traffic shaping on
570 * Any buffers submitted on a VC for this port will be queued in IxAtmdAcc.
571 * The transmission of these buffers to and by the hardware will be driven
572 * by a transmit schedule submitted regulary in calls to
573 * @a ixAtmdAccPortTxProcess() by traffic shaping entity.
575 * The transmit schedule is expected to be dynamic in nature based on
576 * the demand in cells for each VC on the port. Hence the callback
577 * parameters provided to this function allow IxAtmdAcc to inform the
578 * shaping entity of demand changes for each VC on the port.
580 * By default a port is in Unscheduled Mode so if this function is not
581 * called, transmission of data is done without sheduling rules, on a
582 * first-come, first-out basis.
584 * Once a port is put in scheduled mode it cannot be reverted to
585 * un-scheduled mode. Note that unscheduled mode is not supported
588 * @note - This function should be called before any VCs have be
589 * connected on a port. Otherwise this function call will return failure.
591 * @note - This function uses internal locks and should not be called from
592 * an interrupt context
594 * @sa IxAtmdAccTxVcDemandUpdateCallback
595 * @sa IxAtmdAccTxVcDemandClearCallback
596 * @sa IxAtmdAccTxSchVcIdGetCallback
597 * @sa ixAtmdAccPortTxProcess
599 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
600 * @param vcDemandUpdateCallback @ref IxAtmdAccTxVcDemandUpdateCallback [in] - callback function used to update
601 * the number of outstanding cells for transmission. This parameter
602 * cannot be a null pointer.
603 * @param vcDemandClearCallback @ref IxAtmdAccTxVcDemandClearCallback [in] - callback function used to remove all
604 * clear the number of outstanding cells for a VC. This parameter
605 * cannot be a null pointer.
606 * @param vcIdGetCallback @ref IxAtmdAccTxSchVcIdGetCallback [in] - callback function used to exchange vc
607 * Identifiers between IxAtmdAcc and the entity supplying the
608 * transmit schedule. This parameter cannot be a null pointer.
610 * @return @li IX_SUCCESS scheduler registration is complete and the port
611 * is now in scheduled mode.
612 * @return @li IX_FAIL failed (wrong parameters, or traffic is already
613 * enabled on this port, possibly without ATM shaping)
616 PUBLIC IX_STATUS ixAtmdAccPortTxScheduledModeEnable (IxAtmLogicalPort port,
617 IxAtmdAccTxVcDemandUpdateCallback vcDemandUpdateCallback,
618 IxAtmdAccTxVcDemandClearCallback vcDemandClearCallback,
619 IxAtmdAccTxSchVcIdGetCallback vcIdGetCallback);
623 * @ingroup IxAtmdAccCtrlAPI
625 * @fn ixAtmdAccPortTxProcess (IxAtmLogicalPort port,
626 IxAtmScheduleTable* scheduleTablePtr)
628 * @brief Transmit queue cells to the H/W based on the supplied schedule
631 * This function @a ixAtmdAccPortTxProcess() process the schedule
632 * table provided as a parameter to the function. As a result cells are
633 * sent to the underlaying hardware for transmission.
635 * The schedule table is executed in its entirety or not at all. So the
636 * onus is on the caller not to submit a table containing more cells than
637 * can be transmitted at that point. The maximum numbers that can be
638 * transmitted is guaranteed to be the number of cells as returned by the
639 * function @a ixAtmdAccPortTxFreeEntriesQuery().
641 * When the scheduler is invoked on a threshold level, IxAtmdAcc gives the
642 * minimum number of cells (to ensure the callback will fire again later)
643 * and the maximum number of cells that @a ixAtmdAccPortTxProcess()
644 * will be able to process (assuming the ATM scheduler is able
645 * to produce the worst-case schedule table, i.e. one entry per cell).
647 * When invoked ouside a threshold level, the overall number of cells of
648 * the schedule table should be less than the number of cells returned
649 * by the @a ixAtmdAccPortTxFreeEntriesQuery() function.
651 * After invoking the @a ixAtmdAccPortTxProcess() function, it is the
652 * user choice to query again the queue level with the function
653 * @a ixAtmdAccPortTxFreeEntriesQuery() and, depending on a new cell
654 * number, submit an other schedule table.
656 * IxAtmdAcc will check that the number of cells in the schedule table
657 * is compatible with the current transmit level. If the
659 * Obsolete or invalid connection Id will be silently discarded.
661 * This function is not reentrant for the same port.
663 * This functions doesn't use system resources and can be used inside an
666 * This function is used as a response to the hardware requesting more
669 * @sa ixAtmdAccPortTxScheduledModeEnable
670 * @sa ixAtmdAccPortTxFreeEntriesQuery
671 * @sa ixAtmdAccPortTxCallbackRegister
672 * @sa ixAtmdAccPortEnable
674 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
675 * @param scheduleTablePtr @ref IxAtmScheduleTable* [in] - pointer to a scheduler update table. The
676 * content of this table is not modified by this function. This
677 * parameter cannot be a null pointer.
679 * @return @li IX_SUCCESS the schedule table process is complete
680 * and cells are transmitted to the hardware
681 * @return @li IX_ATMDACC_WARNING : Traffic will be dropped: the schedule table exceed
682 * the hardware capacity If this error is ignored, further traffic
683 * and schedule will work correctly.
684 * Overscheduling does not occur when the schedule table does
685 * not contain more entries that the number of free entries returned
686 * by @a ixAtmdAccPortTxFreeEntriesQuery().
687 * However, Disconnect attempts just after this error will fail permanently
688 * with the error code @a IX_ATMDACC_RESOURCES_STILL_ALLOCATED, and it is
689 * necessary to disable the port to make @a ixAtmdAccTxVcTryDisconnect()
691 * @return @li IX_FAIL a wrong parameter is supplied, or the format of
692 * the schedule table is invalid, or the port is not Enabled, or
693 * an internal severe error occured. No cells is transmitted to the hardware
695 * @note - If the failure is linked to an overschedule of data cells
696 * the result is an inconsistency in the output traffic (one or many
697 * cells may be missing and the traffic contract is not respected).
700 PUBLIC IX_STATUS ixAtmdAccPortTxProcess (IxAtmLogicalPort port,
701 IxAtmScheduleTable* scheduleTablePtr);
705 * @ingroup IxAtmdAccCtrlAPI
707 * @fn ixAtmdAccTxDoneDispatch (unsigned int numberOfPdusToProcess,
708 unsigned int *numberOfPdusProcessedPtr)
710 * @brief Process a number of pending transmit done pdus from the hardware.
712 * As a by-product of Atm transmit operation buffers which transmission
713 * is complete need to be recycled to users. This function is invoked
714 * to service the oustanding list of transmitted buffers and pass them
717 * Users are handed back pdus by invoking the free callback registered
718 * during the @a ixAtmdAccTxVcConnect() call.
720 * There is a single Tx done stream servicing all active Atm Tx ports
721 * which can contain a maximum of 64 entries. If this stream fills port
722 * transmission will stop so this function must be call sufficently
723 * frequently to ensure no disruption to the transmit operation.
725 * This function can be used from a timer context, or can be associated
726 * with a TxDone level threshold event (see @a ixAtmdAccTxDoneDispatcherRegister() ),
727 * or can be used inside an active polling mechanism under user control.
729 * For ease of use the signature of this function is compatible with the
730 * TxDone threshold event callback prototype.
732 * This functions can be used inside an interrupt context.
734 * @sa ixAtmdAccTxDoneDispatcherRegister
735 * @sa IxAtmdAccTxVcBufferReturnCallback
736 * @sa ixAtmdAccTxDoneLevelQuery
738 * @param numberOfPdusToProcess unsigned int [in] - maxiumum number of pdus to remove
739 * from the TX Done queue
740 * @param *numberOfPdusProcessedPtr unsigned int [out] - number of pdus removed from
741 * the TX Done queue. This parameter cannot be a null pointer.
743 * @return @li IX_SUCCESS the number of pdus as indicated in
744 * numberOfPdusToProcess are removed from the TX Done hardware
745 * and passed to the user through the Tx Done callback registered
746 * during a call to @a ixAtmdAccTxVcConnect()
747 * @return @li IX_FAIL invalid parameters or numberOfPdusProcessedPtr is
748 * a null pointer or some unspecified internal error occured.
752 ixAtmdAccTxDoneDispatch (unsigned int numberOfPdusToProcess,
753 unsigned int *numberOfPdusProcessedPtr);
757 * @ingroup IxAtmdAccCtrlAPI
759 * @fn ixAtmdAccTxDoneLevelQuery (unsigned int *numberOfPdusPtr)
761 * @brief Query the current number of transmit pdus ready for
764 * This function is used to get the number of transmitted pdus which
765 * the hardware is ready to hand back to user.
767 * This function can be used from a timer context, or can be associated
768 * with a threshold event, on can be used inside an active polling
771 * @sa ixAtmdAccTxDoneDispatch
773 * @param *numberOfPdusPtr unsigned int [out] - Pointer to the number of pdus transmitted
774 * at the time of this function call, and ready for recycling
775 * This parameter cannot be a null pointer.
777 * @return @li IX_SUCCESS numberOfPdusPtr contains the number of pdus
778 * ready for recycling at the time of this function call
780 * @return @li IX_FAIL wrong parameter (null pointer as parameter).or
781 * unspecified rocessing error occurs..The value in numberOfPdusPtr
786 ixAtmdAccTxDoneLevelQuery (unsigned int *numberOfPdusPtr);
790 * @ingroup IxAtmdAccCtrlAPI
792 * @fn ixAtmdAccTxDoneQueueSizeQuery (unsigned int *numberOfPdusPtr)
794 * @brief Query the TxDone queue size.
796 * This function is used to get the number of pdus which
797 * the hardware is able to store after transmission is complete
799 * The returned value can be used to set a threshold and enable
800 * a callback to be notified when the number of pdus is going over
803 * @sa ixAtmdAccTxDoneDispatcherRegister
805 * @param *numberOfPdusPtr unsigned int [out] - Pointer to the number of pdus the system
806 * is able to queue after transmission
808 * @return @li IX_SUCCESS numberOfPdusPtr contains the the number of
809 * pdus the system is able to queue after transmission
810 * @return @li IX_FAIL wrong parameter (null pointer as parameter).or
811 * unspecified rocessing error occurs..The value in numberOfPdusPtr
814 * @note - This function is reentrant, doesn't use system resources
815 * and can be used from an interrupt context.
818 ixAtmdAccTxDoneQueueSizeQuery (unsigned int *numberOfPdusPtr);
822 * @ingroup IxAtmdAccCtrlAPI
824 * @fn ixAtmdAccTxDoneDispatcherRegister (unsigned int numberOfPdus,
825 IxAtmdAccTxDoneDispatcher notificationCallback)
827 * @brief Configure the Tx Done stream threshold value and register a
828 * callback to handle threshold notifications.
830 * This function sets the threshold level in term of number of pdus at
831 * which the supplied notification function should be called.
833 * The higher the threshold value is, the less events will be necessary
834 * to process transmitted buffers.
836 * Transmitted buffers recycling implementation is a sytem-wide mechanism
837 * and needs to be set prior any traffic is started. If this threshold
838 * mechanism is not used, the user is responsible for polling the
839 * transmitted buffers thanks to @a ixAtmdAccTxDoneDispatch() and
840 * @a ixAtmdAccTxDoneLevelQuery() functions.
842 * This function should be called during system initialisation outside
843 * an interrupt context
845 * @sa ixAtmdAccTxDoneDispatcherRegister
846 * @sa ixAtmdAccTxDoneDispatch
847 * @sa ixAtmdAccTxDoneLevelQuery
849 * @param numberOfPdus unsigned int [in] - The number of TxDone pdus which triggers the
850 * callback invocation This number has to be a power of 2, one of the
851 * values 0,1,2,4,8,16,32 ...
852 * The maximum value cannot be more than half of the txDone queue
853 * size (which can be retrieved using @a ixAtmdAccTxDoneQueueSizeQuery())
854 * @param notificationCallback @ref IxAtmdAccTxDoneDispatcher [in] - The function to invoke. (This
855 * parameter can be @a ixAtmdAccTxDoneDispatch()).This
856 * parameter ust not be a null pointer.
858 * @return @li IX_SUCCESS Successful call to ixAtmdAccTxDoneDispatcherRegister
859 * @return @li IX_FAIL error in the parameters:
861 * @note - The notificationCallback will be called exactly when the threshold level
862 * will increase from (numberOfPdus) to (numberOfPdus+1)
864 * @note - If there is no Tx traffic, there is no guarantee that TxDone Pdus will
865 * be released to the user (when txDone level is permanently under the threshold
866 * level. One of the preffered way to return resources to the user is to use
867 * a mix of txDone notifications, used together with a slow
868 * rate timer and an exclusion mechanism protecting from re-entrancy
870 * @note - The TxDone threshold will only hand back buffers when the threshold level is
871 * crossed. Setting this threshold to a great number reduce the interrupt rate
872 * and the cpu load, but also increase the number of outstanding mbufs and has
873 * a system wide impact when these mbufs are needed by other components.
876 PUBLIC IX_STATUS ixAtmdAccTxDoneDispatcherRegister (unsigned int numberOfPdus,
877 IxAtmdAccTxDoneDispatcher notificationCallback);
879 /* ------------------------------------------------------
880 Part of the IxAtmdAcc interface related to Utopia config
881 ------------------------------------------------------ */
885 * @ingroup IxAtmdAccCtrlAPI
887 * @defgroup IxAtmdAccUtopiaCtrlAPI IXP400 ATM Driver Access (IxAtmdAcc) Utopia Control API
889 * @brief The public API for the IXP400 Atm Driver Control component
891 * IxAtmdAcc is the low level interface by which AAL PDU get
892 * transmitted to,and received from the Utopia bus
894 * This part is related to the UTOPIA configuration.
901 * @brief Utopia configuration
903 * This structure is used to set the Utopia parameters
904 * @li contains the values of Utopia registers, to be set during initialisation
905 * @li contains debug commands for NPE, to be used during development steps
907 * @note - the exact description of all parameters is done in the Utopia reference
914 * @ingroup IxAtmdAccUtopiaCtrlAPI
915 * @struct UtTxConfig_
916 * @brief Utopia Tx Config Register
921 unsigned int reserved_1:1; /**< [31] These bits are always 0.*/
922 unsigned int txInterface:1; /**< [30] Utopia Transmit Interface. The following encoding
923 * is used to set the Utopia Transmit interface as ATM master
928 unsigned int txMode:1; /**< [29] Utopia Transmit Mode. The following encoding is used
929 * to set the Utopia Transmit mode to SPHY or MPHY:
933 unsigned int txOctet:1; /**< [28] Utopia Transmit cell transfer protocol. Used to set
934 * the Utopia cell transfer protocol to Octet-level handshaking.
935 * Note this is only applicable in SPHY mode.
936 * @li 1 - Octet-handshaking enabled
937 * @li 0 - Cell-handshaking enabled
939 unsigned int txParity:1; /**< [27] Utopia Transmit parity enabled when set. TxEvenParity
940 * defines the parity format odd/even.
941 * @li 1 - Enable Parity generation.
942 * @li 0 - ut_op_prty held low.
944 unsigned int txEvenParity:1; /**< [26] Utopia Transmit Parity Mode
945 * @li 1 - Even Parity Generated.
946 * @li 0 - Odd Parity Generated.
948 unsigned int txHEC:1; /**< [25] Header Error Check Insertion Mode. Specifies if the transmit
949 * cell header check byte is calculated and inserted when set.
950 * @li 1 - Generate HEC.
951 * @li 0 - Disable HEC generation.
953 unsigned int txCOSET:1; /**< [24] If enabled the HEC is Exclusive-OR'ed with the value 0x55 before
954 * being presented on the Utopia bus.
955 * @li 1 - Enable HEC ExOR with value 0x55
956 * @li 0 - Use generated HEC value.
959 unsigned int reserved_2:1; /**< [23] These bits are always 0
961 unsigned int txCellSize:7; /**< [22:16] Transmit expected cell size. Configures the cell size
962 * for the transmit module: Values between 52-64 are valid.
964 unsigned int reserved_3:3; /**< [15:13] These bits are always 0 */
965 unsigned int txAddrRange:5; /**< [12:8] When configured as an ATM master in MPHY mode this
966 * register specifies the upper limit of the PHY polling logical
967 * range. The number of active PHYs are TxAddrRange + 1.
969 unsigned int reserved_4:3; /**< [7:5] These bits are always 0 */
970 unsigned int txPHYAddr:5; /**< [4:0] When configured as a slave in an MPHY system this register
971 * specifies the physical address of the PHY.
975 utTxConfig; /**< Tx config Utopia register */
978 * @ingroup IxAtmdAccUtopiaCtrlAPI
979 * @struct UtTxStatsConfig_
980 * @brief Utopia Tx stats Register
982 struct UtTxStatsConfig_
985 unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
986 @li Note: if VCStatsTxGFC is set to 0 the GFC field is ignored in test. */
988 unsigned int vci:16; /**< [19:4] ATM VCI [15:0] or PHY Address[4] */
990 unsigned int pti:3; /**< [3:1] ATM PTI [2:0] or PHY Address[3:1]
991 @li Note: if VCStatsTxPTI is set to 0 the PTI field is ignored in test.
992 @li Note: if VCStatsTxEnb is set to 0 only the transmit PHY port
993 address as defined by this register is used for ATM statistics [4:0]. */
995 unsigned int clp:1; /**< [0] ATM CLP or PHY Address [0]
996 @li Note: if VCStatsTxCLP is set to 0 the CLP field is ignored in test.
997 @li Note: if VCStatsTxEnb is set to 0 only the transmit PHY port
998 address as defined by this register is used for ATM statistics [4:0]. */
1001 utTxStatsConfig; /**< Tx stats config Utopia register */
1004 * @ingroup IxAtmdAccUtopiaCtrlAPI
1005 * @struct UtTxDefineIdle_
1006 * @brief Utopia Tx idle cells Register
1008 struct UtTxDefineIdle_
1011 unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
1012 @li Note: if VCIdleTxGFC is set to 0 the GFC field is ignored in test. */
1014 unsigned int vci:16; /**< [19:4] ATM VCI [15:0] */
1016 unsigned int pti:3; /**< [3:1] ATM PTI PTI [2:0]
1017 @li Note: if VCIdleTxPTI is set to 0 the PTI field is ignored in test.*/
1019 unsigned int clp:1; /**< [0] ATM CLP [0]
1020 @li Note: if VCIdleTxCLP is set to 0 the CLP field is ignored in test.*/
1023 utTxDefineIdle; /**< Tx idle cell config Utopia register */
1026 * @ingroup IxAtmdAccUtopiaCtrlAPI
1027 * @struct UtTxEnableFields_
1028 * @brief Utopia Tx ienable fields Register
1030 struct UtTxEnableFields_
1033 unsigned int defineTxIdleGFC:1; /**< [31] This register is used to include or exclude the GFC
1034 field of the ATM header when testing for Idle cells.
1035 @li 1 - GFC field is valid.
1036 @li 0 - GFC field ignored.*/
1038 unsigned int defineTxIdlePTI:1; /**< [30] This register is used to include or exclude the PTI
1039 field of the ATM header when testing for Idle cells.
1040 @li 1 - PTI field is valid
1041 @li 0 - PTI field ignored.*/
1043 unsigned int defineTxIdleCLP:1; /**< [29] This register is used to include or
1044 exclude the CLP field of the ATM header when testing for Idle cells.
1045 @li 1 - CLP field is valid.
1046 @li 0 - CLP field ignored. */
1048 unsigned int phyStatsTxEnb:1; /**< [28] This register is used to enable or disable ATM
1049 statistics gathering based on the specified PHY address as defined
1050 in TxStatsConfig register.
1051 @li 1 - Enable statistics for specified transmit PHY address.
1052 @li 0 - Disable statistics for specified transmit PHY address. */
1054 unsigned int vcStatsTxEnb:1; /**< [27] This register is used to change the ATM
1055 statistics-gathering mode from the specified logical PHY address
1056 to a specific VPI/VCI address.
1057 @li 1 - Enable statistics for specified VPI/VCI address.
1058 @li 0 - Disable statistics for specified VPI/VCI address */
1060 unsigned int vcStatsTxGFC:1; /**< [26] This register is used to include or exclude the GFC
1061 field of the ATM header when ATM VPI/VCI statistics are enabled.
1062 GFC is only available at the UNI and uses the first 4-bits of
1064 @li 1 - GFC field is valid
1065 @li 0 - GFC field ignored.*/
1067 unsigned int vcStatsTxPTI:1; /**< [25] This register is used to include or exclude the PTI
1068 field of the ATM header when ATM VPI/VCI statistics are enabled.
1069 @li 1 - PTI field is valid
1070 @li 0 - PTI field ignored.*/
1072 unsigned int vcStatsTxCLP:1; /**< [24] This register is used to include or exclude the CLP
1073 field of the ATM header when ATM VPI/VCI statistics are enabled.
1074 @li 1 - CLP field is valid
1075 @li 0 - CLP field ignored. */
1077 unsigned int reserved_1:3; /**< [23-21] These bits are always 0 */
1079 unsigned int txPollStsInt:1; /**< [20] Enable the assertion of the ucp_tx_poll_sts condition
1080 where there is a change in polling status.
1081 @li 1 - ucp_tx_poll_sts asserted whenever there is a change in status
1082 @li 0 - ucp_tx_poll_sts asserted if ANY transmit PHY is available
1084 unsigned int txCellOvrInt:1; /**< [19] Enable TxCellCount overflow CBI Transmit Status condition
1086 @li 1 - If TxCellCountOvr is set assert the Transmit Status Condition.
1087 @li 0 - No CBI Transmit Status condition assertion */
1089 unsigned int txIdleCellOvrInt:1; /**< [18] Enable TxIdleCellCount overflow Transmit Status Condition
1090 @li 1 - If TxIdleCellCountOvr is set assert the Transmit Status Condition
1091 @li 0 - No CBI Transmit Status condition assertion..*/
1093 unsigned int enbIdleCellCnt:1; /**< [17] Enable Transmit Idle Cell Count.
1094 @li 1 - Enable count of Idle cells transmitted.
1095 @li 0 - No count is maintained. */
1097 unsigned int enbTxCellCnt:1; /**< [16] Enable Transmit Valid Cell Count of non-idle/non-error cells
1098 @li 1 - Enable count of valid cells transmitted- non-idle/non-error
1099 @li 0 - No count is maintained.*/
1101 unsigned int reserved_2:16; /**< [15:0] These bits are always 0 */
1102 } utTxEnableFields; /**< Tx enable Utopia register */
1105 * @ingroup IxAtmdAccUtopiaCtrlAPI
1106 * @struct UtTxTransTable0_
1107 * @brief Utopia Tx translation table Register
1109 struct UtTxTransTable0_
1112 unsigned int phy0:5; /**< [31-27] Tx Mapping value of logical phy 0 */
1114 unsigned int phy1:5; /**< [26-22] Tx Mapping value of logical phy 1 */
1116 unsigned int phy2:5; /**< [21-17] Tx Mapping value of logical phy 2 */
1118 unsigned int reserved_1:1; /**< [16] These bits are always 0.*/
1120 unsigned int phy3:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1122 unsigned int phy4:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1124 unsigned int phy5:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1126 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1127 } utTxTransTable0; /**< Tx translation table */
1130 * @ingroup IxAtmdAccUtopiaCtrlAPI
1131 * @struct UtTxTransTable1_
1132 * @brief Utopia Tx translation table Register
1134 struct UtTxTransTable1_
1137 unsigned int phy6:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1139 unsigned int phy7:5; /**< [26-22] Tx Mapping value of logical phy 7 */
1141 unsigned int phy8:5; /**< [21-17] Tx Mapping value of logical phy 8 */
1143 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1145 unsigned int phy9:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1147 unsigned int phy10:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1149 unsigned int phy11:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1151 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1152 } utTxTransTable1; /**< Tx translation table */
1155 * @ingroup IxAtmdAccUtopiaCtrlAPI
1156 * @struct UtTxTransTable2_
1157 * @brief Utopia Tx translation table Register
1159 struct UtTxTransTable2_
1162 unsigned int phy12:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1164 unsigned int phy13:5; /**< [26-22] Tx Mapping value of logical phy 7 */
1166 unsigned int phy14:5; /**< [21-17] Tx Mapping value of logical phy 8 */
1168 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1170 unsigned int phy15:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1172 unsigned int phy16:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1174 unsigned int phy17:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1176 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1177 } utTxTransTable2; /**< Tx translation table */
1180 * @ingroup IxAtmdAccUtopiaCtrlAPI
1181 * @struct UtTxTransTable3_
1182 * @brief Utopia Tx translation table Register
1184 struct UtTxTransTable3_
1187 unsigned int phy18:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1189 unsigned int phy19:5; /**< [26-22] Tx Mapping value of logical phy 7 */
1191 unsigned int phy20:5; /**< [21-17] Tx Mapping value of logical phy 8 */
1193 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1195 unsigned int phy21:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1197 unsigned int phy22:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1199 unsigned int phy23:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1201 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1202 } utTxTransTable3; /**< Tx translation table */
1205 * @ingroup IxAtmdAccUtopiaCtrlAPI
1206 * @struct UtTxTransTable4_
1207 * @brief Utopia Tx translation table Register
1209 struct UtTxTransTable4_
1212 unsigned int phy24:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1214 unsigned int phy25:5; /**< [26-22] Tx Mapping value of logical phy 7 */
1216 unsigned int phy26:5; /**< [21-17] Tx Mapping value of logical phy 8 */
1218 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1220 unsigned int phy27:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1222 unsigned int phy28:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1224 unsigned int phy29:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1226 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1227 } utTxTransTable4; /**< Tx translation table */
1230 * @ingroup IxAtmdAccUtopiaCtrlAPI
1231 * @struct UtTxTransTable5_
1232 * @brief Utopia Tx translation table Register
1234 struct UtTxTransTable5_
1237 unsigned int phy30:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1239 unsigned int reserved_1:27; /**< [26-0] These bits are always 0 */
1241 } utTxTransTable5; /**< Tx translation table */
1244 * @ingroup IxAtmdAccUtopiaCtrlAPI
1245 * @struct UtRxConfig_
1246 * @brief Utopia Rx config Register
1251 unsigned int rxInterface:1; /**< [31] Utopia Receive Interface. The following encoding is used
1252 to set the Utopia Receive interface as ATM master or PHY slave:
1256 unsigned int rxMode:1; /**< [30] Utopia Receive Mode. The following encoding is used to set
1257 the Utopia Receive mode to SPHY or MPHY:
1261 unsigned int rxOctet:1; /**< [29] Utopia Receive cell transfer protocol. Used to set the Utopia
1262 cell transfer protocol to Octet-level handshaking. Note this is only
1263 applicable in SPHY mode.
1264 @li 1 - Octet-handshaking enabled
1265 @li 0 - Cell-handshaking enabled */
1267 unsigned int rxParity:1; /**< [28] Utopia Receive Parity Checking enable.
1268 @li 1 - Parity checking enabled
1269 @li 0 - Parity checking disabled */
1271 unsigned int rxEvenParity:1;/**< [27] Utopia Receive Parity Mode
1272 @li 1 - Check for Even Parity
1273 @li 0 - Check for Odd Parity.*/
1275 unsigned int rxHEC:1; /**< [26] RxHEC Header Error Check Mode. Enables/disables cell header
1276 error checking on the received cell header.
1277 @li 1 - HEC checking enabled
1278 @li 0 - HEC checking disabled */
1280 unsigned int rxCOSET:1; /**< [25] If enabled the HEC is Exclusive-OR'ed with the value 0x55
1281 before being tested with the received HEC.
1282 @li 1 - Enable HEC ExOR with value 0x55.
1283 @li 0 - Use generated HEC value.*/
1285 unsigned int rxHECpass:1; /**< [24] Specifies if the incoming cell HEC byte should be transferred
1286 after optional processing to the NPE2 Coprocessor Bus Interface or
1287 if it should be discarded.
1288 @li 1 - HEC maintained 53-byte/UDC cell sent to NPE2.
1289 @li 0 - HEC discarded 52-byte/UDC cell sent to NPE2 coprocessor.*/
1291 unsigned int reserved_1:1; /**< [23] These bits are always 0 */
1293 unsigned int rxCellSize:7; /**< [22:16] Receive cell size. Configures the receive cell size.
1294 Values between 52-64 are valid */
1296 unsigned int rxHashEnbGFC:1; /**< [15] Specifies if the VPI field [11:8]/GFC field should be
1297 included in the Hash data input or if the bits should be padded
1299 @li 1 - VPI [11:8]/GFC field valid and used in Hash residue calculation.
1300 @li 0 - VPI [11:8]/GFC field padded with 1'b0 */
1302 unsigned int rxPreHash:1; /**< [14] Enable Pre-hash value generation. Specifies if the
1303 incoming cell data should be pre-hashed to allow VPI/VCI header look-up
1305 @li 1 - Pre-hashing enabled
1306 @li 0 - Pre-hashing disabled */
1308 unsigned int reserved_2:1; /**< [13] These bits are always 0 */
1310 unsigned int rxAddrRange:5; /**< [12:8] In ATM master, MPHY mode,
1311 * this register specifies the upper
1312 * limit of the PHY polling logical range. The number of active PHYs are
1315 unsigned int reserved_3:3; /**< [7-5] These bits are always 0 .*/
1316 unsigned int rxPHYAddr:5; /**< [4:0] When configured as a slave in an MPHY system this register
1317 * specifies the physical address of the PHY.
1319 } utRxConfig; /**< Rx config Utopia register */
1322 * @ingroup IxAtmdAccUtopiaCtrlAPI
1323 * @struct UtRxStatsConfig_
1324 * @brief Utopia Rx stats config Register
1326 struct UtRxStatsConfig_
1329 unsigned int vpi:12; /**< [31:20] ATM VPI VPI [11:0] OR GFC [3:0] and VPI [7:0]
1330 @li Note: if VCStatsRxGFC is set to 0 the GFC field is ignored in test. */
1332 unsigned int vci:16; /**< [19:4] VCI [15:0] or PHY Address [4] */
1334 unsigned int pti:3; /**< [3:1] PTI [2:0] or or PHY Address [3:1]
1335 @li Note: if VCStatsRxPTI is set to 0 the PTI field is ignored in test.
1336 @li Note: if VCStatsRxEnb is set to 0 only the PHY port address is used
1337 for statistics gathering.. */
1339 unsigned int clp:1; /**< [0] CLP [0] or PHY Address [0]
1340 @li Note: if VCStatsRxCLP is set to 0 the CLP field is ignored in test.
1341 @li Note: if VCStatsRxEnb is set to 0 only the PHY port address is used
1342 for statistics gathering.. */
1343 } utRxStatsConfig; /**< Rx stats config Utopia register */
1346 * @ingroup IxAtmdAccUtopiaCtrlAPI
1347 * @struct UtRxDefineIdle_
1348 * @brief Utopia Rx idle cells config Register
1350 struct UtRxDefineIdle_
1353 unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
1354 @li Note: if VCIdleRxGFC is set to 0 the GFC field is ignored in test. */
1356 unsigned int vci:16; /**< [19:4] ATM VCI [15:0] */
1358 unsigned int pti:3; /**< [3:1] ATM PTI PTI [2:0]
1359 @li Note: if VCIdleRxPTI is set to 0 the PTI field is ignored in test.*/
1361 unsigned int clp:1; /**< [0] ATM CLP [0]
1362 @li Note: if VCIdleRxCLP is set to 0 the CLP field is ignored in test.*/
1363 } utRxDefineIdle; /**< Rx idle cell config Utopia register */
1366 * @ingroup IxAtmdAccUtopiaCtrlAPI
1367 * @struct UtRxEnableFields_
1368 * @brief Utopia Rx enable Register
1370 struct UtRxEnableFields_
1373 unsigned int defineRxIdleGFC:1;/**< [31] This register is used to include or exclude the GFC
1374 field of the ATM header when testing for Idle cells.
1375 @li 1 - GFC field is valid.
1376 @li 0 - GFC field ignored.*/
1378 unsigned int defineRxIdlePTI:1;/**< [30] This register is used to include or exclude the PTI
1379 field of the ATM header when testing for Idle cells.
1380 @li 1 - PTI field is valid.
1381 @li 0 - PTI field ignored.*/
1383 unsigned int defineRxIdleCLP:1;/**< [29] This register is used to include or exclude the CLP
1384 field of the ATM header when testing for Idle cells.
1385 @li 1 - CLP field is valid.
1386 @li 0 - CLP field ignored.*/
1388 unsigned int phyStatsRxEnb:1;/**< [28] This register is used to enable or disable ATM statistics
1389 gathering based on the specified PHY address as defined in RxStatsConfig
1391 @li 1 - Enable statistics for specified receive PHY address.
1392 @li 0 - Disable statistics for specified receive PHY address.*/
1394 unsigned int vcStatsRxEnb:1;/**< [27] This register is used to enable or disable ATM statistics
1395 gathering based on a specific VPI/VCI address.
1396 @li 1 - Enable statistics for specified VPI/VCI address.
1397 @li 0 - Disable statistics for specified VPI/VCI address.*/
1399 unsigned int vcStatsRxGFC:1;/**< [26] This register is used to include or exclude the GFC field
1400 of the ATM header when ATM VPI/VCI statistics are enabled. GFC is only
1401 available at the UNI and uses the first 4-bits of the VPI field.
1402 @li 1 - GFC field is valid.
1403 @li 0 - GFC field ignored. */
1405 unsigned int vcStatsRxPTI:1;/**< [25] This register is used to include or exclude the PTI field
1406 of the ATM header when ATM VPI/VCI statistics are enabled.
1407 @li 1 - PTI field is valid.
1408 @li 0 - PTI field ignored.*/
1410 unsigned int vcStatsRxCLP:1;/**< [24] This register is used to include or exclude the CLP field
1411 of the ATM header when ATM VPI/VCI statistics are enabled.
1412 @li 1 - CLP field is valid.
1413 @li 0 - CLP field ignored. */
1415 unsigned int discardHecErr:1;/**< [23] Discard cells with an invalid HEC.
1416 @li 1 - Discard cells with HEC errors
1417 @li 0 - Cells with HEC errors are passed */
1419 unsigned int discardParErr:1;/**< [22] Discard cells containing parity errors.
1420 @li 1 - Discard cells with parity errors
1421 @li 0 - Cells with parity errors are passed */
1423 unsigned int discardIdle:1; /**< [21] Discard Idle Cells based on DefineIdle register values
1424 @li 1 - Discard IDLE cells
1425 @li 0 - IDLE cells passed */
1427 unsigned int enbHecErrCnt:1;/**< [20] Enable Receive HEC Error Count.
1428 @li 1 - Enable count of received cells containing HEC errors
1429 @li 0 - No count is maintained. */
1431 unsigned int enbParErrCnt:1;/**< [19] Enable Parity Error Count
1432 @li 1 - Enable count of received cells containing Parity errors
1433 @li 0 - No count is maintained. */
1435 unsigned int enbIdleCellCnt:1;/**< [18] Enable Receive Idle Cell Count.
1436 @li 1 - Enable count of Idle cells received.
1437 @li 0 - No count is maintained.*/
1439 unsigned int enbSizeErrCnt:1;/**< [17] Enable Receive Size Error Count.
1440 @li 1 - Enable count of received cells of incorrect size
1441 @li 0 - No count is maintained. */
1443 unsigned int enbRxCellCnt:1;/**< [16] Enable Receive Valid Cell Count of non-idle/non-error cells.
1444 @li 1 - Enable count of valid cells received - non-idle/non-error
1445 @li 0 - No count is maintained. */
1447 unsigned int reserved_1:3; /**< [15:13] These bits are always 0 */
1449 unsigned int rxCellOvrInt:1; /**< [12] Enable CBI Utopia Receive Status Condition if the RxCellCount
1451 @li 1 - CBI Receive Status asserted.
1452 @li 0 - No CBI Receive Status asserted.*/
1454 unsigned int invalidHecOvrInt:1; /**< [11] Enable CBI Receive Status Condition if the InvalidHecCount
1456 @li 1 - CBI Receive Condition asserted.
1457 @li 0 - No CBI Receive Condition asserted */
1459 unsigned int invalidParOvrInt:1; /**< [10] Enable CBI Receive Status Condition if the InvalidParCount
1461 @li 1 - CBI Receive Condition asserted.
1462 @li 0 - No CBI Receive Condition asserted */
1464 unsigned int invalidSizeOvrInt:1; /**< [9] Enable CBI Receive Status Condition if the InvalidSizeCount
1466 @li 1 - CBI Receive Status Condition asserted.
1467 @li 0 - No CBI Receive Status asserted */
1469 unsigned int rxIdleOvrInt:1; /**< [8] Enable CBI Receive Status Condition if the RxIdleCount overflows.
1470 @li 1 - CBI Receive Condition asserted.
1471 @li 0 - No CBI Receive Condition asserted */
1473 unsigned int reserved_2:3; /**< [7:5] These bits are always 0 */
1475 unsigned int rxAddrMask:5; /**< [4:0] This register is used as a mask to allow the user to increase
1476 the PHY receive address range. The register should be programmed with
1477 the address-range limit, i.e. if set to 0x3 the address range increases
1478 to a maximum of 4 addresses. */
1479 } utRxEnableFields; /**< Rx enable Utopia register */
1482 * @ingroup IxAtmdAccUtopiaCtrlAPI
1483 * @struct UtRxTransTable0_
1484 * @brief Utopia Rx translation table Register
1486 struct UtRxTransTable0_
1489 unsigned int phy0:5; /**< [31-27] Rx Mapping value of logical phy 0 */
1491 unsigned int phy1:5; /**< [26-22] Rx Mapping value of logical phy 1 */
1493 unsigned int phy2:5; /**< [21-17] Rx Mapping value of logical phy 2 */
1495 unsigned int reserved_1:1; /**< [16] These bits are always 0 */
1497 unsigned int phy3:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1499 unsigned int phy4:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1501 unsigned int phy5:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1503 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1506 utRxTransTable0; /**< Rx translation table */
1509 * @ingroup IxAtmdAccUtopiaCtrlAPI
1510 * @struct UtRxTransTable1_
1511 * @brief Utopia Rx translation table Register
1513 struct UtRxTransTable1_
1516 unsigned int phy6:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1518 unsigned int phy7:5; /**< [26-22] Rx Mapping value of logical phy 7 */
1520 unsigned int phy8:5; /**< [21-17] Rx Mapping value of logical phy 8 */
1522 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1524 unsigned int phy9:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1526 unsigned int phy10:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1528 unsigned int phy11:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1530 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1533 utRxTransTable1; /**< Rx translation table */
1536 * @ingroup IxAtmdAccUtopiaCtrlAPI
1537 * @struct UtRxTransTable2_
1538 * @brief Utopia Rx translation table Register
1540 struct UtRxTransTable2_
1543 unsigned int phy12:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1545 unsigned int phy13:5; /**< [26-22] Rx Mapping value of logical phy 7 */
1547 unsigned int phy14:5; /**< [21-17] Rx Mapping value of logical phy 8 */
1549 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1551 unsigned int phy15:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1553 unsigned int phy16:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1555 unsigned int phy17:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1557 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1558 } utRxTransTable2; /**< Rx translation table */
1561 * @ingroup IxAtmdAccUtopiaCtrlAPI
1562 * @struct UtRxTransTable3_
1563 * @brief Utopia Rx translation table Register
1565 struct UtRxTransTable3_
1568 unsigned int phy18:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1570 unsigned int phy19:5; /**< [26-22] Rx Mapping value of logical phy 7 */
1572 unsigned int phy20:5; /**< [21-17] Rx Mapping value of logical phy 8 */
1574 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1576 unsigned int phy21:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1578 unsigned int phy22:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1580 unsigned int phy23:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1582 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1583 } utRxTransTable3; /**< Rx translation table */
1586 * @ingroup IxAtmdAccUtopiaCtrlAPI
1587 * @struct UtRxTransTable4_
1588 * @brief Utopia Rx translation table Register
1590 struct UtRxTransTable4_
1593 unsigned int phy24:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1595 unsigned int phy25:5; /**< [26-22] Rx Mapping value of logical phy 7 */
1597 unsigned int phy26:5; /**< [21-17] Rx Mapping value of logical phy 8 */
1599 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1601 unsigned int phy27:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1603 unsigned int phy28:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1605 unsigned int phy29:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1607 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1608 } utRxTransTable4; /**< Rx translation table */
1611 * @ingroup IxAtmdAccUtopiaCtrlAPI
1612 * @struct UtRxTransTable5_
1613 * @brief Utopia Rx translation table Register
1615 struct UtRxTransTable5_
1618 unsigned int phy30:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1620 unsigned int reserved_1:27; /**< [26-0] These bits are always 0 */
1622 } utRxTransTable5; /**< Rx translation table */
1625 * @ingroup IxAtmdAccUtopiaCtrlAPI
1626 * @struct UtSysConfig_
1627 * @brief NPE setup Register
1632 unsigned int reserved_1:2; /**< [31-30] These bits are always 0 */
1633 unsigned int txEnbFSM:1; /**< [29] Enables the operation ofthe Utopia Transmit FSM
1634 * @li 1 - FSM enabled
1635 * @li 0 - FSM inactive
1637 unsigned int rxEnbFSM:1; /**< [28] Enables the operation ofthe Utopia Revieve FSM
1638 * @li 1 - FSM enabled
1639 * @li 0 - FSM inactive
1641 unsigned int disablePins:1; /**< [27] Disable Utopia interface I/O pins forcing the signals to an
1642 * inactive state. Note that this bit is set on reset and must be
1644 * @li 0 - Normal data transfer
1645 * @li 1 - Utopia interface pins are forced inactive
1647 unsigned int tstLoop:1; /**< [26] Test Loop Back Enable.
1648 * @li Note: For loop back to function RxMode and Tx Mode must both be set
1649 * to single PHY mode.
1651 * @li 1 - Normal operating mode
1654 unsigned int txReset:1; /**< [25] Resets the Utopia Coprocessor transmit module to a known state.
1655 * @li Note: All transmit configuration and status registers will be reset
1656 * to their reset values.
1657 * @li 0 - Normal operating mode
1658 * @li 1 - Reset transmit modules
1661 unsigned int rxReset:1; /**< [24] Resets the Utopia Coprocessor receive module to a known state.
1662 * @li Note: All receive configuration and status registers will be reset
1663 * to their reset values.
1664 * @li 0 - Normal operating mode
1665 * @li 1 - Reset receive modules
1668 unsigned int reserved_2:24; /**< [23-0] These bits are always 0 */
1669 } utSysConfig; /**< NPE debug config */
1672 IxAtmdAccUtopiaConfig;
1676 * @brief Utopia status
1678 * This structure is used to set/get the Utopia status parameters
1679 * @li contains debug cell counters, to be accessed during a read operation
1681 * @note - the exact description of all parameters is done in the Utopia reference
1688 unsigned int utTxCellCount; /**< count of cells transmitted */
1690 unsigned int utTxIdleCellCount; /**< count of idle cells transmitted */
1693 * @ingroup IxAtmdAccUtopiaCtrlAPI
1694 * @struct UtTxCellConditionStatus_
1695 * @brief Utopia Tx Status Register
1697 struct UtTxCellConditionStatus_
1700 unsigned int reserved_1:2; /**< [31:30] These bits are always 0 */
1701 unsigned int txFIFO2Underflow:1; /**< [29] This bit is set if 64-byte
1702 * Transmit FIFO2 indicates a FIFO underflow
1705 unsigned int txFIFO1Underflow:1; /**< [28] This bit is set if
1706 * 64-byte Transmit FIFO1 indicates a FIFO
1707 * underflow error condition.
1709 unsigned int txFIFO2Overflow:1; /**< [27] This bit is set if 64-byte
1710 * Transmit FIFO2 indicates a FIFO overflow
1713 unsigned int txFIFO1Overflow:1; /**< [26] This bit is set if 64-byte
1714 * Transmit FIFO1 indicates a FIFO overflow
1717 unsigned int txIdleCellCountOvr:1; /**< [25] This bit is set if the
1718 * TxIdleCellCount register overflows.
1720 unsigned int txCellCountOvr:1; /**< [24] This bit is set if the
1721 * TxCellCount register overflows
1723 unsigned int reserved_2:24; /**< [23:0] These bits are always 0 */
1724 } utTxCellConditionStatus; /**< Tx cells condition status */
1726 unsigned int utRxCellCount; /**< count of cell received */
1727 unsigned int utRxIdleCellCount; /**< count of idle cell received */
1728 unsigned int utRxInvalidHECount; /**< count of invalid cell
1729 * received because of HEC errors
1731 unsigned int utRxInvalidParCount; /**< count of invalid cell received
1732 * because of parity errors
1734 unsigned int utRxInvalidSizeCount; /**< count of invalid cell
1735 * received because of cell
1740 * @ingroup IxAtmdAccUtopiaCtrlAPI
1741 * @struct UtRxCellConditionStatus_
1742 * @brief Utopia Rx Status Register
1744 struct UtRxCellConditionStatus_
1747 unsigned int reserved_1:3; /**< [31:29] These bits are always 0.*/
1748 unsigned int rxCellCountOvr:1; /**< [28] This bit is set if the RxCellCount register overflows. */
1749 unsigned int invalidHecCountOvr:1; /**< [27] This bit is set if the InvalidHecCount register overflows.*/
1750 unsigned int invalidParCountOvr:1; /**< [26] This bit is set if the InvalidParCount register overflows.*/
1751 unsigned int invalidSizeCountOvr:1; /**< [25] This bit is set if the InvalidSizeCount register overflows.*/
1752 unsigned int rxIdleCountOvr:1; /**< [24] This bit is set if the RxIdleCount register overflows.*/
1753 unsigned int reserved_2:4; /**< [23:20] These bits are always 0 */
1754 unsigned int rxFIFO2Underflow:1; /**< [19] This bit is set if 64-byte Receive FIFO2
1755 * indicates a FIFO underflow error condition.
1757 unsigned int rxFIFO1Underflow:1; /**< [18] This bit is set if 64-byte Receive
1758 * FIFO1 indicates a FIFO underflow error condition
1760 unsigned int rxFIFO2Overflow:1; /**< [17] This bit is set if 64-byte Receive FIFO2
1761 * indicates a FIFO overflow error condition.
1763 unsigned int rxFIFO1Overflow:1; /**< [16] This bit is set if 64-byte Receive FIFO1
1764 * indicates a FIFO overflow error condition.
1766 unsigned int reserved_3:16; /**< [15:0] These bits are always 0. */
1767 } utRxCellConditionStatus; /**< Rx cells condition status */
1769 } IxAtmdAccUtopiaStatus;
1772 * @} defgroup IxAtmdAccUtopiaCtrlAPI
1777 * @ingroup IxAtmdAccCtrlAPI
1779 * @fn ixAtmdAccUtopiaConfigSet (const IxAtmdAccUtopiaConfig *
1780 ixAtmdAccUtopiaConfigPtr)
1782 * @brief Send the configuration structure to the Utopia interface
1784 * This function downloads the @a IxAtmdAccUtopiaConfig structure to
1785 * the Utopia and has the following effects
1786 * @li setup the Utopia interface
1787 * @li initialise the NPE
1788 * @li reset the Utopia cell counters and status registers to known values
1790 * This action has to be done once at initialisation. A lock is preventing
1791 * the concurrent use of @a ixAtmdAccUtopiaStatusGet() and
1792 * @A ixAtmdAccUtopiaConfigSet()
1794 * @param *ixAtmdAccNPEConfigPtr @ref IxAtmdAccUtopiaConfig [in] - pointer to a structure to download to
1795 * Utopia. This parameter cannot be a null pointer.
1797 * @return @li IX_SUCCESS successful download
1798 * @return @li IX_FAIL error in the parameters, or configuration is not
1799 * complete or failed
1801 * @sa ixAtmdAccUtopiaStatusGet
1804 PUBLIC IX_STATUS ixAtmdAccUtopiaConfigSet (const IxAtmdAccUtopiaConfig *
1805 ixAtmdAccUtopiaConfigPtr);
1809 * @ingroup IxAtmdAccCtrlAPI
1811 * @fn ixAtmdAccUtopiaStatusGet (IxAtmdAccUtopiaStatus *
1812 ixAtmdAccUtopiaStatus)
1814 * @brief Get the Utopia interface configuration.
1816 * This function reads the Utopia registers and the Cell counts
1817 * and fills the @a IxAtmdAccUtopiaStatus structure
1819 * A lock is preventing the concurrent
1820 * use of @a ixAtmdAccUtopiaStatusGet() and @A ixAtmdAccUtopiaConfigSet()
1822 * @param ixAtmdAccUtopiaStatus @ref IxAtmdAccUtopiaStatus [out] - pointer to structure to be updated from internal
1823 * hardware counters. This parameter cannot be a NULL pointer.
1825 * @return @li IX_SUCCESS successful read
1826 * @return @li IX_FAIL error in the parameters null pointer, or
1827 * configuration read is not complete or failed
1829 * @sa ixAtmdAccUtopiaConfigSet
1832 PUBLIC IX_STATUS ixAtmdAccUtopiaStatusGet (IxAtmdAccUtopiaStatus *
1833 ixAtmdAccUtopiaStatus);
1837 * @ingroup IxAtmdAcc
1839 * @fn ixAtmdAccPortEnable (IxAtmLogicalPort port)
1841 * @brief enable a PHY logical port
1843 * This function enables the transmission over one port. It should be
1844 * called before accessing any resource from this port and before the
1845 * establishment of a VC.
1847 * When a port is enabled, the cell transmission to the Utopia interface
1848 * is started. If there is no traffic already running, idle cells are
1849 * sent over the interface.
1851 * This function can be called multiple times.
1853 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
1855 * @return @li IX_SUCCESS enable is complete
1856 * @return @li IX_ATMDACC_WARNING port already enabled
1857 * @return @li IX_FAIL enable failed, wrong parameter, or cannot
1858 * initialise this port (the port is maybe already in use,
1859 * or there is a hardware issue)
1861 * @note - This function needs internal locks and should not be
1862 * called from an interrupt context
1864 * @sa ixAtmdAccPortDisable
1867 PUBLIC IX_STATUS ixAtmdAccPortEnable (IxAtmLogicalPort port);
1871 * @ingroup IxAtmdAccCtrlAPI
1873 * @fn ixAtmdAccPortDisable (IxAtmLogicalPort port)
1875 * @brief disable a PHY logical port
1877 * This function disable the transmission over one port.
1879 * When a port is disabled, the cell transmission to the Utopia interface
1882 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
1884 * @return @li IX_SUCCESS disable is complete
1885 * @return @li IX_ATMDACC_WARNING port already disabled
1886 * @return @li IX_FAIL disable failed, wrong parameter .
1888 * @note - This function needs internal locks and should not be called
1889 * from an interrupt context
1891 * @note - The response from hardware is done through the txDone mechanism
1892 * to ensure the synchrnisation with tx resources. Therefore, the
1893 * txDone mechanism needs to be serviced to make a PortDisable complete.
1895 * @sa ixAtmdAccPortEnable
1896 * @sa ixAtmdAccPortDisableComplete
1897 * @sa ixAtmdAccTxDoneDispatch
1900 PUBLIC IX_STATUS ixAtmdAccPortDisable (IxAtmLogicalPort port);
1904 * @ingroup IxAtmdAccCtrlAPI
1906 * @fn ixAtmdAccPortDisableComplete (IxAtmLogicalPort port)
1908 * @brief disable a PHY logical port
1910 * This function indicates if the port disable for a port has completed. This
1911 * function will return true if the port has never been enabled.
1913 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
1915 * @return @li true disable is complete
1916 * @return @li false disable failed, wrong parameter .
1918 * @note - This function needs internal locks and should not be called
1919 * from an interrupt context
1921 * @sa ixAtmdAccPortEnable
1922 * @sa ixAtmdAccPortDisable
1925 PUBLIC BOOL ixAtmdAccPortDisableComplete (IxAtmLogicalPort port);
1927 #endif /* IXATMDACCCTRL_H */
1930 * @} defgroup IxAtmdAccCtrlAPI