2 * @file IxEthAccMii_p.h
4 * @author Intel Corporation
7 * @brief MII Header file
13 * IXP400 SW Release version 2.0
15 * -- Copyright Notice --
18 * Copyright 2001-2005, Intel Corporation.
19 * All rights reserved.
22 * SPDX-License-Identifier: BSD-3-Clause
24 * -- End of Copyright Notice --
27 #ifndef IxEthAccMii_p_H
28 #define IxEthAccMii_p_H
30 /* MII definitions - these have been verified against the LXT971 and LXT972 PHYs*/
32 #define IXP425_ETH_ACC_MII_MAX_REG 32 /* max register per phy */
34 #define IX_ETH_ACC_MII_REG_SHL 16
35 #define IX_ETH_ACC_MII_ADDR_SHL 21
37 /* Definitions for MII access routines*/
39 #define IX_ETH_ACC_MII_GO BIT(31)
40 #define IX_ETH_ACC_MII_WRITE BIT(26)
41 #define IX_ETH_ACC_MII_TIMEOUT_10TH_SECS 5
42 #define IX_ETH_ACC_MII_10TH_SEC_IN_MILLIS 100
43 #define IX_ETH_ACC_MII_READ_FAIL BIT(31)
45 #define IX_ETH_ACC_MII_PHY_DEF_DELAY 300 /* max delay before link up, etc. */
46 #define IX_ETH_ACC_MII_PHY_NO_DELAY 0x0 /* do not delay */
47 #define IX_ETH_ACC_MII_PHY_NULL 0xff /* PHY is not present */
48 #define IX_ETH_ACC_MII_PHY_DEF_ADDR 0x0 /* default PHY's logical address */
50 #ifndef IX_ETH_ACC_MII_MONITOR_DELAY
51 # define IX_ETH_ACC_MII_MONITOR_DELAY 0x5 /* in seconds */
54 /* Register definition */
56 #define IX_ETH_ACC_MII_CTRL_REG 0x0 /* Control Register */
57 #define IX_ETH_ACC_MII_STAT_REG 0x1 /* Status Register */
58 #define IX_ETH_ACC_MII_PHY_ID1_REG 0x2 /* PHY identifier 1 Register */
59 #define IX_ETH_ACC_MII_PHY_ID2_REG 0x3 /* PHY identifier 2 Register */
60 #define IX_ETH_ACC_MII_AN_ADS_REG 0x4 /* Auto-Negotiation */
61 /* Advertisement Register */
62 #define IX_ETH_ACC_MII_AN_PRTN_REG 0x5 /* Auto-Negotiation */
63 /* partner ability Register */
64 #define IX_ETH_ACC_MII_AN_EXP_REG 0x6 /* Auto-Negotiation */
65 /* Expansion Register */
66 #define IX_ETH_ACC_MII_AN_NEXT_REG 0x7 /* Auto-Negotiation */
67 /* next-page transmit Register */
69 IxEthAccStatus ixEthAccMdioShow (void);
70 IxEthAccStatus ixEthAccMiiInit(void);
71 void ixEthAccMiiUnload(void);
73 #endif /*IxEthAccMii_p_H*/