drivers/spi/sh_spi.c

   1 /*
   2  * SH SPI driver
   3  *
   4  * Copyright (C) 2011-2012 Renesas Solutions Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  18  *
  19  */
  20
  21 #include <common.h>
  22 #include <malloc.h>
  23 #include <spi.h>
  24 #include <asm/io.h>
  25 #include "sh_spi.h"
  26
  27 static void sh_spi_write(unsigned long data, unsigned long *reg)
  28 {
  29         writel(data, reg);
  30 }
  31
  32 static unsigned long sh_spi_read(unsigned long *reg)
  33 {
  34         return readl(reg);
  35 }
  36
  37 static void sh_spi_set_bit(unsigned long val, unsigned long *reg)
  38 {
  39         unsigned long tmp;
  40
  41         tmp = sh_spi_read(reg);
  42         tmp |= val;
  43         sh_spi_write(tmp, reg);
  44 }
  45
  46 static void sh_spi_clear_bit(unsigned long val, unsigned long *reg)
  47 {
  48         unsigned long tmp;
  49
  50         tmp = sh_spi_read(reg);
  51         tmp &= ~val;
  52         sh_spi_write(tmp, reg);
  53 }
  54
  55 static void clear_fifo(struct sh_spi *ss)
  56 {
  57         sh_spi_set_bit(SH_SPI_RSTF, &ss->regs->cr2);
  58         sh_spi_clear_bit(SH_SPI_RSTF, &ss->regs->cr2);
  59 }
  60
  61 static int recvbuf_wait(struct sh_spi *ss)
  62 {
  63         while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) {
  64                 if (ctrlc())
  65                         return 1;
  66                 udelay(10);
  67         }
  68         return 0;
  69 }
  70
  71 static int write_fifo_empty_wait(struct sh_spi *ss)
  72 {
  73         while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) {
  74                 if (ctrlc())
  75                         return 1;
  76                 udelay(10);
  77         }
  78         return 0;
  79 }
  80
  81 void spi_init(void)
  82 {
  83 }
  84
  85 static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs)
  86 {
  87         unsigned long val = 0;
  88
  89         if (cs & 0x01)
  90                 val |= SH_SPI_SSS0;
  91         if (cs & 0x02)
  92                 val |= SH_SPI_SSS1;
  93
  94         sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4);
  95         sh_spi_set_bit(val, &ss->regs->cr4);
  96 }
  97
  98 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
  99                 unsigned int max_hz, unsigned int mode)
 100 {
 101         struct sh_spi *ss;
 102
 103         if (!spi_cs_is_valid(bus, cs))
 104                 return NULL;
 105
 106         ss = spi_alloc_slave(struct sh_spi, bus, cs);
 107         if (!ss)
 108                 return NULL;
 109
 110         ss->regs = (struct sh_spi_regs *)CONFIG_SH_SPI_BASE;
 111
 112         /* SPI sycle stop */
 113         sh_spi_write(0xfe, &ss->regs->cr1);
 114         /* CR1 init */
 115         sh_spi_write(0x00, &ss->regs->cr1);
 116         /* CR3 init */
 117         sh_spi_write(0x00, &ss->regs->cr3);
 118         sh_spi_set_cs(ss, cs);
 119
 120         clear_fifo(ss);
 121
 122         /* 1/8 clock */
 123         sh_spi_write(sh_spi_read(&ss->regs->cr2) | 0x07, &ss->regs->cr2);
 124         udelay(10);
 125
 126         return &ss->slave;
 127 }
 128
 129 void spi_free_slave(struct spi_slave *slave)
 130 {
 131         struct sh_spi *spi = to_sh_spi(slave);
 132
 133         free(spi);
 134 }
 135
 136 int spi_claim_bus(struct spi_slave *slave)
 137 {
 138         return 0;
 139 }
 140
 141 void spi_release_bus(struct spi_slave *slave)
 142 {
 143         struct sh_spi *ss = to_sh_spi(slave);
 144
 145         sh_spi_write(sh_spi_read(&ss->regs->cr1) &
 146                 ~(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD), &ss->regs->cr1);
 147 }
 148
 149 static int sh_spi_send(struct sh_spi *ss, const unsigned char *tx_data,
 150                         unsigned int len, unsigned long flags)
 151 {
 152         int i, cur_len, ret = 0;
 153         int remain = (int)len;
 154         unsigned long tmp;
 155
 156         if (len >= SH_SPI_FIFO_SIZE)
 157                 sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
 158
 159         while (remain > 0) {
 160                 cur_len = (remain < SH_SPI_FIFO_SIZE) ?
 161                                 remain : SH_SPI_FIFO_SIZE;
 162                 for (i = 0; i < cur_len &&
 163                         !(sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) &&
 164                         !(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBF);
 165                                 i++)
 166                         sh_spi_write(tx_data[i], &ss->regs->tbr_rbr);
 167
 168                 cur_len = i;
 169
 170                 if (sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) {
 171                         /* Abort the transaction */
 172                         flags |= SPI_XFER_END;
 173                         sh_spi_set_bit(SH_SPI_WPABRT, &ss->regs->cr4);
 174                         ret = 1;
 175                         break;
 176                 }
 177
 178                 remain -= cur_len;
 179                 tx_data += cur_len;
 180
 181                 if (remain > 0)
 182                         write_fifo_empty_wait(ss);
 183         }
 184
 185         if (flags & SPI_XFER_END) {
 186                 tmp = sh_spi_read(&ss->regs->cr1);
 187                 tmp = tmp & ~(SH_SPI_SSD | SH_SPI_SSDB);
 188                 sh_spi_write(tmp, &ss->regs->cr1);
 189                 sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
 190                 udelay(100);
 191                 write_fifo_empty_wait(ss);
 192         }
 193
 194         return ret;
 195 }
 196
 197 static int sh_spi_receive(struct sh_spi *ss, unsigned char *rx_data,
 198                           unsigned int len, unsigned long flags)
 199 {
 200         int i;
 201         unsigned long tmp;
 202
 203         if (len > SH_SPI_MAX_BYTE)
 204                 sh_spi_write(SH_SPI_MAX_BYTE, &ss->regs->cr3);
 205         else
 206                 sh_spi_write(len, &ss->regs->cr3);
 207
 208         tmp = sh_spi_read(&ss->regs->cr1);
 209         tmp = tmp & ~(SH_SPI_SSD | SH_SPI_SSDB);
 210         sh_spi_write(tmp, &ss->regs->cr1);
 211         sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
 212
 213         for (i = 0; i < len; i++) {
 214                 if (recvbuf_wait(ss))
 215                         return 0;
 216
 217                 rx_data[i] = (unsigned char)sh_spi_read(&ss->regs->tbr_rbr);
 218         }
 219         sh_spi_write(0, &ss->regs->cr3);
 220
 221         return 0;
 222 }
 223
 224 int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 225                 void *din, unsigned long flags)
 226 {
 227         struct sh_spi *ss = to_sh_spi(slave);
 228         const unsigned char *tx_data = dout;
 229         unsigned char *rx_data = din;
 230         unsigned int len = bitlen / 8;
 231         int ret = 0;
 232
 233         if (flags & SPI_XFER_BEGIN)
 234                 sh_spi_write(sh_spi_read(&ss->regs->cr1) & ~SH_SPI_SSA,
 235                                 &ss->regs->cr1);
 236
 237         if (tx_data)
 238                 ret = sh_spi_send(ss, tx_data, len, flags);
 239
 240         if (ret == 0 && rx_data)
 241                 ret = sh_spi_receive(ss, rx_data, len, flags);
 242
 243         if (flags & SPI_XFER_END) {
 244                 sh_spi_set_bit(SH_SPI_SSD, &ss->regs->cr1);
 245                 udelay(100);
 246
 247                 sh_spi_clear_bit(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD,
 248                                  &ss->regs->cr1);
 249                 clear_fifo(ss);
 250         }
 251
 252         return ret;
 253 }
 254
 255 int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
 256 {
 257         if (!bus && cs < SH_SPI_NUM_CS)
 258                 return 1;
 259         else
 260                 return 0;
 261 }
 262
 263 void spi_cs_activate(struct spi_slave *slave)
 264 {
 265
 266 }
 267
 268 void spi_cs_deactivate(struct spi_slave *slave)
 269 {
 270
 271 }