drivers/usb/host/ehci-s5p.c

   1 /*
   2  * SAMSUNG S5P USB HOST EHCI Controller
   3  *
   4  * Copyright (C) 2012 Samsung Electronics Co.Ltd
   5  *      Vivek Gautam <gautam.vivek@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  20  * MA 02110-1301 USA
  21  */
  22
  23 #include <common.h>
  24 #include <usb.h>
  25 #include <asm/arch/cpu.h>
  26 #include <asm/arch/ehci-s5p.h>
  27 #include "ehci.h"
  28 #include "ehci-core.h"
  29
  30 /* Setup the EHCI host controller. */
  31 static void setup_usb_phy(struct s5p_usb_phy *usb)
  32 {
  33         clrbits_le32(&usb->usbphyctrl0,
  34                         HOST_CTRL0_FSEL_MASK |
  35                         HOST_CTRL0_COMMONON_N |
  36                         /* HOST Phy setting */
  37                         HOST_CTRL0_PHYSWRST |
  38                         HOST_CTRL0_PHYSWRSTALL |
  39                         HOST_CTRL0_SIDDQ |
  40                         HOST_CTRL0_FORCESUSPEND |
  41                         HOST_CTRL0_FORCESLEEP);
  42
  43         setbits_le32(&usb->usbphyctrl0,
  44                         /* Setting up the ref freq */
  45                         (CLK_24MHZ << 16) |
  46                         /* HOST Phy setting */
  47                         HOST_CTRL0_LINKSWRST |
  48                         HOST_CTRL0_UTMISWRST);
  49         udelay(10);
  50         clrbits_le32(&usb->usbphyctrl0,
  51                         HOST_CTRL0_LINKSWRST |
  52                         HOST_CTRL0_UTMISWRST);
  53         udelay(20);
  54
  55         /* EHCI Ctrl setting */
  56         setbits_le32(&usb->ehcictrl,
  57                         EHCICTRL_ENAINCRXALIGN |
  58                         EHCICTRL_ENAINCR4 |
  59                         EHCICTRL_ENAINCR8 |
  60                         EHCICTRL_ENAINCR16);
  61 }
  62
  63 /* Reset the EHCI host controller. */
  64 static void reset_usb_phy(struct s5p_usb_phy *usb)
  65 {
  66         /* HOST_PHY reset */
  67         setbits_le32(&usb->usbphyctrl0,
  68                         HOST_CTRL0_PHYSWRST |
  69                         HOST_CTRL0_PHYSWRSTALL |
  70                         HOST_CTRL0_SIDDQ |
  71                         HOST_CTRL0_FORCESUSPEND |
  72                         HOST_CTRL0_FORCESLEEP);
  73 }
  74
  75 /*
  76  * EHCI-initialization
  77  * Create the appropriate control structures to manage
  78  * a new EHCI host controller.
  79  */
  80 int ehci_hcd_init(void)
  81 {
  82         struct s5p_usb_phy *usb;
  83
  84         usb = (struct s5p_usb_phy *)samsung_get_base_usb_phy();
  85         setup_usb_phy(usb);
  86
  87         hccr = (struct ehci_hccr *)(EXYNOS5_USB_HOST_EHCI_BASE);
  88         hcor = (struct ehci_hcor *)((uint32_t) hccr
  89                                 + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
  90
  91         debug("Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n",
  92                 (uint32_t)hccr, (uint32_t)hcor,
  93                 (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
  94
  95         return 0;
  96 }
  97
  98 /*
  99  * Destroy the appropriate control structures corresponding
 100  * the EHCI host controller.
 101  */
 102 int ehci_hcd_stop()
 103 {
 104         struct s5p_usb_phy *usb;
 105
 106         usb = (struct s5p_usb_phy *)samsung_get_base_usb_phy();
 107         reset_usb_phy(usb);
 108
 109         return 0;
 110 }