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Merge branch 'master' of git://git.denx.de/u-boot-nds32
[karo-tx-uboot.git] / drivers / usb / host / ohci-hcd.c
1 /*
2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
3  *
4  * Interrupt support is added. Now, it has been tested
5  * on ULI1575 chip and works well with USB keyboard.
6  *
7  * (C) Copyright 2007
8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
9  *
10  * (C) Copyright 2003
11  * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
12  *
13  * Note: Much of this code has been derived from Linux 2.4
14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
15  * (C) Copyright 2000-2002 David Brownell
16  *
17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
18  * ebenard@eukrea.com - based on s3c24x0's driver
19  *
20  * SPDX-License-Identifier:     GPL-2.0+
21  */
22 /*
23  * IMPORTANT NOTES
24  * 1 - Read doc/README.generic_usb_ohci
25  * 2 - this driver is intended for use with USB Mass Storage Devices
26  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
27  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
28  *     to activate workaround for bug #41 or this driver will NOT work!
29  */
30
31 #include <common.h>
32 #include <asm/byteorder.h>
33
34 #if defined(CONFIG_PCI_OHCI)
35 # include <pci.h>
36 #if !defined(CONFIG_PCI_OHCI_DEVNO)
37 #define CONFIG_PCI_OHCI_DEVNO   0
38 #endif
39 #endif
40
41 #include <malloc.h>
42 #include <usb.h>
43
44 #include "ohci.h"
45
46 #ifdef CONFIG_AT91RM9200
47 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
48 #endif
49
50 #if defined(CONFIG_ARM920T) || \
51     defined(CONFIG_S3C24X0) || \
52     defined(CONFIG_440EP) || \
53     defined(CONFIG_PCI_OHCI) || \
54     defined(CONFIG_MPC5200) || \
55     defined(CONFIG_SYS_OHCI_USE_NPS)
56 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
57 #endif
58
59 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
60 #undef DEBUG
61 #undef SHOW_INFO
62 #undef OHCI_FILL_TRACE
63
64 /* For initializing controller (mask in an HCFS mode too) */
65 #define OHCI_CONTROL_INIT \
66         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
67
68 #define min_t(type, x, y) \
69                     ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
70
71 #ifdef CONFIG_PCI_OHCI
72 static struct pci_device_id ohci_pci_ids[] = {
73         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
74         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
75         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
76         /* Please add supported PCI OHCI controller ids here */
77         {0, 0}
78 };
79 #endif
80
81 #ifdef CONFIG_PCI_EHCI_DEVNO
82 static struct pci_device_id ehci_pci_ids[] = {
83         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
84         /* Please add supported PCI EHCI controller ids here */
85         {0, 0}
86 };
87 #endif
88
89 #ifdef DEBUG
90 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
91 #else
92 #define dbg(format, arg...) do {} while (0)
93 #endif /* DEBUG */
94 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
95 #ifdef SHOW_INFO
96 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
97 #else
98 #define info(format, arg...) do {} while (0)
99 #endif
100
101 #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
102 # define m16_swap(x) cpu_to_be16(x)
103 # define m32_swap(x) cpu_to_be32(x)
104 #else
105 # define m16_swap(x) cpu_to_le16(x)
106 # define m32_swap(x) cpu_to_le32(x)
107 #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
108
109 /* global ohci_t */
110 static ohci_t gohci;
111 /* this must be aligned to a 256 byte boundary */
112 struct ohci_hcca ghcca[1];
113 /* a pointer to the aligned storage */
114 struct ohci_hcca *phcca;
115 /* this allocates EDs for all possible endpoints */
116 struct ohci_device ohci_dev;
117 /* device which was disconnected */
118 struct usb_device *devgone;
119
120 static inline u32 roothub_a(struct ohci *hc)
121         { return ohci_readl(&hc->regs->roothub.a); }
122 static inline u32 roothub_b(struct ohci *hc)
123         { return ohci_readl(&hc->regs->roothub.b); }
124 static inline u32 roothub_status(struct ohci *hc)
125         { return ohci_readl(&hc->regs->roothub.status); }
126 static inline u32 roothub_portstatus(struct ohci *hc, int i)
127         { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
128
129 /* forward declaration */
130 static int hc_interrupt(void);
131 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
132                           void *buffer, int transfer_len,
133                           struct devrequest *setup, urb_priv_t *urb,
134                           int interval);
135
136 /*-------------------------------------------------------------------------*
137  * URB support functions
138  *-------------------------------------------------------------------------*/
139
140 /* free HCD-private data associated with this URB */
141
142 static void urb_free_priv(urb_priv_t *urb)
143 {
144         int             i;
145         int             last;
146         struct td       *td;
147
148         last = urb->length - 1;
149         if (last >= 0) {
150                 for (i = 0; i <= last; i++) {
151                         td = urb->td[i];
152                         if (td) {
153                                 td->usb_dev = NULL;
154                                 urb->td[i] = NULL;
155                         }
156                 }
157         }
158         free(urb);
159 }
160
161 /*-------------------------------------------------------------------------*/
162
163 #ifdef DEBUG
164 static int sohci_get_current_frame_number(struct usb_device *dev);
165
166 /* debug| print the main components of an URB
167  * small: 0) header + data packets 1) just header */
168
169 static void pkt_print(urb_priv_t *purb, struct usb_device *dev,
170                       unsigned long pipe, void *buffer, int transfer_len,
171                       struct devrequest *setup, char *str, int small)
172 {
173         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
174                         str,
175                         sohci_get_current_frame_number(dev),
176                         usb_pipedevice(pipe),
177                         usb_pipeendpoint(pipe),
178                         usb_pipeout(pipe)? 'O': 'I',
179                         usb_pipetype(pipe) < 2 ? \
180                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
181                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
182                         (purb ? purb->actual_length : 0),
183                         transfer_len, dev->status);
184 #ifdef  OHCI_VERBOSE_DEBUG
185         if (!small) {
186                 int i, len;
187
188                 if (usb_pipecontrol(pipe)) {
189                         printf(__FILE__ ": cmd(8):");
190                         for (i = 0; i < 8 ; i++)
191                                 printf(" %02x", ((__u8 *) setup) [i]);
192                         printf("\n");
193                 }
194                 if (transfer_len > 0 && buffer) {
195                         printf(__FILE__ ": data(%d/%d):",
196                                 (purb ? purb->actual_length : 0),
197                                 transfer_len);
198                         len = usb_pipeout(pipe)? transfer_len:
199                                         (purb ? purb->actual_length : 0);
200                         for (i = 0; i < 16 && i < len; i++)
201                                 printf(" %02x", ((__u8 *) buffer) [i]);
202                         printf("%s\n", i < len? "...": "");
203                 }
204         }
205 #endif
206 }
207
208 /* just for debugging; prints non-empty branches of the int ed tree
209  * inclusive iso eds */
210 void ep_print_int_eds(ohci_t *ohci, char *str)
211 {
212         int i, j;
213          __u32 *ed_p;
214         for (i = 0; i < 32; i++) {
215                 j = 5;
216                 ed_p = &(ohci->hcca->int_table [i]);
217                 if (*ed_p == 0)
218                     continue;
219                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
220                 while (*ed_p != 0 && j--) {
221                         ed_t *ed = (ed_t *)m32_swap(ed_p);
222                         printf(" ed: %4x;", ed->hwINFO);
223                         ed_p = &ed->hwNextED;
224                 }
225                 printf("\n");
226         }
227 }
228
229 static void ohci_dump_intr_mask(char *label, __u32 mask)
230 {
231         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
232                 label,
233                 mask,
234                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
235                 (mask & OHCI_INTR_OC) ? " OC" : "",
236                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
237                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
238                 (mask & OHCI_INTR_UE) ? " UE" : "",
239                 (mask & OHCI_INTR_RD) ? " RD" : "",
240                 (mask & OHCI_INTR_SF) ? " SF" : "",
241                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
242                 (mask & OHCI_INTR_SO) ? " SO" : ""
243                 );
244 }
245
246 static void maybe_print_eds(char *label, __u32 value)
247 {
248         ed_t *edp = (ed_t *)value;
249
250         if (value) {
251                 dbg("%s %08x", label, value);
252                 dbg("%08x", edp->hwINFO);
253                 dbg("%08x", edp->hwTailP);
254                 dbg("%08x", edp->hwHeadP);
255                 dbg("%08x", edp->hwNextED);
256         }
257 }
258
259 static char *hcfs2string(int state)
260 {
261         switch (state) {
262         case OHCI_USB_RESET:    return "reset";
263         case OHCI_USB_RESUME:   return "resume";
264         case OHCI_USB_OPER:     return "operational";
265         case OHCI_USB_SUSPEND:  return "suspend";
266         }
267         return "?";
268 }
269
270 /* dump control and status registers */
271 static void ohci_dump_status(ohci_t *controller)
272 {
273         struct ohci_regs        *regs = controller->regs;
274         __u32                   temp;
275
276         temp = ohci_readl(&regs->revision) & 0xff;
277         if (temp != 0x10)
278                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
279
280         temp = ohci_readl(&regs->control);
281         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
282                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
283                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
284                 (temp & OHCI_CTRL_IR) ? " IR" : "",
285                 hcfs2string(temp & OHCI_CTRL_HCFS),
286                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
287                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
288                 (temp & OHCI_CTRL_IE) ? " IE" : "",
289                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
290                 temp & OHCI_CTRL_CBSR
291                 );
292
293         temp = ohci_readl(&regs->cmdstatus);
294         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
295                 (temp & OHCI_SOC) >> 16,
296                 (temp & OHCI_OCR) ? " OCR" : "",
297                 (temp & OHCI_BLF) ? " BLF" : "",
298                 (temp & OHCI_CLF) ? " CLF" : "",
299                 (temp & OHCI_HCR) ? " HCR" : ""
300                 );
301
302         ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
303         ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
304
305         maybe_print_eds("ed_periodcurrent",
306                         ohci_readl(&regs->ed_periodcurrent));
307
308         maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
309         maybe_print_eds("ed_controlcurrent",
310                         ohci_readl(&regs->ed_controlcurrent));
311
312         maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
313         maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
314
315         maybe_print_eds("donehead", ohci_readl(&regs->donehead));
316 }
317
318 static void ohci_dump_roothub(ohci_t *controller, int verbose)
319 {
320         __u32                   temp, ndp, i;
321
322         temp = roothub_a(controller);
323         ndp = (temp & RH_A_NDP);
324 #ifdef CONFIG_AT91C_PQFP_UHPBUG
325         ndp = (ndp == 2) ? 1:0;
326 #endif
327         if (verbose) {
328                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
329                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
330                         (temp & RH_A_NOCP) ? " NOCP" : "",
331                         (temp & RH_A_OCPM) ? " OCPM" : "",
332                         (temp & RH_A_DT) ? " DT" : "",
333                         (temp & RH_A_NPS) ? " NPS" : "",
334                         (temp & RH_A_PSM) ? " PSM" : "",
335                         ndp
336                         );
337                 temp = roothub_b(controller);
338                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
339                         temp,
340                         (temp & RH_B_PPCM) >> 16,
341                         (temp & RH_B_DR)
342                         );
343                 temp = roothub_status(controller);
344                 dbg("roothub.status: %08x%s%s%s%s%s%s",
345                         temp,
346                         (temp & RH_HS_CRWE) ? " CRWE" : "",
347                         (temp & RH_HS_OCIC) ? " OCIC" : "",
348                         (temp & RH_HS_LPSC) ? " LPSC" : "",
349                         (temp & RH_HS_DRWE) ? " DRWE" : "",
350                         (temp & RH_HS_OCI) ? " OCI" : "",
351                         (temp & RH_HS_LPS) ? " LPS" : ""
352                         );
353         }
354
355         for (i = 0; i < ndp; i++) {
356                 temp = roothub_portstatus(controller, i);
357                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
358                         i,
359                         temp,
360                         (temp & RH_PS_PRSC) ? " PRSC" : "",
361                         (temp & RH_PS_OCIC) ? " OCIC" : "",
362                         (temp & RH_PS_PSSC) ? " PSSC" : "",
363                         (temp & RH_PS_PESC) ? " PESC" : "",
364                         (temp & RH_PS_CSC) ? " CSC" : "",
365
366                         (temp & RH_PS_LSDA) ? " LSDA" : "",
367                         (temp & RH_PS_PPS) ? " PPS" : "",
368                         (temp & RH_PS_PRS) ? " PRS" : "",
369                         (temp & RH_PS_POCI) ? " POCI" : "",
370                         (temp & RH_PS_PSS) ? " PSS" : "",
371
372                         (temp & RH_PS_PES) ? " PES" : "",
373                         (temp & RH_PS_CCS) ? " CCS" : ""
374                         );
375         }
376 }
377
378 static void ohci_dump(ohci_t *controller, int verbose)
379 {
380         dbg("OHCI controller usb-%s state", controller->slot_name);
381
382         /* dumps some of the state we know about */
383         ohci_dump_status(controller);
384         if (verbose)
385                 ep_print_int_eds(controller, "hcca");
386         dbg("hcca frame #%04x", controller->hcca->frame_no);
387         ohci_dump_roothub(controller, 1);
388 }
389 #endif /* DEBUG */
390
391 /*-------------------------------------------------------------------------*
392  * Interface functions (URB)
393  *-------------------------------------------------------------------------*/
394
395 /* get a transfer request */
396
397 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
398 {
399         ohci_t *ohci;
400         ed_t *ed;
401         urb_priv_t *purb_priv = urb;
402         int i, size = 0;
403         struct usb_device *dev = urb->dev;
404         unsigned long pipe = urb->pipe;
405         void *buffer = urb->transfer_buffer;
406         int transfer_len = urb->transfer_buffer_length;
407         int interval = urb->interval;
408
409         ohci = &gohci;
410
411         /* when controller's hung, permit only roothub cleanup attempts
412          * such as powering down ports */
413         if (ohci->disabled) {
414                 err("sohci_submit_job: EPIPE");
415                 return -1;
416         }
417
418         /* we're about to begin a new transaction here so mark the
419          * URB unfinished */
420         urb->finished = 0;
421
422         /* every endpoint has a ed, locate and fill it */
423         ed = ep_add_ed(dev, pipe, interval, 1);
424         if (!ed) {
425                 err("sohci_submit_job: ENOMEM");
426                 return -1;
427         }
428
429         /* for the private part of the URB we need the number of TDs (size) */
430         switch (usb_pipetype(pipe)) {
431         case PIPE_BULK: /* one TD for every 4096 Byte */
432                 size = (transfer_len - 1) / 4096 + 1;
433                 break;
434         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
435                 size = (transfer_len == 0)? 2:
436                                         (transfer_len - 1) / 4096 + 3;
437                 break;
438         case PIPE_INTERRUPT: /* 1 TD */
439                 size = 1;
440                 break;
441         }
442
443         ed->purb = urb;
444
445         if (size >= (N_URB_TD - 1)) {
446                 err("need %d TDs, only have %d", size, N_URB_TD);
447                 return -1;
448         }
449         purb_priv->pipe = pipe;
450
451         /* fill the private part of the URB */
452         purb_priv->length = size;
453         purb_priv->ed = ed;
454         purb_priv->actual_length = 0;
455
456         /* allocate the TDs */
457         /* note that td[0] was allocated in ep_add_ed */
458         for (i = 0; i < size; i++) {
459                 purb_priv->td[i] = td_alloc(dev);
460                 if (!purb_priv->td[i]) {
461                         purb_priv->length = i;
462                         urb_free_priv(purb_priv);
463                         err("sohci_submit_job: ENOMEM");
464                         return -1;
465                 }
466         }
467
468         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
469                 urb_free_priv(purb_priv);
470                 err("sohci_submit_job: EINVAL");
471                 return -1;
472         }
473
474         /* link the ed into a chain if is not already */
475         if (ed->state != ED_OPER)
476                 ep_link(ohci, ed);
477
478         /* fill the TDs and link it to the ed */
479         td_submit_job(dev, pipe, buffer, transfer_len,
480                       setup, purb_priv, interval);
481
482         return 0;
483 }
484
485 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
486 {
487         struct ohci_regs *regs = hc->regs;
488
489         switch (usb_pipetype(urb->pipe)) {
490         case PIPE_INTERRUPT:
491                 /* implicitly requeued */
492                 if (urb->dev->irq_handle &&
493                                 (urb->dev->irq_act_len = urb->actual_length)) {
494                         ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
495                         ohci_readl(&regs->intrenable); /* PCI posting flush */
496                         urb->dev->irq_handle(urb->dev);
497                         ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
498                         ohci_readl(&regs->intrdisable); /* PCI posting flush */
499                 }
500                 urb->actual_length = 0;
501                 td_submit_job(
502                                 urb->dev,
503                                 urb->pipe,
504                                 urb->transfer_buffer,
505                                 urb->transfer_buffer_length,
506                                 NULL,
507                                 urb,
508                                 urb->interval);
509                 break;
510         case PIPE_CONTROL:
511         case PIPE_BULK:
512                 break;
513         default:
514                 return 0;
515         }
516         return 1;
517 }
518
519 /*-------------------------------------------------------------------------*/
520
521 #ifdef DEBUG
522 /* tell us the current USB frame number */
523
524 static int sohci_get_current_frame_number(struct usb_device *usb_dev)
525 {
526         ohci_t *ohci = &gohci;
527
528         return m16_swap(ohci->hcca->frame_no);
529 }
530 #endif
531
532 /*-------------------------------------------------------------------------*
533  * ED handling functions
534  *-------------------------------------------------------------------------*/
535
536 /* search for the right branch to insert an interrupt ed into the int tree
537  * do some load ballancing;
538  * returns the branch and
539  * sets the interval to interval = 2^integer (ld (interval)) */
540
541 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
542 {
543         int i, branch = 0;
544
545         /* search for the least loaded interrupt endpoint
546          * branch of all 32 branches
547          */
548         for (i = 0; i < 32; i++)
549                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
550                         branch = i;
551
552         branch = branch % interval;
553         for (i = branch; i < 32; i += interval)
554                 ohci->ohci_int_load [i] += load;
555
556         return branch;
557 }
558
559 /*-------------------------------------------------------------------------*/
560
561 /*  2^int( ld (inter)) */
562
563 static int ep_2_n_interval(int inter)
564 {
565         int i;
566         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
567         return 1 << i;
568 }
569
570 /*-------------------------------------------------------------------------*/
571
572 /* the int tree is a binary tree
573  * in order to process it sequentially the indexes of the branches have to
574  * be mapped the mapping reverses the bits of a word of num_bits length */
575 static int ep_rev(int num_bits, int word)
576 {
577         int i, wout = 0;
578
579         for (i = 0; i < num_bits; i++)
580                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
581         return wout;
582 }
583
584 /*-------------------------------------------------------------------------*
585  * ED handling functions
586  *-------------------------------------------------------------------------*/
587
588 /* link an ed into one of the HC chains */
589
590 static int ep_link(ohci_t *ohci, ed_t *edi)
591 {
592         volatile ed_t *ed = edi;
593         int int_branch;
594         int i;
595         int inter;
596         int interval;
597         int load;
598         __u32 *ed_p;
599
600         ed->state = ED_OPER;
601         ed->int_interval = 0;
602
603         switch (ed->type) {
604         case PIPE_CONTROL:
605                 ed->hwNextED = 0;
606                 if (ohci->ed_controltail == NULL)
607                         ohci_writel(ed, &ohci->regs->ed_controlhead);
608                 else
609                         ohci->ed_controltail->hwNextED =
610                                                    m32_swap((unsigned long)ed);
611
612                 ed->ed_prev = ohci->ed_controltail;
613                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
614                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
615                         ohci->hc_control |= OHCI_CTRL_CLE;
616                         ohci_writel(ohci->hc_control, &ohci->regs->control);
617                 }
618                 ohci->ed_controltail = edi;
619                 break;
620
621         case PIPE_BULK:
622                 ed->hwNextED = 0;
623                 if (ohci->ed_bulktail == NULL)
624                         ohci_writel(ed, &ohci->regs->ed_bulkhead);
625                 else
626                         ohci->ed_bulktail->hwNextED =
627                                                    m32_swap((unsigned long)ed);
628
629                 ed->ed_prev = ohci->ed_bulktail;
630                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
631                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
632                         ohci->hc_control |= OHCI_CTRL_BLE;
633                         ohci_writel(ohci->hc_control, &ohci->regs->control);
634                 }
635                 ohci->ed_bulktail = edi;
636                 break;
637
638         case PIPE_INTERRUPT:
639                 load = ed->int_load;
640                 interval = ep_2_n_interval(ed->int_period);
641                 ed->int_interval = interval;
642                 int_branch = ep_int_ballance(ohci, interval, load);
643                 ed->int_branch = int_branch;
644
645                 for (i = 0; i < ep_rev(6, interval); i += inter) {
646                         inter = 1;
647                         for (ed_p = &(ohci->hcca->int_table[\
648                                                 ep_rev(5, i) + int_branch]);
649                                 (*ed_p != 0) &&
650                                 (((ed_t *)ed_p)->int_interval >= interval);
651                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
652                                         inter = ep_rev(6,
653                                                  ((ed_t *)ed_p)->int_interval);
654                         ed->hwNextED = *ed_p;
655                         *ed_p = m32_swap((unsigned long)ed);
656                 }
657                 break;
658         }
659         return 0;
660 }
661
662 /*-------------------------------------------------------------------------*/
663
664 /* scan the periodic table to find and unlink this ED */
665 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
666                             unsigned index, unsigned period)
667 {
668         for (; index < NUM_INTS; index += period) {
669                 __u32   *ed_p = &ohci->hcca->int_table [index];
670
671                 /* ED might have been unlinked through another path */
672                 while (*ed_p != 0) {
673                         if (((struct ed *)
674                                         m32_swap((unsigned long)ed_p)) == ed) {
675                                 *ed_p = ed->hwNextED;
676                                 break;
677                         }
678                         ed_p = &(((struct ed *)
679                                      m32_swap((unsigned long)ed_p))->hwNextED);
680                 }
681         }
682 }
683
684 /* unlink an ed from one of the HC chains.
685  * just the link to the ed is unlinked.
686  * the link from the ed still points to another operational ed or 0
687  * so the HC can eventually finish the processing of the unlinked ed */
688
689 static int ep_unlink(ohci_t *ohci, ed_t *edi)
690 {
691         volatile ed_t *ed = edi;
692         int i;
693
694         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
695
696         switch (ed->type) {
697         case PIPE_CONTROL:
698                 if (ed->ed_prev == NULL) {
699                         if (!ed->hwNextED) {
700                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
701                                 ohci_writel(ohci->hc_control,
702                                             &ohci->regs->control);
703                         }
704                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
705                                 &ohci->regs->ed_controlhead);
706                 } else {
707                         ed->ed_prev->hwNextED = ed->hwNextED;
708                 }
709                 if (ohci->ed_controltail == ed) {
710                         ohci->ed_controltail = ed->ed_prev;
711                 } else {
712                         ((ed_t *)m32_swap(
713                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
714                 }
715                 break;
716
717         case PIPE_BULK:
718                 if (ed->ed_prev == NULL) {
719                         if (!ed->hwNextED) {
720                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
721                                 ohci_writel(ohci->hc_control,
722                                             &ohci->regs->control);
723                         }
724                         ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
725                                &ohci->regs->ed_bulkhead);
726                 } else {
727                         ed->ed_prev->hwNextED = ed->hwNextED;
728                 }
729                 if (ohci->ed_bulktail == ed) {
730                         ohci->ed_bulktail = ed->ed_prev;
731                 } else {
732                         ((ed_t *)m32_swap(
733                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
734                 }
735                 break;
736
737         case PIPE_INTERRUPT:
738                 periodic_unlink(ohci, ed, 0, 1);
739                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
740                     ohci->ohci_int_load[i] -= ed->int_load;
741                 break;
742         }
743         ed->state = ED_UNLINK;
744         return 0;
745 }
746
747 /*-------------------------------------------------------------------------*/
748
749 /* add/reinit an endpoint; this should be done once at the
750  * usb_set_configuration command, but the USB stack is a little bit
751  * stateless so we do it at every transaction if the state of the ed
752  * is ED_NEW then a dummy td is added and the state is changed to
753  * ED_UNLINK in all other cases the state is left unchanged the ed
754  * info fields are setted anyway even though most of them should not
755  * change
756  */
757 static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe,
758                         int interval, int load)
759 {
760         td_t *td;
761         ed_t *ed_ret;
762         volatile ed_t *ed;
763
764         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
765                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
766
767         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
768                 err("ep_add_ed: pending delete");
769                 /* pending delete request */
770                 return NULL;
771         }
772
773         if (ed->state == ED_NEW) {
774                 /* dummy td; end of td list for ed */
775                 td = td_alloc(usb_dev);
776                 ed->hwTailP = m32_swap((unsigned long)td);
777                 ed->hwHeadP = ed->hwTailP;
778                 ed->state = ED_UNLINK;
779                 ed->type = usb_pipetype(pipe);
780                 ohci_dev.ed_cnt++;
781         }
782
783         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
784                         | usb_pipeendpoint(pipe) << 7
785                         | (usb_pipeisoc(pipe)? 0x8000: 0)
786                         | (usb_pipecontrol(pipe)? 0: \
787                                            (usb_pipeout(pipe)? 0x800: 0x1000))
788                         | (usb_dev->speed == USB_SPEED_LOW) << 13
789                         | usb_maxpacket(usb_dev, pipe) << 16);
790
791         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
792                 ed->int_period = interval;
793                 ed->int_load = load;
794         }
795
796         return ed_ret;
797 }
798
799 /*-------------------------------------------------------------------------*
800  * TD handling functions
801  *-------------------------------------------------------------------------*/
802
803 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
804
805 static void td_fill(ohci_t *ohci, unsigned int info,
806         void *data, int len,
807         struct usb_device *dev, int index, urb_priv_t *urb_priv)
808 {
809         volatile td_t  *td, *td_pt;
810 #ifdef OHCI_FILL_TRACE
811         int i;
812 #endif
813
814         if (index > urb_priv->length) {
815                 err("index > length");
816                 return;
817         }
818         /* use this td as the next dummy */
819         td_pt = urb_priv->td [index];
820         td_pt->hwNextTD = 0;
821
822         /* fill the old dummy TD */
823         td = urb_priv->td [index] =
824                              (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
825
826         td->ed = urb_priv->ed;
827         td->next_dl_td = NULL;
828         td->index = index;
829         td->data = (__u32)data;
830 #ifdef OHCI_FILL_TRACE
831         if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
832                 for (i = 0; i < len; i++)
833                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
834                 printf("\n");
835         }
836 #endif
837         if (!len)
838                 data = 0;
839
840         td->hwINFO = m32_swap(info);
841         td->hwCBP = m32_swap((unsigned long)data);
842         if (data)
843                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
844         else
845                 td->hwBE = 0;
846
847         td->hwNextTD = m32_swap((unsigned long)td_pt);
848
849         /* append to queue */
850         td->ed->hwTailP = td->hwNextTD;
851 }
852
853 /*-------------------------------------------------------------------------*/
854
855 /* prepare all TDs of a transfer */
856
857 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
858                           void *buffer, int transfer_len,
859                           struct devrequest *setup, urb_priv_t *urb,
860                           int interval)
861 {
862         ohci_t *ohci = &gohci;
863         int data_len = transfer_len;
864         void *data;
865         int cnt = 0;
866         __u32 info = 0;
867         unsigned int toggle = 0;
868
869         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
870          * bits for reseting */
871         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
872                 toggle = TD_T_TOGGLE;
873         } else {
874                 toggle = TD_T_DATA0;
875                 usb_settoggle(dev, usb_pipeendpoint(pipe),
876                                 usb_pipeout(pipe), 1);
877         }
878         urb->td_cnt = 0;
879         if (data_len)
880                 data = buffer;
881         else
882                 data = 0;
883
884         switch (usb_pipetype(pipe)) {
885         case PIPE_BULK:
886                 info = usb_pipeout(pipe)?
887                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
888                 while (data_len > 4096) {
889                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
890                                 data, 4096, dev, cnt, urb);
891                         data += 4096; data_len -= 4096; cnt++;
892                 }
893                 info = usb_pipeout(pipe)?
894                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
895                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
896                         data_len, dev, cnt, urb);
897                 cnt++;
898
899                 if (!ohci->sleeping) {
900                         /* start bulk list */
901                         ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
902                 }
903                 break;
904
905         case PIPE_CONTROL:
906                 /* Setup phase */
907                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
908                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
909
910                 /* Optional Data phase */
911                 if (data_len > 0) {
912                         info = usb_pipeout(pipe)?
913                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
914                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
915                         /* NOTE:  mishandles transfers >8K, some >4K */
916                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
917                 }
918
919                 /* Status phase */
920                 info = usb_pipeout(pipe)?
921                         TD_CC | TD_DP_IN | TD_T_DATA1:
922                         TD_CC | TD_DP_OUT | TD_T_DATA1;
923                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
924
925                 if (!ohci->sleeping) {
926                         /* start Control list */
927                         ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
928                 }
929                 break;
930
931         case PIPE_INTERRUPT:
932                 info = usb_pipeout(urb->pipe)?
933                         TD_CC | TD_DP_OUT | toggle:
934                         TD_CC | TD_R | TD_DP_IN | toggle;
935                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
936                 break;
937         }
938         if (urb->length != cnt)
939                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
940 }
941
942 /*-------------------------------------------------------------------------*
943  * Done List handling functions
944  *-------------------------------------------------------------------------*/
945
946 /* calculate the transfer length and update the urb */
947
948 static void dl_transfer_length(td_t *td)
949 {
950         __u32 tdBE, tdCBP;
951         urb_priv_t *lurb_priv = td->ed->purb;
952
953         tdBE   = m32_swap(td->hwBE);
954         tdCBP  = m32_swap(td->hwCBP);
955
956         if (!(usb_pipecontrol(lurb_priv->pipe) &&
957             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
958                 if (tdBE != 0) {
959                         if (td->hwCBP == 0)
960                                 lurb_priv->actual_length += tdBE - td->data + 1;
961                         else
962                                 lurb_priv->actual_length += tdCBP - td->data;
963                 }
964         }
965 }
966
967 /*-------------------------------------------------------------------------*/
968 static void check_status(td_t *td_list)
969 {
970         urb_priv_t *lurb_priv = td_list->ed->purb;
971         int        urb_len    = lurb_priv->length;
972         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
973         int        cc;
974
975         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
976         if (cc) {
977                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
978
979                 if (*phwHeadP & m32_swap(0x1)) {
980                         if (lurb_priv &&
981                             ((td_list->index + 1) < urb_len)) {
982                                 *phwHeadP =
983                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
984                                                         m32_swap(0xfffffff0)) |
985                                                    (*phwHeadP & m32_swap(0x2));
986
987                                 lurb_priv->td_cnt += urb_len -
988                                                      td_list->index - 1;
989                         } else
990                                 *phwHeadP &= m32_swap(0xfffffff2);
991                 }
992 #ifdef CONFIG_MPC5200
993                 td_list->hwNextTD = 0;
994 #endif
995         }
996 }
997
998 /* replies to the request have to be on a FIFO basis so
999  * we reverse the reversed done-list */
1000 static td_t *dl_reverse_done_list(ohci_t *ohci)
1001 {
1002         __u32 td_list_hc;
1003         td_t *td_rev = NULL;
1004         td_t *td_list = NULL;
1005
1006         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1007         ohci->hcca->done_head = 0;
1008
1009         while (td_list_hc) {
1010                 td_list = (td_t *)td_list_hc;
1011                 check_status(td_list);
1012                 td_list->next_dl_td = td_rev;
1013                 td_rev = td_list;
1014                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1015         }
1016         return td_list;
1017 }
1018
1019 /*-------------------------------------------------------------------------*/
1020 /*-------------------------------------------------------------------------*/
1021
1022 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1023 {
1024         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1025                 urb->finished = sohci_return_job(ohci, urb);
1026         else
1027                 dbg("finish_urb: strange.., ED state %x, \n", status);
1028 }
1029
1030 /*
1031  * Used to take back a TD from the host controller. This would normally be
1032  * called from within dl_done_list, however it may be called directly if the
1033  * HC no longer sees the TD and it has not appeared on the donelist (after
1034  * two frames).  This bug has been observed on ZF Micro systems.
1035  */
1036 static int takeback_td(ohci_t *ohci, td_t *td_list)
1037 {
1038         ed_t *ed;
1039         int cc;
1040         int stat = 0;
1041         /* urb_t *urb; */
1042         urb_priv_t *lurb_priv;
1043         __u32 tdINFO, edHeadP, edTailP;
1044
1045         tdINFO = m32_swap(td_list->hwINFO);
1046
1047         ed = td_list->ed;
1048         lurb_priv = ed->purb;
1049
1050         dl_transfer_length(td_list);
1051
1052         lurb_priv->td_cnt++;
1053
1054         /* error code of transfer */
1055         cc = TD_CC_GET(tdINFO);
1056         if (cc) {
1057                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1058                 stat = cc_to_error[cc];
1059         }
1060
1061         /* see if this done list makes for all TD's of current URB,
1062         * and mark the URB finished if so */
1063         if (lurb_priv->td_cnt == lurb_priv->length)
1064                 finish_urb(ohci, lurb_priv, ed->state);
1065
1066         dbg("dl_done_list: processing TD %x, len %x\n",
1067                 lurb_priv->td_cnt, lurb_priv->length);
1068
1069         if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
1070                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1071                 edTailP = m32_swap(ed->hwTailP);
1072
1073                 /* unlink eds if they are not busy */
1074                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1075                         ep_unlink(ohci, ed);
1076         }
1077         return stat;
1078 }
1079
1080 static int dl_done_list(ohci_t *ohci)
1081 {
1082         int stat = 0;
1083         td_t    *td_list = dl_reverse_done_list(ohci);
1084
1085         while (td_list) {
1086                 td_t    *td_next = td_list->next_dl_td;
1087                 stat = takeback_td(ohci, td_list);
1088                 td_list = td_next;
1089         }
1090         return stat;
1091 }
1092
1093 /*-------------------------------------------------------------------------*
1094  * Virtual Root Hub
1095  *-------------------------------------------------------------------------*/
1096
1097 /* Device descriptor */
1098 static __u8 root_hub_dev_des[] =
1099 {
1100         0x12,       /*  __u8  bLength; */
1101         0x01,       /*  __u8  bDescriptorType; Device */
1102         0x10,       /*  __u16 bcdUSB; v1.1 */
1103         0x01,
1104         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1105         0x00,       /*  __u8  bDeviceSubClass; */
1106         0x00,       /*  __u8  bDeviceProtocol; */
1107         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1108         0x00,       /*  __u16 idVendor; */
1109         0x00,
1110         0x00,       /*  __u16 idProduct; */
1111         0x00,
1112         0x00,       /*  __u16 bcdDevice; */
1113         0x00,
1114         0x00,       /*  __u8  iManufacturer; */
1115         0x01,       /*  __u8  iProduct; */
1116         0x00,       /*  __u8  iSerialNumber; */
1117         0x01        /*  __u8  bNumConfigurations; */
1118 };
1119
1120 /* Configuration descriptor */
1121 static __u8 root_hub_config_des[] =
1122 {
1123         0x09,       /*  __u8  bLength; */
1124         0x02,       /*  __u8  bDescriptorType; Configuration */
1125         0x19,       /*  __u16 wTotalLength; */
1126         0x00,
1127         0x01,       /*  __u8  bNumInterfaces; */
1128         0x01,       /*  __u8  bConfigurationValue; */
1129         0x00,       /*  __u8  iConfiguration; */
1130         0x40,       /*  __u8  bmAttributes;
1131          Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1132         0x00,       /*  __u8  MaxPower; */
1133
1134         /* interface */
1135         0x09,       /*  __u8  if_bLength; */
1136         0x04,       /*  __u8  if_bDescriptorType; Interface */
1137         0x00,       /*  __u8  if_bInterfaceNumber; */
1138         0x00,       /*  __u8  if_bAlternateSetting; */
1139         0x01,       /*  __u8  if_bNumEndpoints; */
1140         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1141         0x00,       /*  __u8  if_bInterfaceSubClass; */
1142         0x00,       /*  __u8  if_bInterfaceProtocol; */
1143         0x00,       /*  __u8  if_iInterface; */
1144
1145         /* endpoint */
1146         0x07,       /*  __u8  ep_bLength; */
1147         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1148         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1149         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1150         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1151         0x00,
1152         0xff        /*  __u8  ep_bInterval; 255 ms */
1153 };
1154
1155 static unsigned char root_hub_str_index0[] =
1156 {
1157         0x04,                   /*  __u8  bLength; */
1158         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1159         0x09,                   /*  __u8  lang ID */
1160         0x04,                   /*  __u8  lang ID */
1161 };
1162
1163 static unsigned char root_hub_str_index1[] =
1164 {
1165         28,                     /*  __u8  bLength; */
1166         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1167         'O',                    /*  __u8  Unicode */
1168         0,                              /*  __u8  Unicode */
1169         'H',                    /*  __u8  Unicode */
1170         0,                              /*  __u8  Unicode */
1171         'C',                    /*  __u8  Unicode */
1172         0,                              /*  __u8  Unicode */
1173         'I',                    /*  __u8  Unicode */
1174         0,                              /*  __u8  Unicode */
1175         ' ',                    /*  __u8  Unicode */
1176         0,                              /*  __u8  Unicode */
1177         'R',                    /*  __u8  Unicode */
1178         0,                              /*  __u8  Unicode */
1179         'o',                    /*  __u8  Unicode */
1180         0,                              /*  __u8  Unicode */
1181         'o',                    /*  __u8  Unicode */
1182         0,                              /*  __u8  Unicode */
1183         't',                    /*  __u8  Unicode */
1184         0,                              /*  __u8  Unicode */
1185         ' ',                    /*  __u8  Unicode */
1186         0,                              /*  __u8  Unicode */
1187         'H',                    /*  __u8  Unicode */
1188         0,                              /*  __u8  Unicode */
1189         'u',                    /*  __u8  Unicode */
1190         0,                              /*  __u8  Unicode */
1191         'b',                    /*  __u8  Unicode */
1192         0,                              /*  __u8  Unicode */
1193 };
1194
1195 /* Hub class-specific descriptor is constructed dynamically */
1196
1197 /*-------------------------------------------------------------------------*/
1198
1199 #define OK(x)                   len = (x); break
1200 #ifdef DEBUG
1201 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); ohci_writel((x), \
1202                                                 &gohci.regs->roothub.status); }
1203 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1204         (x)); ohci_writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
1205 #else
1206 #define WR_RH_STAT(x)           ohci_writel((x), &gohci.regs->roothub.status)
1207 #define WR_RH_PORTSTAT(x)       ohci_writel((x), \
1208                                     &gohci.regs->roothub.portstatus[wIndex-1])
1209 #endif
1210 #define RD_RH_STAT              roothub_status(&gohci)
1211 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci, wIndex-1)
1212
1213 /* request to virtual root hub */
1214
1215 int rh_check_port_status(ohci_t *controller)
1216 {
1217         __u32 temp, ndp, i;
1218         int res;
1219
1220         res = -1;
1221         temp = roothub_a(controller);
1222         ndp = (temp & RH_A_NDP);
1223 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1224         ndp = (ndp == 2) ? 1:0;
1225 #endif
1226         for (i = 0; i < ndp; i++) {
1227                 temp = roothub_portstatus(controller, i);
1228                 /* check for a device disconnect */
1229                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1230                         (RH_PS_PESC | RH_PS_CSC)) &&
1231                         ((temp & RH_PS_CCS) == 0)) {
1232                         res = i;
1233                         break;
1234                 }
1235         }
1236         return res;
1237 }
1238
1239 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1240                 void *buffer, int transfer_len, struct devrequest *cmd)
1241 {
1242         void *data = buffer;
1243         int leni = transfer_len;
1244         int len = 0;
1245         int stat = 0;
1246         __u16 bmRType_bReq;
1247         __u16 wValue;
1248         __u16 wIndex;
1249         __u16 wLength;
1250         ALLOC_ALIGN_BUFFER(__u8, databuf, 16, sizeof(u32));
1251
1252 #ifdef DEBUG
1253 pkt_print(NULL, dev, pipe, buffer, transfer_len,
1254           cmd, "SUB(rh)", usb_pipein(pipe));
1255 #else
1256         mdelay(1);
1257 #endif
1258         if (usb_pipeint(pipe)) {
1259                 info("Root-Hub submit IRQ: NOT implemented");
1260                 return 0;
1261         }
1262
1263         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1264         wValue        = le16_to_cpu(cmd->value);
1265         wIndex        = le16_to_cpu(cmd->index);
1266         wLength       = le16_to_cpu(cmd->length);
1267
1268         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1269                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1270
1271         switch (bmRType_bReq) {
1272         /* Request Destination:
1273            without flags: Device,
1274            RH_INTERFACE: interface,
1275            RH_ENDPOINT: endpoint,
1276            RH_CLASS means HUB here,
1277            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1278         */
1279
1280         case RH_GET_STATUS:
1281                 *(u16 *)databuf = cpu_to_le16(1);
1282                 OK(2);
1283         case RH_GET_STATUS | RH_INTERFACE:
1284                 *(u16 *)databuf = cpu_to_le16(0);
1285                 OK(2);
1286         case RH_GET_STATUS | RH_ENDPOINT:
1287                 *(u16 *)databuf = cpu_to_le16(0);
1288                 OK(2);
1289         case RH_GET_STATUS | RH_CLASS:
1290                 *(u32 *)databuf = cpu_to_le32(
1291                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1292                 OK(4);
1293         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1294                 *(u32 *)databuf = cpu_to_le32(RD_RH_PORTSTAT);
1295                 OK(4);
1296
1297         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1298                 switch (wValue) {
1299                 case (RH_ENDPOINT_STALL):
1300                         OK(0);
1301                 }
1302                 break;
1303
1304         case RH_CLEAR_FEATURE | RH_CLASS:
1305                 switch (wValue) {
1306                 case RH_C_HUB_LOCAL_POWER:
1307                         OK(0);
1308                 case (RH_C_HUB_OVER_CURRENT):
1309                         WR_RH_STAT(RH_HS_OCIC);
1310                         OK(0);
1311                 }
1312                 break;
1313
1314         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1315                 switch (wValue) {
1316                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1317                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1318                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1319                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1320                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1321                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1322                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1323                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1324                 }
1325                 break;
1326
1327         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1328                 switch (wValue) {
1329                 case (RH_PORT_SUSPEND):
1330                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1331                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1332                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1333                                 WR_RH_PORTSTAT(RH_PS_PRS);
1334                         OK(0);
1335                 case (RH_PORT_POWER):
1336                         WR_RH_PORTSTAT(RH_PS_PPS);
1337                         mdelay(100);
1338                         OK(0);
1339                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1340                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1341                                 WR_RH_PORTSTAT(RH_PS_PES);
1342                         OK(0);
1343                 }
1344                 break;
1345
1346         case RH_SET_ADDRESS:
1347                 gohci.rh.devnum = wValue;
1348                 OK(0);
1349
1350         case RH_GET_DESCRIPTOR:
1351                 switch ((wValue & 0xff00) >> 8) {
1352                 case (0x01): /* device descriptor */
1353                         len = min_t(unsigned int,
1354                                         leni,
1355                                         min_t(unsigned int,
1356                                         sizeof(root_hub_dev_des),
1357                                         wLength));
1358                         databuf = root_hub_dev_des; OK(len);
1359                 case (0x02): /* configuration descriptor */
1360                         len = min_t(unsigned int,
1361                                         leni,
1362                                         min_t(unsigned int,
1363                                         sizeof(root_hub_config_des),
1364                                         wLength));
1365                         databuf = root_hub_config_des; OK(len);
1366                 case (0x03): /* string descriptors */
1367                         if (wValue == 0x0300) {
1368                                 len = min_t(unsigned int,
1369                                                 leni,
1370                                                 min_t(unsigned int,
1371                                                 sizeof(root_hub_str_index0),
1372                                                 wLength));
1373                                 databuf = root_hub_str_index0;
1374                                 OK(len);
1375                         }
1376                         if (wValue == 0x0301) {
1377                                 len = min_t(unsigned int,
1378                                                 leni,
1379                                                 min_t(unsigned int,
1380                                                 sizeof(root_hub_str_index1),
1381                                                 wLength));
1382                                 databuf = root_hub_str_index1;
1383                                 OK(len);
1384                 }
1385                 default:
1386                         stat = USB_ST_STALLED;
1387                 }
1388                 break;
1389
1390         case RH_GET_DESCRIPTOR | RH_CLASS:
1391         {
1392                 __u32 temp = roothub_a(&gohci);
1393
1394                 databuf[0] = 9;         /* min length; */
1395                 databuf[1] = 0x29;
1396                 databuf[2] = temp & RH_A_NDP;
1397 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1398                 databuf[2] = (databuf[2] == 2) ? 1 : 0;
1399 #endif
1400                 databuf[3] = 0;
1401                 if (temp & RH_A_PSM)    /* per-port power switching? */
1402                         databuf[3] |= 0x1;
1403                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1404                         databuf[3] |= 0x10;
1405                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1406                         databuf[3] |= 0x8;
1407
1408                 databuf[4] = 0;
1409                 databuf[5] = (temp & RH_A_POTPGT) >> 24;
1410                 databuf[6] = 0;
1411                 temp = roothub_b(&gohci);
1412                 databuf[7] = temp & RH_B_DR;
1413                 if (databuf[2] < 7) {
1414                         databuf[8] = 0xff;
1415                 } else {
1416                         databuf[0] += 2;
1417                         databuf[8] = (temp & RH_B_DR) >> 8;
1418                         databuf[10] = databuf[9] = 0xff;
1419                 }
1420
1421                 len = min_t(unsigned int, leni,
1422                             min_t(unsigned int, databuf[0], wLength));
1423                 OK(len);
1424         }
1425
1426         case RH_GET_CONFIGURATION:
1427                 databuf[0] = 0x01;
1428                 OK(1);
1429
1430         case RH_SET_CONFIGURATION:
1431                 WR_RH_STAT(0x10000);
1432                 OK(0);
1433
1434         default:
1435                 dbg("unsupported root hub command");
1436                 stat = USB_ST_STALLED;
1437         }
1438
1439 #ifdef  DEBUG
1440         ohci_dump_roothub(&gohci, 1);
1441 #else
1442         mdelay(1);
1443 #endif
1444
1445         len = min_t(int, len, leni);
1446         if (data != databuf)
1447                 memcpy(data, databuf, len);
1448         dev->act_len = len;
1449         dev->status = stat;
1450
1451 #ifdef DEBUG
1452         pkt_print(NULL, dev, pipe, buffer,
1453                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1454 #else
1455         mdelay(1);
1456 #endif
1457
1458         return stat;
1459 }
1460
1461 /*-------------------------------------------------------------------------*/
1462
1463 /* common code for handling submit messages - used for all but root hub */
1464 /* accesses. */
1465 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1466                 int transfer_len, struct devrequest *setup, int interval)
1467 {
1468         int stat = 0;
1469         int maxsize = usb_maxpacket(dev, pipe);
1470         int timeout;
1471         urb_priv_t *urb;
1472
1473         urb = malloc(sizeof(urb_priv_t));
1474         memset(urb, 0, sizeof(urb_priv_t));
1475
1476         urb->dev = dev;
1477         urb->pipe = pipe;
1478         urb->transfer_buffer = buffer;
1479         urb->transfer_buffer_length = transfer_len;
1480         urb->interval = interval;
1481
1482         /* device pulled? Shortcut the action. */
1483         if (devgone == dev) {
1484                 dev->status = USB_ST_CRC_ERR;
1485                 return 0;
1486         }
1487
1488 #ifdef DEBUG
1489         urb->actual_length = 0;
1490         pkt_print(urb, dev, pipe, buffer, transfer_len,
1491                   setup, "SUB", usb_pipein(pipe));
1492 #else
1493         mdelay(1);
1494 #endif
1495         if (!maxsize) {
1496                 err("submit_common_message: pipesize for pipe %lx is zero",
1497                         pipe);
1498                 return -1;
1499         }
1500
1501         if (sohci_submit_job(urb, setup) < 0) {
1502                 err("sohci_submit_job failed");
1503                 return -1;
1504         }
1505
1506 #if 0
1507         mdelay(10);
1508         /* ohci_dump_status(&gohci); */
1509 #endif
1510
1511         timeout = USB_TIMEOUT_MS(pipe);
1512
1513         /* wait for it to complete */
1514         for (;;) {
1515                 /* check whether the controller is done */
1516                 stat = hc_interrupt();
1517                 if (stat < 0) {
1518                         stat = USB_ST_CRC_ERR;
1519                         break;
1520                 }
1521
1522                 /* NOTE: since we are not interrupt driven in U-Boot and always
1523                  * handle only one URB at a time, we cannot assume the
1524                  * transaction finished on the first successful return from
1525                  * hc_interrupt().. unless the flag for current URB is set,
1526                  * meaning that all TD's to/from device got actually
1527                  * transferred and processed. If the current URB is not
1528                  * finished we need to re-iterate this loop so as
1529                  * hc_interrupt() gets called again as there needs to be some
1530                  * more TD's to process still */
1531                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1532                         /* 0xff is returned for an SF-interrupt */
1533                         break;
1534                 }
1535
1536                 if (--timeout) {
1537                         mdelay(1);
1538                         if (!urb->finished)
1539                                 dbg("*");
1540
1541                 } else {
1542                         err("CTL:TIMEOUT ");
1543                         dbg("submit_common_msg: TO status %x\n", stat);
1544                         urb->finished = 1;
1545                         stat = USB_ST_CRC_ERR;
1546                         break;
1547                 }
1548         }
1549
1550         dev->status = stat;
1551         dev->act_len = transfer_len;
1552
1553 #ifdef DEBUG
1554         pkt_print(urb, dev, pipe, buffer, transfer_len,
1555                   setup, "RET(ctlr)", usb_pipein(pipe));
1556 #else
1557         mdelay(1);
1558 #endif
1559
1560         /* free TDs in urb_priv */
1561         if (!usb_pipeint(pipe))
1562                 urb_free_priv(urb);
1563         return 0;
1564 }
1565
1566 /* submit routines called from usb.c */
1567 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1568                 int transfer_len)
1569 {
1570         info("submit_bulk_msg");
1571         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1572 }
1573
1574 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1575                 int transfer_len, struct devrequest *setup)
1576 {
1577         int maxsize = usb_maxpacket(dev, pipe);
1578
1579         info("submit_control_msg");
1580 #ifdef DEBUG
1581         pkt_print(NULL, dev, pipe, buffer, transfer_len,
1582                   setup, "SUB", usb_pipein(pipe));
1583 #else
1584         mdelay(1);
1585 #endif
1586         if (!maxsize) {
1587                 err("submit_control_message: pipesize for pipe %lx is zero",
1588                         pipe);
1589                 return -1;
1590         }
1591         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1592                 gohci.rh.dev = dev;
1593                 /* root hub - redirect */
1594                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1595                         setup);
1596         }
1597
1598         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1599 }
1600
1601 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1602                 int transfer_len, int interval)
1603 {
1604         info("submit_int_msg");
1605         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1606                         interval);
1607 }
1608
1609 /*-------------------------------------------------------------------------*
1610  * HC functions
1611  *-------------------------------------------------------------------------*/
1612
1613 /* reset the HC and BUS */
1614
1615 static int hc_reset(ohci_t *ohci)
1616 {
1617 #ifdef CONFIG_PCI_EHCI_DEVNO
1618         pci_dev_t pdev;
1619 #endif
1620         int timeout = 30;
1621         int smm_timeout = 50; /* 0,5 sec */
1622
1623         dbg("%s\n", __FUNCTION__);
1624
1625 #ifdef CONFIG_PCI_EHCI_DEVNO
1626         /*
1627          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1628          * resetting via EHCI registers only.
1629          */
1630         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1631         if (pdev != -1) {
1632                 u32 base;
1633                 int timeout = 1000;
1634
1635                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1636                 base += EHCI_USBCMD_OFF;
1637                 ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
1638
1639                 while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
1640                         if (timeout-- <= 0) {
1641                                 printf("USB RootHub reset timed out!");
1642                                 break;
1643                         }
1644                         udelay(1);
1645                 }
1646         } else
1647                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1648 #endif
1649         if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1650                 /* SMM owns the HC, request ownership */
1651                 ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
1652                 info("USB HC TakeOver from SMM");
1653                 while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1654                         mdelay(10);
1655                         if (--smm_timeout == 0) {
1656                                 err("USB HC TakeOver failed!");
1657                                 return -1;
1658                         }
1659                 }
1660         }
1661
1662         /* Disable HC interrupts */
1663         ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1664
1665         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1666                 ohci->slot_name,
1667                 ohci_readl(&ohci->regs->control));
1668
1669         /* Reset USB (needed by some controllers) */
1670         ohci->hc_control = 0;
1671         ohci_writel(ohci->hc_control, &ohci->regs->control);
1672
1673         /* HC Reset requires max 10 us delay */
1674         ohci_writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1675         while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1676                 if (--timeout == 0) {
1677                         err("USB HC reset timed out!");
1678                         return -1;
1679                 }
1680                 udelay(1);
1681         }
1682         return 0;
1683 }
1684
1685 /*-------------------------------------------------------------------------*/
1686
1687 /* Start an OHCI controller, set the BUS operational
1688  * enable interrupts
1689  * connect the virtual root hub */
1690
1691 static int hc_start(ohci_t *ohci)
1692 {
1693         __u32 mask;
1694         unsigned int fminterval;
1695
1696         ohci->disabled = 1;
1697
1698         /* Tell the controller where the control and bulk lists are
1699          * The lists are empty now. */
1700
1701         ohci_writel(0, &ohci->regs->ed_controlhead);
1702         ohci_writel(0, &ohci->regs->ed_bulkhead);
1703
1704         ohci_writel((__u32)ohci->hcca,
1705                     &ohci->regs->hcca); /* reset clears this */
1706
1707         fminterval = 0x2edf;
1708         ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1709         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1710         ohci_writel(fminterval, &ohci->regs->fminterval);
1711         ohci_writel(0x628, &ohci->regs->lsthresh);
1712
1713         /* start controller operations */
1714         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1715         ohci->disabled = 0;
1716         ohci_writel(ohci->hc_control, &ohci->regs->control);
1717
1718         /* disable all interrupts */
1719         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1720                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1721                         OHCI_INTR_OC | OHCI_INTR_MIE);
1722         ohci_writel(mask, &ohci->regs->intrdisable);
1723         /* clear all interrupts */
1724         mask &= ~OHCI_INTR_MIE;
1725         ohci_writel(mask, &ohci->regs->intrstatus);
1726         /* Choose the interrupts we care about now  - but w/o MIE */
1727         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1728         ohci_writel(mask, &ohci->regs->intrenable);
1729
1730 #ifdef  OHCI_USE_NPS
1731         /* required for AMD-756 and some Mac platforms */
1732         ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1733                 &ohci->regs->roothub.a);
1734         ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1735 #endif  /* OHCI_USE_NPS */
1736
1737         /* POTPGT delay is bits 24-31, in 2 ms units. */
1738         mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1739
1740         /* connect the virtual root hub */
1741         ohci->rh.devnum = 0;
1742
1743         return 0;
1744 }
1745
1746 /*-------------------------------------------------------------------------*/
1747
1748 /* an interrupt happens */
1749
1750 static int hc_interrupt(void)
1751 {
1752         ohci_t *ohci = &gohci;
1753         struct ohci_regs *regs = ohci->regs;
1754         int ints;
1755         int stat = -1;
1756
1757         if ((ohci->hcca->done_head != 0) &&
1758                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1759                 ints =  OHCI_INTR_WDH;
1760         } else {
1761                 ints = ohci_readl(&regs->intrstatus);
1762                 if (ints == ~(u32)0) {
1763                         ohci->disabled++;
1764                         err("%s device removed!", ohci->slot_name);
1765                         return -1;
1766                 } else {
1767                         ints &= ohci_readl(&regs->intrenable);
1768                         if (ints == 0) {
1769                                 dbg("hc_interrupt: returning..\n");
1770                                 return 0xff;
1771                         }
1772                 }
1773         }
1774
1775         /* dbg("Interrupt: %x frame: %x", ints,
1776                                         le16_to_cpu(ohci->hcca->frame_no)); */
1777
1778         if (ints & OHCI_INTR_RHSC)
1779                 stat = 0xff;
1780
1781         if (ints & OHCI_INTR_UE) {
1782                 ohci->disabled++;
1783                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1784                         ohci->slot_name);
1785                 /* e.g. due to PCI Master/Target Abort */
1786
1787 #ifdef  DEBUG
1788                 ohci_dump(ohci, 1);
1789 #else
1790                 mdelay(1);
1791 #endif
1792                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1793                 /* Make some non-interrupt context restart the controller. */
1794                 /* Count and limit the retries though; either hardware or */
1795                 /* software errors can go forever... */
1796                 hc_reset(ohci);
1797                 return -1;
1798         }
1799
1800         if (ints & OHCI_INTR_WDH) {
1801                 mdelay(1);
1802                 ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
1803                 (void)ohci_readl(&regs->intrdisable); /* flush */
1804                 stat = dl_done_list(&gohci);
1805                 ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
1806                 (void)ohci_readl(&regs->intrdisable); /* flush */
1807         }
1808
1809         if (ints & OHCI_INTR_SO) {
1810                 dbg("USB Schedule overrun\n");
1811                 ohci_writel(OHCI_INTR_SO, &regs->intrenable);
1812                 stat = -1;
1813         }
1814
1815         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1816         if (ints & OHCI_INTR_SF) {
1817                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1818                 mdelay(1);
1819                 ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
1820                 if (ohci->ed_rm_list[frame] != NULL)
1821                         ohci_writel(OHCI_INTR_SF, &regs->intrenable);
1822                 stat = 0xff;
1823         }
1824
1825         ohci_writel(ints, &regs->intrstatus);
1826         return stat;
1827 }
1828
1829 /*-------------------------------------------------------------------------*/
1830
1831 /*-------------------------------------------------------------------------*/
1832
1833 /* De-allocate all resources.. */
1834
1835 static void hc_release_ohci(ohci_t *ohci)
1836 {
1837         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1838
1839         if (!ohci->disabled)
1840                 hc_reset(ohci);
1841 }
1842
1843 /*-------------------------------------------------------------------------*/
1844
1845 /*
1846  * low level initalisation routine, called from usb.c
1847  */
1848 static char ohci_inited = 0;
1849
1850 int usb_lowlevel_init(int index, void **controller)
1851 {
1852 #ifdef CONFIG_PCI_OHCI
1853         pci_dev_t pdev;
1854 #endif
1855
1856 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1857         /* cpu dependant init */
1858         if (usb_cpu_init())
1859                 return -1;
1860 #endif
1861
1862 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1863         /*  board dependant init */
1864         if (usb_board_init())
1865                 return -1;
1866 #endif
1867         memset(&gohci, 0, sizeof(ohci_t));
1868
1869         /* align the storage */
1870         if ((__u32)&ghcca[0] & 0xff) {
1871                 err("HCCA not aligned!!");
1872                 return -1;
1873         }
1874         phcca = &ghcca[0];
1875         info("aligned ghcca %p", phcca);
1876         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1877         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1878                 err("EDs not aligned!!");
1879                 return -1;
1880         }
1881         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1882         if ((__u32)gtd & 0x7) {
1883                 err("TDs not aligned!!");
1884                 return -1;
1885         }
1886         ptd = gtd;
1887         gohci.hcca = phcca;
1888         memset(phcca, 0, sizeof(struct ohci_hcca));
1889
1890         gohci.disabled = 1;
1891         gohci.sleeping = 0;
1892         gohci.irq = -1;
1893 #ifdef CONFIG_PCI_OHCI
1894         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1895
1896         if (pdev != -1) {
1897                 u16 vid, did;
1898                 u32 base;
1899                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1900                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1901                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1902                                 vid, did, (pdev >> 16) & 0xff,
1903                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1904                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1905                 printf("OHCI regs address 0x%08x\n", base);
1906                 gohci.regs = (struct ohci_regs *)base;
1907         } else
1908                 return -1;
1909 #else
1910         gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
1911 #endif
1912
1913         gohci.flags = 0;
1914         gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
1915
1916         if (hc_reset (&gohci) < 0) {
1917                 hc_release_ohci (&gohci);
1918                 err ("can't reset usb-%s", gohci.slot_name);
1919 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1920                 /* board dependant cleanup */
1921                 usb_board_init_fail();
1922 #endif
1923
1924 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1925                 /* cpu dependant cleanup */
1926                 usb_cpu_init_fail();
1927 #endif
1928                 return -1;
1929         }
1930
1931         if (hc_start(&gohci) < 0) {
1932                 err("can't start usb-%s", gohci.slot_name);
1933                 hc_release_ohci(&gohci);
1934                 /* Initialization failed */
1935 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1936                 /* board dependant cleanup */
1937                 usb_board_stop();
1938 #endif
1939
1940 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1941                 /* cpu dependant cleanup */
1942                 usb_cpu_stop();
1943 #endif
1944                 return -1;
1945         }
1946
1947 #ifdef  DEBUG
1948         ohci_dump(&gohci, 1);
1949 #else
1950         mdelay(1);
1951 #endif
1952         ohci_inited = 1;
1953         return 0;
1954 }
1955
1956 int usb_lowlevel_stop(int index)
1957 {
1958         /* this gets called really early - before the controller has */
1959         /* even been initialized! */
1960         if (!ohci_inited)
1961                 return 0;
1962         /* TODO release any interrupts, etc. */
1963         /* call hc_release_ohci() here ? */
1964         hc_reset(&gohci);
1965
1966 #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
1967         /* board dependant cleanup */
1968         if (usb_board_stop())
1969                 return -1;
1970 #endif
1971
1972 #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
1973         /* cpu dependant cleanup */
1974         if (usb_cpu_stop())
1975                 return -1;
1976 #endif
1977         /* This driver is no longer initialised. It needs a new low-level
1978          * init (board/cpu) before it can be used again. */
1979         ohci_inited = 0;
1980         return 0;
1981 }