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Merge branch 'master' of git://git.denx.de/u-boot-imx
[karo-tx-uboot.git] / drivers / usb / musb / musb_hcd.c
1 /*
2  * Mentor USB OTG Core host controller driver.
3  *
4  * Copyright (c) 2008 Texas Instruments
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  *
21  * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
22  */
23
24 #include <common.h>
25 #include "musb_hcd.h"
26
27 /* MSC control transfers */
28 #define USB_MSC_BBB_RESET       0xFF
29 #define USB_MSC_BBB_GET_MAX_LUN 0xFE
30
31 /* Endpoint configuration information */
32 static struct musb_epinfo epinfo[3] = {
33         {MUSB_BULK_EP, 1, 512}, /* EP1 - Bluk Out - 512 Bytes */
34         {MUSB_BULK_EP, 0, 512}, /* EP1 - Bluk In  - 512 Bytes */
35         {MUSB_INTR_EP, 0, 64}   /* EP2 - Interrupt IN - 64 Bytes */
36 };
37
38 /* --- Virtual Root Hub ---------------------------------------------------- */
39 #ifdef MUSB_NO_MULTIPOINT
40 static int rh_devnum;
41 static u32 port_status;
42
43 /* Device descriptor */
44 static u8 root_hub_dev_des[] = {
45         0x12,                   /*  __u8  bLength; */
46         0x01,                   /*  __u8  bDescriptorType; Device */
47         0x00,                   /*  __u16 bcdUSB; v1.1 */
48         0x02,
49         0x09,                   /*  __u8  bDeviceClass; HUB_CLASSCODE */
50         0x00,                   /*  __u8  bDeviceSubClass; */
51         0x00,                   /*  __u8  bDeviceProtocol; */
52         0x08,                   /*  __u8  bMaxPacketSize0; 8 Bytes */
53         0x00,                   /*  __u16 idVendor; */
54         0x00,
55         0x00,                   /*  __u16 idProduct; */
56         0x00,
57         0x00,                   /*  __u16 bcdDevice; */
58         0x00,
59         0x00,                   /*  __u8  iManufacturer; */
60         0x01,                   /*  __u8  iProduct; */
61         0x00,                   /*  __u8  iSerialNumber; */
62         0x01                    /*  __u8  bNumConfigurations; */
63 };
64
65 /* Configuration descriptor */
66 static u8 root_hub_config_des[] = {
67         0x09,                   /*  __u8  bLength; */
68         0x02,                   /*  __u8  bDescriptorType; Configuration */
69         0x19,                   /*  __u16 wTotalLength; */
70         0x00,
71         0x01,                   /*  __u8  bNumInterfaces; */
72         0x01,                   /*  __u8  bConfigurationValue; */
73         0x00,                   /*  __u8  iConfiguration; */
74         0x40,                   /*  __u8  bmAttributes;
75                                    Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
76         0x00,                   /*  __u8  MaxPower; */
77
78         /* interface */
79         0x09,                   /*  __u8  if_bLength; */
80         0x04,                   /*  __u8  if_bDescriptorType; Interface */
81         0x00,                   /*  __u8  if_bInterfaceNumber; */
82         0x00,                   /*  __u8  if_bAlternateSetting; */
83         0x01,                   /*  __u8  if_bNumEndpoints; */
84         0x09,                   /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
85         0x00,                   /*  __u8  if_bInterfaceSubClass; */
86         0x00,                   /*  __u8  if_bInterfaceProtocol; */
87         0x00,                   /*  __u8  if_iInterface; */
88
89         /* endpoint */
90         0x07,                   /*  __u8  ep_bLength; */
91         0x05,                   /*  __u8  ep_bDescriptorType; Endpoint */
92         0x81,                   /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
93         0x03,                   /*  __u8  ep_bmAttributes; Interrupt */
94         0x00,                   /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
95         0x02,
96         0xff                    /*  __u8  ep_bInterval; 255 ms */
97 };
98
99 static unsigned char root_hub_str_index0[] = {
100         0x04,                   /*  __u8  bLength; */
101         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
102         0x09,                   /*  __u8  lang ID */
103         0x04,                   /*  __u8  lang ID */
104 };
105
106 static unsigned char root_hub_str_index1[] = {
107         0x1c,                   /*  __u8  bLength; */
108         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
109         'M',                    /*  __u8  Unicode */
110         0,                      /*  __u8  Unicode */
111         'U',                    /*  __u8  Unicode */
112         0,                      /*  __u8  Unicode */
113         'S',                    /*  __u8  Unicode */
114         0,                      /*  __u8  Unicode */
115         'B',                    /*  __u8  Unicode */
116         0,                      /*  __u8  Unicode */
117         ' ',                    /*  __u8  Unicode */
118         0,                      /*  __u8  Unicode */
119         'R',                    /*  __u8  Unicode */
120         0,                      /*  __u8  Unicode */
121         'o',                    /*  __u8  Unicode */
122         0,                      /*  __u8  Unicode */
123         'o',                    /*  __u8  Unicode */
124         0,                      /*  __u8  Unicode */
125         't',                    /*  __u8  Unicode */
126         0,                      /*  __u8  Unicode */
127         ' ',                    /*  __u8  Unicode */
128         0,                      /*  __u8  Unicode */
129         'H',                    /*  __u8  Unicode */
130         0,                      /*  __u8  Unicode */
131         'u',                    /*  __u8  Unicode */
132         0,                      /*  __u8  Unicode */
133         'b',                    /*  __u8  Unicode */
134         0,                      /*  __u8  Unicode */
135 };
136 #endif
137
138 /*
139  * This function writes the data toggle value.
140  */
141 static void write_toggle(struct usb_device *dev, u8 ep, u8 dir_out)
142 {
143         u16 toggle = usb_gettoggle(dev, ep, dir_out);
144         u16 csr;
145
146         if (dir_out) {
147                 csr = readw(&musbr->txcsr);
148                 if (!toggle) {
149                         if (csr & MUSB_TXCSR_MODE)
150                                 csr = MUSB_TXCSR_CLRDATATOG;
151                         else
152                                 csr = 0;
153                         writew(csr, &musbr->txcsr);
154                 } else {
155                         csr |= MUSB_TXCSR_H_WR_DATATOGGLE;
156                         writew(csr, &musbr->txcsr);
157                         csr |= (toggle << MUSB_TXCSR_H_DATATOGGLE_SHIFT);
158                         writew(csr, &musbr->txcsr);
159                 }
160         } else {
161                 if (!toggle) {
162                         csr = readw(&musbr->txcsr);
163                         if (csr & MUSB_TXCSR_MODE)
164                                 csr = MUSB_RXCSR_CLRDATATOG;
165                         else
166                                 csr = 0;
167                         writew(csr, &musbr->rxcsr);
168                 } else {
169                         csr = readw(&musbr->rxcsr);
170                         csr |= MUSB_RXCSR_H_WR_DATATOGGLE;
171                         writew(csr, &musbr->rxcsr);
172                         csr |= (toggle << MUSB_S_RXCSR_H_DATATOGGLE);
173                         writew(csr, &musbr->rxcsr);
174                 }
175         }
176 }
177
178 /*
179  * This function checks if RxStall has occured on the endpoint. If a RxStall
180  * has occured, the RxStall is cleared and 1 is returned. If RxStall has
181  * not occured, 0 is returned.
182  */
183 static u8 check_stall(u8 ep, u8 dir_out)
184 {
185         u16 csr;
186
187         /* For endpoint 0 */
188         if (!ep) {
189                 csr = readw(&musbr->txcsr);
190                 if (csr & MUSB_CSR0_H_RXSTALL) {
191                         csr &= ~MUSB_CSR0_H_RXSTALL;
192                         writew(csr, &musbr->txcsr);
193                         return 1;
194                 }
195         } else { /* For non-ep0 */
196                 if (dir_out) { /* is it tx ep */
197                         csr = readw(&musbr->txcsr);
198                         if (csr & MUSB_TXCSR_H_RXSTALL) {
199                                 csr &= ~MUSB_TXCSR_H_RXSTALL;
200                                 writew(csr, &musbr->txcsr);
201                                 return 1;
202                         }
203                 } else { /* is it rx ep */
204                         csr = readw(&musbr->rxcsr);
205                         if (csr & MUSB_RXCSR_H_RXSTALL) {
206                                 csr &= ~MUSB_RXCSR_H_RXSTALL;
207                                 writew(csr, &musbr->rxcsr);
208                                 return 1;
209                         }
210                 }
211         }
212         return 0;
213 }
214
215 /*
216  * waits until ep0 is ready. Returns 0 if ep is ready, -1 for timeout
217  * error and -2 for stall.
218  */
219 static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)
220 {
221         u16 csr;
222         int result = 1;
223         int timeout = CONFIG_MUSB_TIMEOUT;
224
225         while (result > 0) {
226                 csr = readw(&musbr->txcsr);
227                 if (csr & MUSB_CSR0_H_ERROR) {
228                         csr &= ~MUSB_CSR0_H_ERROR;
229                         writew(csr, &musbr->txcsr);
230                         dev->status = USB_ST_CRC_ERR;
231                         result = -1;
232                         break;
233                 }
234
235                 switch (bit_mask) {
236                 case MUSB_CSR0_TXPKTRDY:
237                         if (!(csr & MUSB_CSR0_TXPKTRDY)) {
238                                 if (check_stall(MUSB_CONTROL_EP, 0)) {
239                                         dev->status = USB_ST_STALLED;
240                                         result = -2;
241                                 } else
242                                         result = 0;
243                         }
244                         break;
245
246                 case MUSB_CSR0_RXPKTRDY:
247                         if (check_stall(MUSB_CONTROL_EP, 0)) {
248                                 dev->status = USB_ST_STALLED;
249                                 result = -2;
250                         } else
251                                 if (csr & MUSB_CSR0_RXPKTRDY)
252                                         result = 0;
253                         break;
254
255                 case MUSB_CSR0_H_REQPKT:
256                         if (!(csr & MUSB_CSR0_H_REQPKT)) {
257                                 if (check_stall(MUSB_CONTROL_EP, 0)) {
258                                         dev->status = USB_ST_STALLED;
259                                         result = -2;
260                                 } else
261                                         result = 0;
262                         }
263                         break;
264                 }
265
266                 /* Check the timeout */
267                 if (--timeout)
268                         udelay(1);
269                 else {
270                         dev->status = USB_ST_CRC_ERR;
271                         result = -1;
272                         break;
273                 }
274         }
275
276         return result;
277 }
278
279 /*
280  * waits until tx ep is ready. Returns 1 when ep is ready and 0 on error.
281  */
282 static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep)
283 {
284         u16 csr;
285         int timeout = CONFIG_MUSB_TIMEOUT;
286
287         do {
288                 if (check_stall(ep, 1)) {
289                         dev->status = USB_ST_STALLED;
290                         return 0;
291                 }
292
293                 csr = readw(&musbr->txcsr);
294                 if (csr & MUSB_TXCSR_H_ERROR) {
295                         dev->status = USB_ST_CRC_ERR;
296                         return 0;
297                 }
298
299                 /* Check the timeout */
300                 if (--timeout)
301                         udelay(1);
302                 else {
303                         dev->status = USB_ST_CRC_ERR;
304                         return -1;
305                 }
306
307         } while (csr & MUSB_TXCSR_TXPKTRDY);
308         return 1;
309 }
310
311 /*
312  * waits until rx ep is ready. Returns 1 when ep is ready and 0 on error.
313  */
314 static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep)
315 {
316         u16 csr;
317         int timeout = CONFIG_MUSB_TIMEOUT;
318
319         do {
320                 if (check_stall(ep, 0)) {
321                         dev->status = USB_ST_STALLED;
322                         return 0;
323                 }
324
325                 csr = readw(&musbr->rxcsr);
326                 if (csr & MUSB_RXCSR_H_ERROR) {
327                         dev->status = USB_ST_CRC_ERR;
328                         return 0;
329                 }
330
331                 /* Check the timeout */
332                 if (--timeout)
333                         udelay(1);
334                 else {
335                         dev->status = USB_ST_CRC_ERR;
336                         return -1;
337                 }
338
339         } while (!(csr & MUSB_RXCSR_RXPKTRDY));
340         return 1;
341 }
342
343 /*
344  * This function performs the setup phase of the control transfer
345  */
346 static int ctrlreq_setup_phase(struct usb_device *dev, struct devrequest *setup)
347 {
348         int result;
349         u16 csr;
350
351         /* write the control request to ep0 fifo */
352         write_fifo(MUSB_CONTROL_EP, sizeof(struct devrequest), (void *)setup);
353
354         /* enable transfer of setup packet */
355         csr = readw(&musbr->txcsr);
356         csr |= (MUSB_CSR0_TXPKTRDY|MUSB_CSR0_H_SETUPPKT);
357         writew(csr, &musbr->txcsr);
358
359         /* wait until the setup packet is transmitted */
360         result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
361         dev->act_len = 0;
362         return result;
363 }
364
365 /*
366  * This function handles the control transfer in data phase
367  */
368 static int ctrlreq_in_data_phase(struct usb_device *dev, u32 len, void *buffer)
369 {
370         u16 csr;
371         u32 rxlen = 0;
372         u32 nextlen = 0;
373         u8  maxpktsize = (1 << dev->maxpacketsize) * 8;
374         u8  *rxbuff = (u8 *)buffer;
375         u8  rxedlength;
376         int result;
377
378         while (rxlen < len) {
379                 /* Determine the next read length */
380                 nextlen = ((len-rxlen) > maxpktsize) ? maxpktsize : (len-rxlen);
381
382                 /* Set the ReqPkt bit */
383                 csr = readw(&musbr->txcsr);
384                 writew(csr | MUSB_CSR0_H_REQPKT, &musbr->txcsr);
385                 result = wait_until_ep0_ready(dev, MUSB_CSR0_RXPKTRDY);
386                 if (result < 0)
387                         return result;
388
389                 /* Actual number of bytes received by usb */
390                 rxedlength = readb(&musbr->rxcount);
391
392                 /* Read the data from the RxFIFO */
393                 read_fifo(MUSB_CONTROL_EP, rxedlength, &rxbuff[rxlen]);
394
395                 /* Clear the RxPktRdy Bit */
396                 csr = readw(&musbr->txcsr);
397                 csr &= ~MUSB_CSR0_RXPKTRDY;
398                 writew(csr, &musbr->txcsr);
399
400                 /* short packet? */
401                 if (rxedlength != nextlen) {
402                         dev->act_len += rxedlength;
403                         break;
404                 }
405                 rxlen += nextlen;
406                 dev->act_len = rxlen;
407         }
408         return 0;
409 }
410
411 /*
412  * This function handles the control transfer out data phase
413  */
414 static int ctrlreq_out_data_phase(struct usb_device *dev, u32 len, void *buffer)
415 {
416         u16 csr;
417         u32 txlen = 0;
418         u32 nextlen = 0;
419         u8  maxpktsize = (1 << dev->maxpacketsize) * 8;
420         u8  *txbuff = (u8 *)buffer;
421         int result = 0;
422
423         while (txlen < len) {
424                 /* Determine the next write length */
425                 nextlen = ((len-txlen) > maxpktsize) ? maxpktsize : (len-txlen);
426
427                 /* Load the data to send in FIFO */
428                 write_fifo(MUSB_CONTROL_EP, txlen, &txbuff[txlen]);
429
430                 /* Set TXPKTRDY bit */
431                 csr = readw(&musbr->txcsr);
432                 writew(csr | MUSB_CSR0_H_DIS_PING | MUSB_CSR0_TXPKTRDY,
433                                         &musbr->txcsr);
434                 result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
435                 if (result < 0)
436                         break;
437
438                 txlen += nextlen;
439                 dev->act_len = txlen;
440         }
441         return result;
442 }
443
444 /*
445  * This function handles the control transfer out status phase
446  */
447 static int ctrlreq_out_status_phase(struct usb_device *dev)
448 {
449         u16 csr;
450         int result;
451
452         /* Set the StatusPkt bit */
453         csr = readw(&musbr->txcsr);
454         csr |= (MUSB_CSR0_H_DIS_PING | MUSB_CSR0_TXPKTRDY |
455                         MUSB_CSR0_H_STATUSPKT);
456         writew(csr, &musbr->txcsr);
457
458         /* Wait until TXPKTRDY bit is cleared */
459         result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
460         return result;
461 }
462
463 /*
464  * This function handles the control transfer in status phase
465  */
466 static int ctrlreq_in_status_phase(struct usb_device *dev)
467 {
468         u16 csr;
469         int result;
470
471         /* Set the StatusPkt bit and ReqPkt bit */
472         csr = MUSB_CSR0_H_DIS_PING | MUSB_CSR0_H_REQPKT | MUSB_CSR0_H_STATUSPKT;
473         writew(csr, &musbr->txcsr);
474         result = wait_until_ep0_ready(dev, MUSB_CSR0_H_REQPKT);
475
476         /* clear StatusPkt bit and RxPktRdy bit */
477         csr = readw(&musbr->txcsr);
478         csr &= ~(MUSB_CSR0_RXPKTRDY | MUSB_CSR0_H_STATUSPKT);
479         writew(csr, &musbr->txcsr);
480         return result;
481 }
482
483 /*
484  * determines the speed of the device (High/Full/Slow)
485  */
486 static u8 get_dev_speed(struct usb_device *dev)
487 {
488         return (dev->speed & USB_SPEED_HIGH) ? MUSB_TYPE_SPEED_HIGH :
489                 ((dev->speed & USB_SPEED_LOW) ? MUSB_TYPE_SPEED_LOW :
490                                                 MUSB_TYPE_SPEED_FULL);
491 }
492
493 /*
494  * configure the hub address and the port address.
495  */
496 static void config_hub_port(struct usb_device *dev, u8 ep)
497 {
498         u8 chid;
499         u8 hub;
500
501         /* Find out the nearest parent which is high speed */
502         while (dev->parent->parent != NULL)
503                 if (get_dev_speed(dev->parent) !=  MUSB_TYPE_SPEED_HIGH)
504                         dev = dev->parent;
505                 else
506                         break;
507
508         /* determine the port address at that hub */
509         hub = dev->parent->devnum;
510         for (chid = 0; chid < USB_MAXCHILDREN; chid++)
511                 if (dev->parent->children[chid] == dev)
512                         break;
513
514 #ifndef MUSB_NO_MULTIPOINT
515         /* configure the hub address and the port address */
516         writeb(hub, &musbr->tar[ep].txhubaddr);
517         writeb((chid + 1), &musbr->tar[ep].txhubport);
518         writeb(hub, &musbr->tar[ep].rxhubaddr);
519         writeb((chid + 1), &musbr->tar[ep].rxhubport);
520 #endif
521 }
522
523 #ifdef MUSB_NO_MULTIPOINT
524
525 static void musb_port_reset(int do_reset)
526 {
527         u8 power = readb(&musbr->power);
528
529         if (do_reset) {
530                 power &= 0xf0;
531                 writeb(power | MUSB_POWER_RESET, &musbr->power);
532                 port_status |= USB_PORT_STAT_RESET;
533                 port_status &= ~USB_PORT_STAT_ENABLE;
534                 udelay(30000);
535         } else {
536                 writeb(power & ~MUSB_POWER_RESET, &musbr->power);
537
538                 power = readb(&musbr->power);
539                 if (power & MUSB_POWER_HSMODE)
540                         port_status |= USB_PORT_STAT_HIGH_SPEED;
541
542                 port_status &= ~(USB_PORT_STAT_RESET | (USB_PORT_STAT_C_CONNECTION << 16));
543                 port_status |= USB_PORT_STAT_ENABLE
544                         | (USB_PORT_STAT_C_RESET << 16)
545                         | (USB_PORT_STAT_C_ENABLE << 16);
546         }
547 }
548
549 /*
550  * root hub control
551  */
552 static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
553                               void *buffer, int transfer_len,
554                               struct devrequest *cmd)
555 {
556         int leni = transfer_len;
557         int len = 0;
558         int stat = 0;
559         u32 datab[4];
560         u8 *data_buf = (u8 *) datab;
561         u16 bmRType_bReq;
562         u16 wValue;
563         u16 wIndex;
564         u16 wLength;
565         u16 int_usb;
566
567         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
568                 debug("Root-Hub submit IRQ: NOT implemented\n");
569                 return 0;
570         }
571
572         bmRType_bReq = cmd->requesttype | (cmd->request << 8);
573         wValue = swap_16(cmd->value);
574         wIndex = swap_16(cmd->index);
575         wLength = swap_16(cmd->length);
576
577         debug("--- HUB ----------------------------------------\n");
578         debug("submit rh urb, req=%x val=%#x index=%#x len=%d\n",
579             bmRType_bReq, wValue, wIndex, wLength);
580         debug("------------------------------------------------\n");
581
582         switch (bmRType_bReq) {
583         case RH_GET_STATUS:
584                 debug("RH_GET_STATUS\n");
585
586                 *(__u16 *) data_buf = swap_16(1);
587                 len = 2;
588                 break;
589
590         case RH_GET_STATUS | RH_INTERFACE:
591                 debug("RH_GET_STATUS | RH_INTERFACE\n");
592
593                 *(__u16 *) data_buf = swap_16(0);
594                 len = 2;
595                 break;
596
597         case RH_GET_STATUS | RH_ENDPOINT:
598                 debug("RH_GET_STATUS | RH_ENDPOINT\n");
599
600                 *(__u16 *) data_buf = swap_16(0);
601                 len = 2;
602                 break;
603
604         case RH_GET_STATUS | RH_CLASS:
605                 debug("RH_GET_STATUS | RH_CLASS\n");
606
607                 *(__u32 *) data_buf = swap_32(0);
608                 len = 4;
609                 break;
610
611         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
612                 debug("RH_GET_STATUS | RH_OTHER | RH_CLASS\n");
613
614                 int_usb = readw(&musbr->intrusb);
615                 if (int_usb & MUSB_INTR_CONNECT) {
616                         port_status |= USB_PORT_STAT_CONNECTION
617                                 | (USB_PORT_STAT_C_CONNECTION << 16);
618                         port_status |= USB_PORT_STAT_HIGH_SPEED
619                                 | USB_PORT_STAT_ENABLE;
620                 }
621
622                 if (port_status & USB_PORT_STAT_RESET)
623                         musb_port_reset(0);
624
625                 *(__u32 *) data_buf = swap_32(port_status);
626                 len = 4;
627                 break;
628
629         case RH_CLEAR_FEATURE | RH_ENDPOINT:
630                 debug("RH_CLEAR_FEATURE | RH_ENDPOINT\n");
631
632                 switch (wValue) {
633                 case RH_ENDPOINT_STALL:
634                         debug("C_HUB_ENDPOINT_STALL\n");
635                         len = 0;
636                         break;
637                 }
638                 port_status &= ~(1 << wValue);
639                 break;
640
641         case RH_CLEAR_FEATURE | RH_CLASS:
642                 debug("RH_CLEAR_FEATURE | RH_CLASS\n");
643
644                 switch (wValue) {
645                 case RH_C_HUB_LOCAL_POWER:
646                         debug("C_HUB_LOCAL_POWER\n");
647                         len = 0;
648                         break;
649
650                 case RH_C_HUB_OVER_CURRENT:
651                         debug("C_HUB_OVER_CURRENT\n");
652                         len = 0;
653                         break;
654                 }
655                 port_status &= ~(1 << wValue);
656                 break;
657
658         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
659                 debug("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS\n");
660
661                 switch (wValue) {
662                 case RH_PORT_ENABLE:
663                         len = 0;
664                         break;
665
666                 case RH_PORT_SUSPEND:
667                         len = 0;
668                         break;
669
670                 case RH_PORT_POWER:
671                         len = 0;
672                         break;
673
674                 case RH_C_PORT_CONNECTION:
675                         len = 0;
676                         break;
677
678                 case RH_C_PORT_ENABLE:
679                         len = 0;
680                         break;
681
682                 case RH_C_PORT_SUSPEND:
683                         len = 0;
684                         break;
685
686                 case RH_C_PORT_OVER_CURRENT:
687                         len = 0;
688                         break;
689
690                 case RH_C_PORT_RESET:
691                         len = 0;
692                         break;
693
694                 default:
695                         debug("invalid wValue\n");
696                         stat = USB_ST_STALLED;
697                 }
698
699                 port_status &= ~(1 << wValue);
700                 break;
701
702         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
703                 debug("RH_SET_FEATURE | RH_OTHER | RH_CLASS\n");
704
705                 switch (wValue) {
706                 case RH_PORT_SUSPEND:
707                         len = 0;
708                         break;
709
710                 case RH_PORT_RESET:
711                         musb_port_reset(1);
712                         len = 0;
713                         break;
714
715                 case RH_PORT_POWER:
716                         len = 0;
717                         break;
718
719                 case RH_PORT_ENABLE:
720                         len = 0;
721                         break;
722
723                 default:
724                         debug("invalid wValue\n");
725                         stat = USB_ST_STALLED;
726                 }
727
728                 port_status |= 1 << wValue;
729                 break;
730
731         case RH_SET_ADDRESS:
732                 debug("RH_SET_ADDRESS\n");
733
734                 rh_devnum = wValue;
735                 len = 0;
736                 break;
737
738         case RH_GET_DESCRIPTOR:
739                 debug("RH_GET_DESCRIPTOR: %x, %d\n", wValue, wLength);
740
741                 switch (wValue) {
742                 case (USB_DT_DEVICE << 8):      /* device descriptor */
743                         len = min_t(unsigned int,
744                                     leni, min_t(unsigned int,
745                                                 sizeof(root_hub_dev_des),
746                                                 wLength));
747                         data_buf = root_hub_dev_des;
748                         break;
749
750                 case (USB_DT_CONFIG << 8):      /* configuration descriptor */
751                         len = min_t(unsigned int,
752                                     leni, min_t(unsigned int,
753                                                 sizeof(root_hub_config_des),
754                                                 wLength));
755                         data_buf = root_hub_config_des;
756                         break;
757
758                 case ((USB_DT_STRING << 8) | 0x00):     /* string 0 descriptors */
759                         len = min_t(unsigned int,
760                                     leni, min_t(unsigned int,
761                                                 sizeof(root_hub_str_index0),
762                                                 wLength));
763                         data_buf = root_hub_str_index0;
764                         break;
765
766                 case ((USB_DT_STRING << 8) | 0x01):     /* string 1 descriptors */
767                         len = min_t(unsigned int,
768                                     leni, min_t(unsigned int,
769                                                 sizeof(root_hub_str_index1),
770                                                 wLength));
771                         data_buf = root_hub_str_index1;
772                         break;
773
774                 default:
775                         debug("invalid wValue\n");
776                         stat = USB_ST_STALLED;
777                 }
778
779                 break;
780
781         case RH_GET_DESCRIPTOR | RH_CLASS:
782                 debug("RH_GET_DESCRIPTOR | RH_CLASS\n");
783
784                 data_buf[0] = 0x09;     /* min length; */
785                 data_buf[1] = 0x29;
786                 data_buf[2] = 0x1;      /* 1 port */
787                 data_buf[3] = 0x01;     /* per-port power switching */
788                 data_buf[3] |= 0x10;    /* no overcurrent reporting */
789
790                 /* Corresponds to data_buf[4-7] */
791                 data_buf[4] = 0;
792                 data_buf[5] = 5;
793                 data_buf[6] = 0;
794                 data_buf[7] = 0x02;
795                 data_buf[8] = 0xff;
796
797                 len = min_t(unsigned int, leni,
798                             min_t(unsigned int, data_buf[0], wLength));
799                 break;
800
801         case RH_GET_CONFIGURATION:
802                 debug("RH_GET_CONFIGURATION\n");
803
804                 *(__u8 *) data_buf = 0x01;
805                 len = 1;
806                 break;
807
808         case RH_SET_CONFIGURATION:
809                 debug("RH_SET_CONFIGURATION\n");
810
811                 len = 0;
812                 break;
813
814         default:
815                 debug("*** *** *** unsupported root hub command *** *** ***\n");
816                 stat = USB_ST_STALLED;
817         }
818
819         len = min_t(int, len, leni);
820         if (buffer != data_buf)
821                 memcpy(buffer, data_buf, len);
822
823         dev->act_len = len;
824         dev->status = stat;
825         debug("dev act_len %d, status %d\n", dev->act_len, dev->status);
826
827         return stat;
828 }
829
830 static void musb_rh_init(void)
831 {
832         rh_devnum = 0;
833         port_status = 0;
834 }
835
836 #else
837
838 static void musb_rh_init(void) {}
839
840 #endif
841
842 /*
843  * do a control transfer
844  */
845 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
846                         int len, struct devrequest *setup)
847 {
848         int devnum = usb_pipedevice(pipe);
849         u16 csr;
850         u8  devspeed;
851
852 #ifdef MUSB_NO_MULTIPOINT
853         /* Control message is for the HUB? */
854         if (devnum == rh_devnum)
855                 return musb_submit_rh_msg(dev, pipe, buffer, len, setup);
856 #endif
857
858         /* select control endpoint */
859         writeb(MUSB_CONTROL_EP, &musbr->index);
860         csr = readw(&musbr->txcsr);
861
862 #ifndef MUSB_NO_MULTIPOINT
863         /* target addr and (for multipoint) hub addr/port */
864         writeb(devnum, &musbr->tar[MUSB_CONTROL_EP].txfuncaddr);
865         writeb(devnum, &musbr->tar[MUSB_CONTROL_EP].rxfuncaddr);
866 #endif
867
868         /* configure the hub address and the port number as required */
869         devspeed = get_dev_speed(dev);
870         if ((musb_ishighspeed()) && (dev->parent != NULL) &&
871                 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
872                 config_hub_port(dev, MUSB_CONTROL_EP);
873                 writeb(devspeed << 6, &musbr->txtype);
874         } else {
875                 writeb(musb_cfg.musb_speed << 6, &musbr->txtype);
876 #ifndef MUSB_NO_MULTIPOINT
877                 writeb(0, &musbr->tar[MUSB_CONTROL_EP].txhubaddr);
878                 writeb(0, &musbr->tar[MUSB_CONTROL_EP].txhubport);
879                 writeb(0, &musbr->tar[MUSB_CONTROL_EP].rxhubaddr);
880                 writeb(0, &musbr->tar[MUSB_CONTROL_EP].rxhubport);
881 #endif
882         }
883
884         /* Control transfer setup phase */
885         if (ctrlreq_setup_phase(dev, setup) < 0)
886                 return 0;
887
888         switch (setup->request) {
889         case USB_REQ_GET_DESCRIPTOR:
890         case USB_REQ_GET_CONFIGURATION:
891         case USB_REQ_GET_INTERFACE:
892         case USB_REQ_GET_STATUS:
893         case USB_MSC_BBB_GET_MAX_LUN:
894                 /* control transfer in-data-phase */
895                 if (ctrlreq_in_data_phase(dev, len, buffer) < 0)
896                         return 0;
897                 /* control transfer out-status-phase */
898                 if (ctrlreq_out_status_phase(dev) < 0)
899                         return 0;
900                 break;
901
902         case USB_REQ_SET_ADDRESS:
903         case USB_REQ_SET_CONFIGURATION:
904         case USB_REQ_SET_FEATURE:
905         case USB_REQ_SET_INTERFACE:
906         case USB_REQ_CLEAR_FEATURE:
907         case USB_MSC_BBB_RESET:
908                 /* control transfer in status phase */
909                 if (ctrlreq_in_status_phase(dev) < 0)
910                         return 0;
911                 break;
912
913         case USB_REQ_SET_DESCRIPTOR:
914                 /* control transfer out data phase */
915                 if (ctrlreq_out_data_phase(dev, len, buffer) < 0)
916                         return 0;
917                 /* control transfer in status phase */
918                 if (ctrlreq_in_status_phase(dev) < 0)
919                         return 0;
920                 break;
921
922         default:
923                 /* unhandled control transfer */
924                 return -1;
925         }
926
927         dev->status = 0;
928         dev->act_len = len;
929
930 #ifdef MUSB_NO_MULTIPOINT
931         /* Set device address to USB_FADDR register */
932         if (setup->request == USB_REQ_SET_ADDRESS)
933                 writeb(dev->devnum, &musbr->faddr);
934 #endif
935
936         return len;
937 }
938
939 /*
940  * do a bulk transfer
941  */
942 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
943                                         void *buffer, int len)
944 {
945         int dir_out = usb_pipeout(pipe);
946         int ep = usb_pipeendpoint(pipe);
947 #ifndef MUSB_NO_MULTIPOINT
948         int devnum = usb_pipedevice(pipe);
949 #endif
950         u8  type;
951         u16 csr;
952         u32 txlen = 0;
953         u32 nextlen = 0;
954         u8  devspeed;
955
956         /* select bulk endpoint */
957         writeb(MUSB_BULK_EP, &musbr->index);
958
959 #ifndef MUSB_NO_MULTIPOINT
960         /* write the address of the device */
961         if (dir_out)
962                 writeb(devnum, &musbr->tar[MUSB_BULK_EP].txfuncaddr);
963         else
964                 writeb(devnum, &musbr->tar[MUSB_BULK_EP].rxfuncaddr);
965 #endif
966
967         /* configure the hub address and the port number as required */
968         devspeed = get_dev_speed(dev);
969         if ((musb_ishighspeed()) && (dev->parent != NULL) &&
970                 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
971                 /*
972                  * MUSB is in high speed and the destination device is full
973                  * speed device. So configure the hub address and port
974                  * address registers.
975                  */
976                 config_hub_port(dev, MUSB_BULK_EP);
977         } else {
978 #ifndef MUSB_NO_MULTIPOINT
979                 if (dir_out) {
980                         writeb(0, &musbr->tar[MUSB_BULK_EP].txhubaddr);
981                         writeb(0, &musbr->tar[MUSB_BULK_EP].txhubport);
982                 } else {
983                         writeb(0, &musbr->tar[MUSB_BULK_EP].rxhubaddr);
984                         writeb(0, &musbr->tar[MUSB_BULK_EP].rxhubport);
985                 }
986 #endif
987                 devspeed = musb_cfg.musb_speed;
988         }
989
990         /* Write the saved toggle bit value */
991         write_toggle(dev, ep, dir_out);
992
993         if (dir_out) { /* bulk-out transfer */
994                 /* Program the TxType register */
995                 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
996                            (MUSB_TYPE_PROTO_BULK << MUSB_TYPE_PROTO_SHIFT) |
997                            (ep & MUSB_TYPE_REMOTE_END);
998                 writeb(type, &musbr->txtype);
999
1000                 /* Write maximum packet size to the TxMaxp register */
1001                 writew(dev->epmaxpacketout[ep], &musbr->txmaxp);
1002                 while (txlen < len) {
1003                         nextlen = ((len-txlen) < dev->epmaxpacketout[ep]) ?
1004                                         (len-txlen) : dev->epmaxpacketout[ep];
1005
1006 #ifdef CONFIG_USB_BLACKFIN
1007                         /* Set the transfer data size */
1008                         writew(nextlen, &musbr->txcount);
1009 #endif
1010
1011                         /* Write the data to the FIFO */
1012                         write_fifo(MUSB_BULK_EP, nextlen,
1013                                         (void *)(((u8 *)buffer) + txlen));
1014
1015                         /* Set the TxPktRdy bit */
1016                         csr = readw(&musbr->txcsr);
1017                         writew(csr | MUSB_TXCSR_TXPKTRDY, &musbr->txcsr);
1018
1019                         /* Wait until the TxPktRdy bit is cleared */
1020                         if (!wait_until_txep_ready(dev, MUSB_BULK_EP)) {
1021                                 readw(&musbr->txcsr);
1022                                 usb_settoggle(dev, ep, dir_out,
1023                                 (csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1);
1024                                 dev->act_len = txlen;
1025                                 return 0;
1026                         }
1027                         txlen += nextlen;
1028                 }
1029
1030                 /* Keep a copy of the data toggle bit */
1031                 csr = readw(&musbr->txcsr);
1032                 usb_settoggle(dev, ep, dir_out,
1033                                 (csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1);
1034         } else { /* bulk-in transfer */
1035                 /* Write the saved toggle bit value */
1036                 write_toggle(dev, ep, dir_out);
1037
1038                 /* Program the RxType register */
1039                 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
1040                            (MUSB_TYPE_PROTO_BULK << MUSB_TYPE_PROTO_SHIFT) |
1041                            (ep & MUSB_TYPE_REMOTE_END);
1042                 writeb(type, &musbr->rxtype);
1043
1044                 /* Write the maximum packet size to the RxMaxp register */
1045                 writew(dev->epmaxpacketin[ep], &musbr->rxmaxp);
1046                 while (txlen < len) {
1047                         nextlen = ((len-txlen) < dev->epmaxpacketin[ep]) ?
1048                                         (len-txlen) : dev->epmaxpacketin[ep];
1049
1050                         /* Set the ReqPkt bit */
1051                         csr = readw(&musbr->rxcsr);
1052                         writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);
1053
1054                         /* Wait until the RxPktRdy bit is set */
1055                         if (!wait_until_rxep_ready(dev, MUSB_BULK_EP)) {
1056                                 csr = readw(&musbr->rxcsr);
1057                                 usb_settoggle(dev, ep, dir_out,
1058                                 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1059                                 csr &= ~MUSB_RXCSR_RXPKTRDY;
1060                                 writew(csr, &musbr->rxcsr);
1061                                 dev->act_len = txlen;
1062                                 return 0;
1063                         }
1064
1065                         /* Read the data from the FIFO */
1066                         read_fifo(MUSB_BULK_EP, nextlen,
1067                                         (void *)(((u8 *)buffer) + txlen));
1068
1069                         /* Clear the RxPktRdy bit */
1070                         csr =  readw(&musbr->rxcsr);
1071                         csr &= ~MUSB_RXCSR_RXPKTRDY;
1072                         writew(csr, &musbr->rxcsr);
1073                         txlen += nextlen;
1074                 }
1075
1076                 /* Keep a copy of the data toggle bit */
1077                 csr = readw(&musbr->rxcsr);
1078                 usb_settoggle(dev, ep, dir_out,
1079                                 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1080         }
1081
1082         /* bulk transfer is complete */
1083         dev->status = 0;
1084         dev->act_len = len;
1085         return 0;
1086 }
1087
1088 /*
1089  * This function initializes the usb controller module.
1090  */
1091 int usb_lowlevel_init(void)
1092 {
1093         u8  power;
1094         u32 timeout;
1095
1096         musb_rh_init();
1097
1098         if (musb_platform_init() == -1)
1099                 return -1;
1100
1101         /* Configure all the endpoint FIFO's and start usb controller */
1102         musbr = musb_cfg.regs;
1103         musb_configure_ep(&epinfo[0],
1104                         sizeof(epinfo) / sizeof(struct musb_epinfo));
1105         musb_start();
1106
1107         /*
1108          * Wait until musb is enabled in host mode with a timeout. There
1109          * should be a usb device connected.
1110          */
1111         timeout = musb_cfg.timeout;
1112         while (timeout--)
1113                 if (readb(&musbr->devctl) & MUSB_DEVCTL_HM)
1114                         break;
1115
1116         /* if musb core is not in host mode, then return */
1117         if (!timeout)
1118                 return -1;
1119
1120         /* start usb bus reset */
1121         power = readb(&musbr->power);
1122         writeb(power | MUSB_POWER_RESET, &musbr->power);
1123
1124         /* After initiating a usb reset, wait for about 20ms to 30ms */
1125         udelay(30000);
1126
1127         /* stop usb bus reset */
1128         power = readb(&musbr->power);
1129         power &= ~MUSB_POWER_RESET;
1130         writeb(power, &musbr->power);
1131
1132         /* Determine if the connected device is a high/full/low speed device */
1133         musb_cfg.musb_speed = (readb(&musbr->power) & MUSB_POWER_HSMODE) ?
1134                         MUSB_TYPE_SPEED_HIGH :
1135                         ((readb(&musbr->devctl) & MUSB_DEVCTL_FSDEV) ?
1136                         MUSB_TYPE_SPEED_FULL : MUSB_TYPE_SPEED_LOW);
1137         return 0;
1138 }
1139
1140 /*
1141  * This function stops the operation of the davinci usb module.
1142  */
1143 int usb_lowlevel_stop(void)
1144 {
1145         /* Reset the USB module */
1146         musb_platform_deinit();
1147         writeb(0, &musbr->devctl);
1148         return 0;
1149 }
1150
1151 /*
1152  * This function supports usb interrupt transfers. Currently, usb interrupt
1153  * transfers are not supported.
1154  */
1155 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1156                                 void *buffer, int len, int interval)
1157 {
1158         int dir_out = usb_pipeout(pipe);
1159         int ep = usb_pipeendpoint(pipe);
1160 #ifndef MUSB_NO_MULTIPOINT
1161         int devnum = usb_pipedevice(pipe);
1162 #endif
1163         u8  type;
1164         u16 csr;
1165         u32 txlen = 0;
1166         u32 nextlen = 0;
1167         u8  devspeed;
1168
1169         /* select interrupt endpoint */
1170         writeb(MUSB_INTR_EP, &musbr->index);
1171
1172 #ifndef MUSB_NO_MULTIPOINT
1173         /* write the address of the device */
1174         if (dir_out)
1175                 writeb(devnum, &musbr->tar[MUSB_INTR_EP].txfuncaddr);
1176         else
1177                 writeb(devnum, &musbr->tar[MUSB_INTR_EP].rxfuncaddr);
1178 #endif
1179
1180         /* configure the hub address and the port number as required */
1181         devspeed = get_dev_speed(dev);
1182         if ((musb_ishighspeed()) && (dev->parent != NULL) &&
1183                 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
1184                 /*
1185                  * MUSB is in high speed and the destination device is full
1186                  * speed device. So configure the hub address and port
1187                  * address registers.
1188                  */
1189                 config_hub_port(dev, MUSB_INTR_EP);
1190         } else {
1191 #ifndef MUSB_NO_MULTIPOINT
1192                 if (dir_out) {
1193                         writeb(0, &musbr->tar[MUSB_INTR_EP].txhubaddr);
1194                         writeb(0, &musbr->tar[MUSB_INTR_EP].txhubport);
1195                 } else {
1196                         writeb(0, &musbr->tar[MUSB_INTR_EP].rxhubaddr);
1197                         writeb(0, &musbr->tar[MUSB_INTR_EP].rxhubport);
1198                 }
1199 #endif
1200                 devspeed = musb_cfg.musb_speed;
1201         }
1202
1203         /* Write the saved toggle bit value */
1204         write_toggle(dev, ep, dir_out);
1205
1206         if (!dir_out) { /* intrrupt-in transfer */
1207                 /* Write the saved toggle bit value */
1208                 write_toggle(dev, ep, dir_out);
1209                 writeb(interval, &musbr->rxinterval);
1210
1211                 /* Program the RxType register */
1212                 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
1213                            (MUSB_TYPE_PROTO_INTR << MUSB_TYPE_PROTO_SHIFT) |
1214                            (ep & MUSB_TYPE_REMOTE_END);
1215                 writeb(type, &musbr->rxtype);
1216
1217                 /* Write the maximum packet size to the RxMaxp register */
1218                 writew(dev->epmaxpacketin[ep], &musbr->rxmaxp);
1219
1220                 while (txlen < len) {
1221                         nextlen = ((len-txlen) < dev->epmaxpacketin[ep]) ?
1222                                         (len-txlen) : dev->epmaxpacketin[ep];
1223
1224                         /* Set the ReqPkt bit */
1225                         csr = readw(&musbr->rxcsr);
1226                         writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);
1227
1228                         /* Wait until the RxPktRdy bit is set */
1229                         if (!wait_until_rxep_ready(dev, MUSB_INTR_EP)) {
1230                                 csr = readw(&musbr->rxcsr);
1231                                 usb_settoggle(dev, ep, dir_out,
1232                                 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1233                                 csr &= ~MUSB_RXCSR_RXPKTRDY;
1234                                 writew(csr, &musbr->rxcsr);
1235                                 dev->act_len = txlen;
1236                                 return 0;
1237                         }
1238
1239                         /* Read the data from the FIFO */
1240                         read_fifo(MUSB_INTR_EP, nextlen,
1241                                         (void *)(((u8 *)buffer) + txlen));
1242
1243                         /* Clear the RxPktRdy bit */
1244                         csr =  readw(&musbr->rxcsr);
1245                         csr &= ~MUSB_RXCSR_RXPKTRDY;
1246                         writew(csr, &musbr->rxcsr);
1247                         txlen += nextlen;
1248                 }
1249
1250                 /* Keep a copy of the data toggle bit */
1251                 csr = readw(&musbr->rxcsr);
1252                 usb_settoggle(dev, ep, dir_out,
1253                                 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1254         }
1255
1256         /* interrupt transfer is complete */
1257         dev->irq_status = 0;
1258         dev->irq_act_len = len;
1259         dev->irq_handle(dev);
1260         dev->status = 0;
1261         dev->act_len = len;
1262         return 0;
1263 }
1264
1265
1266 #ifdef CONFIG_SYS_USB_EVENT_POLL
1267 /*
1268  * This function polls for USB keyboard data.
1269  */
1270 void usb_event_poll()
1271 {
1272         struct stdio_dev *dev;
1273         struct usb_device *usb_kbd_dev;
1274         struct usb_interface *iface;
1275         struct usb_endpoint_descriptor *ep;
1276         int pipe;
1277         int maxp;
1278
1279         /* Get the pointer to USB Keyboard device pointer */
1280         dev = stdio_get_by_name("usbkbd");
1281         usb_kbd_dev = (struct usb_device *)dev->priv;
1282         iface = &usb_kbd_dev->config.if_desc[0];
1283         ep = &iface->ep_desc[0];
1284         pipe = usb_rcvintpipe(usb_kbd_dev, ep->bEndpointAddress);
1285
1286         /* Submit a interrupt transfer request */
1287         maxp = usb_maxpacket(usb_kbd_dev, pipe);
1288         usb_submit_int_msg(usb_kbd_dev, pipe, &new[0],
1289                         maxp > 8 ? 8 : maxp, ep->bInterval);
1290 }
1291 #endif /* CONFIG_SYS_USB_EVENT_POLL */