include/configs/actux1.h

   1 /*
   2  * (C) Copyright 2007
   3  * Michael Schwingen, michael@schwingen.org
   4  *
   5  * Configuration settings for the AcTux-1 board.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #define CONFIG_IXP425                   1
  14 #define CONFIG_ACTUX1                   1
  15
  16 #define CONFIG_MACH_TYPE                1479
  17
  18 #define CONFIG_DISPLAY_CPUINFO          1
  19 #define CONFIG_DISPLAY_BOARDINFO        1
  20
  21 #define CONFIG_IXP_SERIAL
  22 #define CONFIG_SYS_IXP425_CONSOLE               IXP425_UART2
  23 #define CONFIG_BAUDRATE                 115200
  24 #define CONFIG_BOOTDELAY                3
  25 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
  26 #define CONFIG_BOARD_EARLY_INIT_F       1
  27 #define CONFIG_SYS_LDSCRIPT     "board/actux1/u-boot.lds"
  28
  29 /***************************************************************
  30  * U-boot generic defines start here.
  31  ***************************************************************/
  32 /*
  33  * Size of malloc() pool
  34  */
  35 #define CONFIG_SYS_MALLOC_LEN                   (CONFIG_ENV_SIZE + 128*1024)
  36
  37 /* allow to overwrite serial and ethaddr */
  38 #define CONFIG_ENV_OVERWRITE
  39
  40 /* Command line configuration. */
  41 #include <config_cmd_default.h>
  42
  43 #define CONFIG_CMD_ELF
  44 #ifdef CONFIG_PCI
  45 #define CONFIG_CMD_PCI
  46 #define CONFIG_PCI_PNP
  47 #define CONFIG_IXP_PCI
  48 #define CONFIG_PCI_SCAN_SHOW
  49 #define CONFIG_CMD_PCI_ENUM
  50 #endif
  51
  52 #define CONFIG_BOOTCOMMAND              "run boot_flash"
  53 /* enable passing of ATAGs */
  54 #define CONFIG_CMDLINE_TAG              1
  55 #define CONFIG_SETUP_MEMORY_TAGS        1
  56 #define CONFIG_INITRD_TAG               1
  57 #define CONFIG_REVISION_TAG             1
  58
  59 #if defined(CONFIG_CMD_KGDB)
  60 # define CONFIG_KGDB_BAUDRATE           230400
  61 #endif
  62
  63 /* Miscellaneous configurable options */
  64 #define CONFIG_SYS_LONGHELP
  65 /* Console I/O Buffer Size */
  66 #define CONFIG_SYS_CBSIZE                       256
  67 /* Print Buffer Size */
  68 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
  69 /* max number of command args */
  70 #define CONFIG_SYS_MAXARGS                      16
  71 /* Boot Argument Buffer Size */
  72 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
  73
  74 #define CONFIG_SYS_MEMTEST_START                0x00400000
  75 #define CONFIG_SYS_MEMTEST_END                  0x00800000
  76
  77 /* timer clock - 2* OSC_IN system clock */
  78 #define CONFIG_IXP425_TIMER_CLK                 66666666
  79
  80 /* default load address */
  81 #define CONFIG_SYS_LOAD_ADDR                    0x00010000
  82
  83 /* valid baudrates */
  84 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, 57600,    \
  85                                           115200, 230400 }
  86 #define CONFIG_SERIAL_RTS_ACTIVE        1
  87
  88 /* Expansion bus settings */
  89 #define CONFIG_SYS_EXP_CS0                      0xbd113842
  90
  91 /* SDRAM settings */
  92 #define CONFIG_NR_DRAM_BANKS            1
  93 #define PHYS_SDRAM_1                    0x00000000
  94 #define CONFIG_SYS_SDRAM_BASE                   0x00000000
  95
  96 #ifdef CONFIG_RAM_32MB
  97 # define CONFIG_SYS_SDR_CONFIG                  0x18
  98 # define PHYS_SDRAM_1_SIZE              0x02000000
  99 # define CONFIG_SYS_SDRAM_REFRESH_CNT           0x81a
 100 # define CONFIG_SYS_SDR_MODE_CONFIG             0x1
 101 # define CONFIG_SYS_DRAM_SIZE                   0x02000000
 102 #else /* 16MB SDRAM */
 103 # define CONFIG_SYS_SDR_CONFIG                  0x3A
 104 # define PHYS_SDRAM_1_SIZE              0x01000000
 105 # define CONFIG_SYS_SDRAM_REFRESH_CNT           0x81a
 106 # define CONFIG_SYS_SDR_MODE_CONFIG             0x1
 107 # define CONFIG_SYS_DRAM_SIZE                   0x01000000
 108 #endif
 109
 110 /* FLASH organization */
 111 #define CONFIG_SYS_TEXT_BASE            0x50000000
 112 #ifdef CONFIG_FLASH2X2
 113 # define CONFIG_SYS_MAX_FLASH_BANKS             2
 114 /* max number of sectors on one chip */
 115 # define CONFIG_SYS_MAX_FLASH_SECT              40
 116 # define PHYS_FLASH_1                   0x50000000
 117 # define PHYS_FLASH_2                   0x50200000
 118 # define CONFIG_SYS_FLASH_BANKS_LIST            { PHYS_FLASH_1, PHYS_FLASH_2 }
 119 #endif
 120 #ifdef CONFIG_FLASH1X8
 121 # define CONFIG_SYS_MAX_FLASH_BANKS             1
 122 /* max number of sectors on one chip */
 123 # define CONFIG_SYS_MAX_FLASH_SECT              140
 124 # define PHYS_FLASH_1                   0x50000000
 125 # define CONFIG_SYS_FLASH_BANKS_LIST            { PHYS_FLASH_1 }
 126 #endif
 127
 128 #define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
 129 #define CONFIG_SYS_MONITOR_BASE         PHYS_FLASH_1
 130 #define CONFIG_SYS_MONITOR_LEN                  (256 << 10)
 131 #define CONFIG_BOARD_SIZE_LIMIT                 262144
 132
 133 /* Use common CFI driver */
 134 #define CONFIG_SYS_FLASH_CFI
 135 #define CONFIG_FLASH_CFI_DRIVER
 136 /* no byte writes on IXP4xx */
 137 #define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_16BIT
 138 /* print 'E' for empty sector on flinfo */
 139 #define CONFIG_SYS_FLASH_EMPTY_INFO
 140
 141 /* Ethernet */
 142
 143 /* include IXP4xx NPE support */
 144 #define CONFIG_IXP4XX_NPE               1
 145 /* NPE0 PHY address */
 146 #define CONFIG_PHY_ADDR                 0
 147 /* NPE1 PHY address (HW Release E only) */
 148 #define CONFIG_PHY1_ADDR                1
 149 /* MII PHY management */
 150 #define CONFIG_MII                      1
 151 /* Number of ethernet rx buffers & descriptors */
 152 #define CONFIG_SYS_RX_ETH_BUFFER                16
 153 #define CONFIG_RESET_PHY_R              1
 154
 155 #define CONFIG_HAS_ETH1                 1
 156
 157 #define CONFIG_CMD_DHCP
 158 #define CONFIG_CMD_NET
 159 #define CONFIG_CMD_MII
 160 #define CONFIG_CMD_PING
 161 #undef  CONFIG_CMD_NFS
 162
 163 /* BOOTP options */
 164 #define CONFIG_BOOTP_BOOTFILESIZE
 165 #define CONFIG_BOOTP_BOOTPATH
 166 #define CONFIG_BOOTP_GATEWAY
 167 #define CONFIG_BOOTP_HOSTNAME
 168
 169 /* Cache Configuration */
 170 #define CONFIG_SYS_CACHELINE_SIZE               32
 171
 172 /*
 173  * environment organization:
 174  * one flash sector, embedded in uboot area (bottom bootblock flash)
 175  */
 176 #define CONFIG_ENV_IS_IN_FLASH          1
 177 #define CONFIG_ENV_SIZE                 0x2000
 178 #define CONFIG_ENV_ADDR                 (PHYS_FLASH_1 + 0x4000)
 179 #define CONFIG_SYS_USE_PPCENV                   1
 180
 181 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 182         "npe_ucode=50040000\0"                                          \
 183         "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
 184         "kerneladdr=50050000\0"                                         \
 185         "kernelfile=actux1/uImage\0"                                    \
 186         "rootfile=actux1/rootfs\0"                                      \
 187         "rootaddr=50170000\0"                                           \
 188         "loadaddr=10000\0"                                              \
 189         "updateboot_ser=mw.b 10000 ff 40000;"                           \
 190         " loady ${loadaddr};"                                           \
 191         " run eraseboot writeboot\0"                                    \
 192         "updateboot_net=mw.b 10000 ff 40000;"                           \
 193         " tftp ${loadaddr} actux1/u-boot.bin;"                          \
 194         " run eraseboot writeboot\0"                                    \
 195         "eraseboot=protect off 50000000 50003fff;"                      \
 196         " protect off 50006000 5003ffff;"                               \
 197         " erase 50000000 50003fff;"                                     \
 198         " erase 50006000 5003ffff\0"                                    \
 199         "writeboot=cp.b 10000 50000000 4000;"                           \
 200         " cp.b 16000 50006000 3a000\0"                                  \
 201         "updateucode=loady;"                                            \
 202         " era ${npe_ucode} +${filesize};"                               \
 203         " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"                  \
 204         "updateroot=tftp ${loadaddr} ${rootfile};"                      \
 205         " era ${rootaddr} +${filesize};"                                \
 206         " cp.b ${loadaddr} ${rootaddr} ${filesize}\0"                   \
 207         "updatekern=tftp ${loadaddr} ${kernelfile};"                    \
 208         " era ${kerneladdr} +${filesize};"                              \
 209         " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"                 \
 210         "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
 211         " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
 212         "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"   \
 213         " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
 214         "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
 215         "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"       \
 216         "boot_flash=run flashargs addtty addeth;"                       \
 217         " bootm ${kerneladdr}\0"                                        \
 218         "boot_net=run netargs addtty addeth;"                           \
 219         " tftpboot ${loadaddr} ${kernelfile};"                          \
 220         " bootm\0"
 221
 222 /* additions for new relocation code, must be added to all boards */
 223 #define CONFIG_SYS_INIT_SP_ADDR                                         \
 224         (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
 225
 226 #endif /* __CONFIG_H */