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1 /*
2  * U-boot - Configuration file for CSP Minotaur board
3  *
4  * Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch>
5  *    Minotaur config, brushed up for official uClinux dist.
6  *    Parallel flash support disabled, SPI flash boot command
7  *    added ('run flashboot').
8  *
9  * Flash image map:
10  *
11  * 0x00000000      u-boot bootstrap
12  * 0x00010000      environment
13  * 0x00020000      u-boot code
14  * 0x00030000      uImage.initramfs
15  *
16  */
17
18 #ifndef __CONFIG_BF537_SRV1_H__
19 #define __CONFIG_BF537_SRV1_H__
20
21 #include <asm/config-pre.h>
22
23
24 /*
25  * Processor Settings
26  */
27 #define CONFIG_BFIN_CPU             bf537-0.2
28 #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_SPI_MASTER
29
30
31 /*
32  * Clock Settings
33  *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
34  *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
35  */
36 /* CONFIG_CLKIN_HZ is any value in Hz                                   */
37 #define CONFIG_CLKIN_HZ                 22118400
38 /* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
39 /*                                                1 = CLKIN / 2         */
40 #define CONFIG_CLKIN_HALF               0
41 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
42 /*                                                1 = bypass PLL        */
43 #define CONFIG_PLL_BYPASS               0
44 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
45 /* Values can range from 0-63 (where 0 means 64)                        */
46 #define CONFIG_VCO_MULT                 20
47 /* CCLK_DIV controls the core clock divider                             */
48 /* Values can be 1, 2, 4, or 8 ONLY                                     */
49 #define CONFIG_CCLK_DIV                 1
50 /* SCLK_DIV controls the system clock divider                           */
51 /* Values can range from 1-15                                           */
52 #define CONFIG_SCLK_DIV                 5
53
54
55 /*
56  * Memory Settings
57  */
58 #define CONFIG_MEM_SIZE                 32
59 #define CONFIG_MEM_ADD_WDTH             9
60
61 #define CONFIG_EBIU_SDRRC_VAL           0x2ac
62 #define CONFIG_EBIU_SDGCTL_VAL          0x91110d
63
64 #define CONFIG_EBIU_AMGCTL_VAL          0xFF
65 #define CONFIG_EBIU_AMBCTL0_VAL         0x7BB07BB0
66 #define CONFIG_EBIU_AMBCTL1_VAL         0xFFC27BB0
67
68 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
69 #define CONFIG_SYS_MALLOC_LEN           (384 << 10)
70
71
72 /*
73  * Network Settings
74  */
75 #ifndef __ADSPBF534__
76 #define CONFIG_BFIN_MAC
77 #define CONFIG_NETCONSOLE       1
78 #endif
79 #ifdef CONFIG_BFIN_MAC
80 #define CONFIG_IPADDR           192.168.0.15
81 #define CONFIG_NETMASK          255.255.255.0
82 #define CONFIG_GATEWAYIP        192.168.0.1
83 #define CONFIG_SERVERIP         192.168.0.2
84 #define CONFIG_HOSTNAME         bf537-srv1
85 #endif
86
87 #define CONFIG_SYS_AUTOLOAD     "no"
88 #define CONFIG_ROOTPATH         "/romfs"
89
90 /*
91  * Flash Settings
92  */
93 /* We don't have a parallel flash chip there */
94 #define CONFIG_SYS_NO_FLASH
95
96
97 /*
98  * SPI Settings
99  */
100 #define CONFIG_BFIN_SPI
101 #define CONFIG_ENV_SPI_MAX_HZ   30000000
102 #define CONFIG_SF_DEFAULT_SPEED 30000000
103 #define CONFIG_SPI_FLASH
104 #define CONFIG_SPI_FLASH_STMICRO
105
106
107 /*
108  * Env Storage Settings
109  */
110 #define CONFIG_ENV_IS_IN_SPI_FLASH
111 #define CONFIG_ENV_OFFSET       0x10000
112 #define CONFIG_ENV_SIZE         0x10000
113 #define CONFIG_ENV_SECT_SIZE    0x10000
114 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
115
116
117 /*
118  * I2C settings
119  */
120 #define CONFIG_SYS_I2C
121 #define CONFIG_SYS_I2C_ADI
122 #define CONFIG_SYS_I2C_SPEED            50000
123 #define CONFIG_SYS_I2C_SLAVE            0
124
125
126 /*
127  * Misc Settings
128  */
129 #define CONFIG_SYS_LONGHELP             1
130 #define CONFIG_CMDLINE_EDITING  1
131 #define CONFIG_ENV_OVERWRITE    1
132
133 #define CONFIG_BAUDRATE         115200
134 #define CONFIG_UART_CONSOLE     0
135 #define CONFIG_BFIN_SERIAL
136
137 #define CONFIG_PANIC_HANG       1
138 #define CONFIG_RTC_BFIN         1
139 #define CONFIG_BOOT_RETRY_TIME  -1
140 #define CONFIG_LOADS_ECHO               1
141
142 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART)
143 # define CONFIG_BOOTDELAY       -1
144 #else
145 # define CONFIG_BOOTDELAY       5
146 #endif
147
148 #include <config_cmd_default.h>
149
150 #ifdef CONFIG_BFIN_MAC
151 # define CONFIG_CMD_DHCP
152 # define CONFIG_CMD_PING
153 #else
154 # undef CONFIG_CMD_NFS
155 #endif
156
157 #define CONFIG_CMD_BOOTLDR
158 #define CONFIG_CMD_CACHE
159 #define CONFIG_CMD_DATE
160 #define CONFIG_CMD_ELF
161 #undef CONFIG_CMD_FLASH
162 #define CONFIG_CMD_I2C
163 #undef CONFIG_CMD_IMLS
164 #define CONFIG_CMD_SF
165
166 #define CONFIG_BOOTCOMMAND      "run flashboot"
167 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw"
168 #define CONFIG_SYS_PROMPT       "srv1> "
169
170 #define BOOT_ENV_SETTINGS \
171         "update=tftpboot $(loadaddr) u-boot.ldr;" \
172                 "sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \
173                 "sf erase 0 0x30000;" \
174                 "sf write $(loadaddr) 0 $(filesize)" \
175         "flashboot=sf read 0x1000000 0x30000 0x320000;" \
176                 "bootm 0x1000000\0"
177 #ifdef CONFIG_BFIN_MAC
178 # define NETWORK_ENV_SETTINGS \
179         "nfsargs=setenv bootargs root=/dev/nfs rw " \
180                 "nfsroot=$(serverip):$(rootpath)\0" \
181         "addip=setenv bootargs $(bootargs) " \
182                 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
183                 ":$(hostname):eth0:off\0" \
184         "ramboot=tftpboot $(loadaddr) linux;" \
185                 "run ramargs;run addip;bootelf\0" \
186         "nfsboot=tftpboot $(loadaddr) linux;" \
187                 "run nfsargs;run addip;bootelf\0"
188 #else
189 # define NETWORK_ENV_SETTINGS
190 #endif
191 #define CONFIG_EXTRA_ENV_SETTINGS \
192         NETWORK_ENV_SETTINGS \
193         "ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \
194         BOOT_ENV_SETTINGS
195
196 #endif