include/configs/cgtqmx6eval.h

   1 /*
   2  *
   3  * Congatec Conga-QEVAl board configuration file.
   4  *
   5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
   6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
   7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
   8  * Leo Sartre, <lsartre@adeneo-embedded.com>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_CGTQMX6EVAL_H
  14 #define __CONFIG_CGTQMX6EVAL_H
  15
  16 #include "mx6_common.h"
  17
  18 #define CONFIG_MACH_TYPE        4122
  19
  20 /* Size of malloc() pool */
  21 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  22
  23 #define CONFIG_BOARD_EARLY_INIT_F
  24 #define CONFIG_MISC_INIT_R
  25
  26 #define CONFIG_MXC_UART
  27 #define CONFIG_MXC_UART_BASE           UART2_BASE
  28
  29 /* MMC Configs */
  30 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
  31
  32 /* Miscellaneous commands */
  33 #define CONFIG_CMD_BMODE
  34
  35 #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
  36
  37 #define CONFIG_EXTRA_ENV_SETTINGS \
  38         "script=boot.scr\0" \
  39         "image=zImage\0" \
  40         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  41         "boot_dir=/boot\0" \
  42         "console=ttymxc1\0" \
  43         "fdt_high=0xffffffff\0" \
  44         "initrd_high=0xffffffff\0" \
  45         "fdt_addr=0x18000000\0" \
  46         "boot_fdt=try\0" \
  47         "mmcdev=1\0" \
  48         "mmcpart=1\0" \
  49         "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
  50         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  51                 "root=${mmcroot}\0" \
  52         "loadbootscript=" \
  53                 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  54         "bootscript=echo Running bootscript from mmc ...; " \
  55                 "source\0" \
  56         "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
  57                 "${boot_dir}/${image}\0" \
  58         "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
  59                 "${boot_dir}/${fdt_file}\0" \
  60         "mmcboot=echo Booting from mmc ...; " \
  61                 "run mmcargs; " \
  62                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  63                         "if run loadfdt; then " \
  64                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  65                         "else " \
  66                                 "if test ${boot_fdt} = try; then " \
  67                                         "bootz; " \
  68                                 "else " \
  69                                         "echo WARN: Cannot load the DT; " \
  70                                 "fi; " \
  71                         "fi; " \
  72                 "else " \
  73                         "bootz; " \
  74                 "fi;\0"
  75
  76 #define CONFIG_BOOTCOMMAND \
  77            "mmc dev ${mmcdev};" \
  78            "mmc dev ${mmcdev}; if mmc rescan; then " \
  79                    "if run loadbootscript; then " \
  80                            "run bootscript; " \
  81                    "else " \
  82                            "if run loadimage; then " \
  83                                    "run mmcboot; " \
  84                            "else "\
  85                                    "echo ERR: Fail to boot from mmc; " \
  86                            "fi; " \
  87                    "fi; " \
  88            "else echo ERR: Fail to boot from mmc; fi"
  89
  90 /* Miscellaneous configurable options */
  91 #define CONFIG_SYS_PROMPT              "CGT-QMX6-Quad U-Boot > "
  92
  93 /* Print Buffer Size */
  94 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  95
  96 #define CONFIG_SYS_MEMTEST_START       0x10000000
  97 #define CONFIG_SYS_MEMTEST_END         0x10010000
  98 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
  99
 100 /* Physical Memory Map */
 101 #define CONFIG_NR_DRAM_BANKS           1
 102 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 103 #define PHYS_SDRAM_SIZE                        (1u * 1024 * 1024 * 1024)
 104
 105 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
 106 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
 107 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 108
 109 #define CONFIG_SYS_INIT_SP_OFFSET \
 110         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 111 #define CONFIG_SYS_INIT_SP_ADDR \
 112         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 113
 114 /* Environment organization */
 115 #define CONFIG_ENV_SIZE                 (8 * 1024)
 116
 117 #define CONFIG_ENV_IS_IN_MMC
 118
 119 #define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
 120 #define CONFIG_SYS_MMC_ENV_DEV          0
 121
 122 #endif                         /* __CONFIG_CGTQMX6EVAL_H */