include/configs/colibri_pxa270.h

   1 /*
   2  * Toradex Colibri PXA270 configuration file
   3  *
   4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
   5  * Copyright (C) 2015 Marcel Ziswiler <marcel@ziswiler.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /*
  14  * High Level Board Configuration Options
  15  */
  16 #define CONFIG_CPU_PXA27X               1       /* Marvell PXA270 CPU */
  17 #define CONFIG_SYS_GENERIC_BOARD
  18 #define CONFIG_SYS_TEXT_BASE            0x0
  19 /* Avoid overwriting factory configuration block */
  20 #define CONFIG_BOARD_SIZE_LIMIT         0x40000
  21
  22 /* We will never enable dcache because we have to setup MMU first */
  23 #define CONFIG_SYS_DCACHE_OFF
  24
  25 /*
  26  * Environment settings
  27  */
  28 #define CONFIG_ENV_OVERWRITE
  29 #define CONFIG_SYS_MALLOC_LEN           (128 * 1024)
  30 #define CONFIG_ARCH_CPU_INIT
  31 #define CONFIG_BOOTCOMMAND                                              \
  32         "if fatload mmc 0 0xa0000000 uImage; then "                     \
  33                 "bootm 0xa0000000; "                                    \
  34         "fi; "                                                          \
  35         "if usb reset && fatload usb 0 0xa0000000 uImage; then "        \
  36                 "bootm 0xa0000000; "                                    \
  37         "fi; "                                                          \
  38         "bootm 0xc0000;"
  39 #define CONFIG_BOOTARGS                 "console=tty0 console=ttyS0,115200"
  40 #define CONFIG_TIMESTAMP
  41 #define CONFIG_BOOTDELAY                2       /* Autoboot delay */
  42 #define CONFIG_CMDLINE_TAG
  43 #define CONFIG_SETUP_MEMORY_TAGS
  44 #define CONFIG_LZMA                     /* LZMA compression support */
  45 #define CONFIG_OF_LIBFDT
  46
  47 /*
  48  * Serial Console Configuration
  49  */
  50 #define CONFIG_PXA_SERIAL
  51 #define CONFIG_FFUART                   1
  52 #define CONFIG_CONS_INDEX               3
  53 #define CONFIG_BAUDRATE                 115200
  54
  55 /*
  56  * Bootloader Components Configuration
  57  */
  58 #define CONFIG_CMD_ENV
  59 #define CONFIG_CMD_MMC
  60 #define CONFIG_CMD_USB
  61
  62 /* I2C support */
  63 #ifdef CONFIG_SYS_I2C
  64 #define CONFIG_CMD_I2C
  65 #define CONFIG_SYS_I2C_PXA
  66 #define CONFIG_PXA_STD_I2C
  67 #define CONFIG_PXA_PWR_I2C
  68 #define CONFIG_SYS_I2C_SPEED            100000
  69 #endif
  70
  71 /* LCD support */
  72 #ifdef CONFIG_LCD
  73 #define CONFIG_PXA_LCD
  74 #define CONFIG_PXA_VGA
  75 #define CONFIG_SYS_WHITE_ON_BLACK
  76 #define CONFIG_CONSOLE_SCROLL_LINES     10
  77 #define CONFIG_CMD_BMP
  78 #define CONFIG_LCD_LOGO
  79 #endif
  80
  81 /*
  82  * Networking Configuration
  83  */
  84 #ifdef  CONFIG_CMD_NET
  85 #define CONFIG_CMD_PING
  86 #define CONFIG_CMD_DHCP
  87
  88 #define CONFIG_DRIVER_DM9000            1
  89 #define CONFIG_DM9000_BASE              0x08000000
  90 #define DM9000_IO                       (CONFIG_DM9000_BASE)
  91 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
  92 #define CONFIG_NET_RETRY_COUNT          10
  93
  94 #define CONFIG_BOOTP_BOOTFILESIZE
  95 #define CONFIG_BOOTP_BOOTPATH
  96 #define CONFIG_BOOTP_GATEWAY
  97 #define CONFIG_BOOTP_HOSTNAME
  98 #endif
  99
 100 /*
 101  * HUSH Shell Configuration
 102  */
 103 #define CONFIG_SYS_HUSH_PARSER          1
 104
 105 #undef  CONFIG_SYS_LONGHELP             /* Saves 10 KB */
 106 #undef CONFIG_SYS_PROMPT
 107 #ifdef  CONFIG_SYS_HUSH_PARSER
 108 #define CONFIG_SYS_PROMPT               "$ "
 109 #else
 110 #endif
 111 #define CONFIG_SYS_CBSIZE               256
 112 #define CONFIG_SYS_PBSIZE               \
 113         (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 114 #define CONFIG_SYS_MAXARGS              16
 115 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 116 #define CONFIG_SYS_DEVICE_NULLDEV       1
 117 #define CONFIG_CMDLINE_EDITING          1
 118 #define CONFIG_AUTO_COMPLETE            1
 119
 120 /*
 121  * Clock Configuration
 122  */
 123 #define CONFIG_SYS_CPUSPEED             0x290           /* 520MHz */
 124
 125 /*
 126  * DRAM Map
 127  */
 128 #define CONFIG_NR_DRAM_BANKS            1               /* We have 1 bank of DRAM */
 129 #define PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
 130 #define PHYS_SDRAM_1_SIZE               0x04000000      /* 64 MB */
 131
 132 #define CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
 133 #define CONFIG_SYS_DRAM_SIZE            0x04000000      /* 64 MB DRAM */
 134
 135 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on */
 136 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
 137
 138 #define CONFIG_SYS_LOAD_ADDR            PHYS_SDRAM_1
 139 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 140 #define CONFIG_SYS_INIT_SP_ADDR         0x5c010000
 141
 142 /*
 143  * NOR FLASH
 144  */
 145 #ifdef  CONFIG_CMD_FLASH
 146 #define PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
 147 #define PHYS_FLASH_SIZE                 0x02000000      /* 32 MB */
 148 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 149
 150 #define CONFIG_SYS_FLASH_CFI
 151 #define CONFIG_FLASH_CFI_DRIVER         1
 152 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_32BIT
 153
 154 #define CONFIG_SYS_MAX_FLASH_SECT       (4 + 255)
 155 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 156
 157 #define CONFIG_SYS_FLASH_ERASE_TOUT     (25 * CONFIG_SYS_HZ)
 158 #define CONFIG_SYS_FLASH_WRITE_TOUT     (25 * CONFIG_SYS_HZ)
 159 #define CONFIG_SYS_FLASH_LOCK_TOUT      (25 * CONFIG_SYS_HZ)
 160 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    (25 * CONFIG_SYS_HZ)
 161
 162 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 163 #define CONFIG_SYS_FLASH_PROTECTION             1
 164
 165 #define CONFIG_ENV_IS_IN_FLASH          1
 166
 167 #else   /* No flash */
 168 #define CONFIG_SYS_NO_FLASH
 169 #define CONFIG_ENV_IS_NOWHERE
 170 #endif
 171
 172 #define CONFIG_SYS_MONITOR_BASE         0x0
 173 #define CONFIG_SYS_MONITOR_LEN          0x40000
 174
 175 /* Skip factory configuration block */
 176 #define CONFIG_ENV_ADDR                 \
 177                         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000)
 178 #define CONFIG_ENV_SIZE                 0x40000
 179 #define CONFIG_ENV_SECT_SIZE            0x40000
 180
 181 /*
 182  * GPIO settings
 183  */
 184 #define CONFIG_SYS_GPSR0_VAL    0x00000000
 185 #define CONFIG_SYS_GPSR1_VAL    0x00020000
 186 #define CONFIG_SYS_GPSR2_VAL    0x0002c000
 187 #define CONFIG_SYS_GPSR3_VAL    0x00000000
 188
 189 #define CONFIG_SYS_GPCR0_VAL    0x00000000
 190 #define CONFIG_SYS_GPCR1_VAL    0x00000000
 191 #define CONFIG_SYS_GPCR2_VAL    0x00000000
 192 #define CONFIG_SYS_GPCR3_VAL    0x00000000
 193
 194 #define CONFIG_SYS_GPDR0_VAL    0xc8008000
 195 #define CONFIG_SYS_GPDR1_VAL    0xfc02a981
 196 #define CONFIG_SYS_GPDR2_VAL    0x92c3ffff
 197 #define CONFIG_SYS_GPDR3_VAL    0x0061e804
 198
 199 #define CONFIG_SYS_GAFR0_L_VAL  0x80100000
 200 #define CONFIG_SYS_GAFR0_U_VAL  0xa5c00010
 201 #define CONFIG_SYS_GAFR1_L_VAL  0x6992901a
 202 #define CONFIG_SYS_GAFR1_U_VAL  0xaaa50008
 203 #define CONFIG_SYS_GAFR2_L_VAL  0xaaaaaaaa
 204 #define CONFIG_SYS_GAFR2_U_VAL  0x4109a002
 205 #define CONFIG_SYS_GAFR3_L_VAL  0x54000310
 206 #define CONFIG_SYS_GAFR3_U_VAL  0x00005401
 207
 208 #define CONFIG_SYS_PSSR_VAL     0x30
 209
 210 /*
 211  * Clock settings
 212  */
 213 #define CONFIG_SYS_CKEN         0x00500240
 214 #define CONFIG_SYS_CCCR         0x02000290
 215
 216 /*
 217  * Memory settings
 218  */
 219 #define CONFIG_SYS_MSC0_VAL     0x9ee1c5f2
 220 #define CONFIG_SYS_MSC1_VAL     0x9ee1f994
 221 #define CONFIG_SYS_MSC2_VAL     0x9ee19ee1
 222 #define CONFIG_SYS_MDCNFG_VAL   0x090009c9
 223 #define CONFIG_SYS_MDREFR_VAL   0x2003a031
 224 #define CONFIG_SYS_MDMRS_VAL    0x00220022
 225 #define CONFIG_SYS_FLYCNFG_VAL  0x00010001
 226 #define CONFIG_SYS_SXCNFG_VAL   0x40044004
 227
 228 /*
 229  * PCMCIA and CF Interfaces
 230  */
 231 #define CONFIG_SYS_MECR_VAL     0x00000000
 232 #define CONFIG_SYS_MCMEM0_VAL   0x00028307
 233 #define CONFIG_SYS_MCMEM1_VAL   0x00014307
 234 #define CONFIG_SYS_MCATT0_VAL   0x00038787
 235 #define CONFIG_SYS_MCATT1_VAL   0x0001c787
 236 #define CONFIG_SYS_MCIO0_VAL    0x0002830f
 237 #define CONFIG_SYS_MCIO1_VAL    0x0001430f
 238
 239 #include "pxa-common.h"
 240
 241 #endif /* __CONFIG_H */