include/configs/coreboot.h

   1 /*
   2  * Copyright (c) 2011 The Chromium OS Authors.
   3  * (C) Copyright 2008
   4  * Graeme Russ, graeme.russ@gmail.com.
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #include <asm/ibmpc.h>
  26 /*
  27  * board/config.h - configuration options, board specific
  28  */
  29
  30 #ifndef __CONFIG_H
  31 #define __CONFIG_H
  32
  33 /*
  34  * High Level Configuration Options
  35  * (easy to change)
  36  */
  37 #define CONFIG_SYS_COREBOOT
  38 #define CONFIG_SHOW_BOOT_PROGRESS
  39 #define CONFIG_LAST_STAGE_INIT
  40 #define CONFIG_SYS_VSNPRINTF
  41 #define CONFIG_INTEL_CORE_ARCH  /* Sandy bridge and ivy bridge chipsets. */
  42 #define CONFIG_ZBOOT_32
  43 #define CONFIG_PHYSMEM
  44
  45 #define CONFIG_LMB
  46 #define CONFIG_OF_LIBFDT
  47 #define CONFIG_OF_CONTROL
  48 #define CONFIG_OF_SEPARATE
  49 #define CONFIG_DEFAULT_DEVICE_TREE      link
  50
  51 /*-----------------------------------------------------------------------
  52  * Watchdog Configuration
  53  */
  54 #undef CONFIG_WATCHDOG
  55 #undef CONFIG_HW_WATCHDOG
  56
  57 /* SATA AHCI storage */
  58
  59 #define CONFIG_SCSI_AHCI
  60
  61 #ifdef CONFIG_SCSI_AHCI
  62 #define CONFIG_SYS_64BIT_LBA
  63 #define CONFIG_SATA_INTEL               1
  64 #define CONFIG_SCSI_DEV_LIST            {PCI_VENDOR_ID_INTEL, \
  65                         PCI_DEVICE_ID_INTEL_NM10_AHCI},       \
  66         {PCI_VENDOR_ID_INTEL,           \
  67                         PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
  68         {PCI_VENDOR_ID_INTEL, \
  69                         PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
  70         {PCI_VENDOR_ID_INTEL,           \
  71                         PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
  72
  73 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     2
  74 #define CONFIG_SYS_SCSI_MAX_LUN         1
  75 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  76                                          CONFIG_SYS_SCSI_MAX_LUN)
  77 #endif
  78
  79 /* Generic TPM interfaced through LPC bus */
  80 #define CONFIG_GENERIC_LPC_TPM
  81 #define CONFIG_TPM_TIS_BASE_ADDRESS        0xfed40000
  82
  83 /*-----------------------------------------------------------------------
  84  * Real Time Clock Configuration
  85  */
  86 #define CONFIG_RTC_MC146818
  87 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS  0
  88 #define CONFIG_SYS_ISA_IO      CONFIG_SYS_ISA_IO_BASE_ADDRESS
  89
  90 /*-----------------------------------------------------------------------
  91  * Serial Configuration
  92  */
  93 #define CONFIG_CONS_INDEX               1
  94 #define CONFIG_SYS_NS16550
  95 #define CONFIG_SYS_NS16550_SERIAL
  96 #define CONFIG_SYS_NS16550_REG_SIZE     1
  97 #define CONFIG_SYS_NS16550_CLK          1843200
  98 #define CONFIG_BAUDRATE                 9600
  99 #define CONFIG_SYS_BAUDRATE_TABLE       {300, 600, 1200, 2400, 4800, \
 100                                          9600, 19200, 38400, 115200}
 101 #define CONFIG_SYS_NS16550_COM1 UART0_BASE
 102 #define CONFIG_SYS_NS16550_COM2 UART1_BASE
 103 #define CONFIG_SYS_NS16550_PORT_MAPPED
 104
 105 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,eserial0\0" \
 106                                         "stdout=vga,eserial0,cbmem\0" \
 107                                         "stderr=vga,eserial0,cbmem\0"
 108
 109 #define CONFIG_CONSOLE_MUX
 110 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 111 #define CONFIG_SYS_STDIO_DEREGISTER
 112 #define CONFIG_CBMEM_CONSOLE
 113
 114 #define CONFIG_CMDLINE_EDITING
 115 #define CONFIG_COMMAND_HISTORY
 116 #define CONFIG_AUTOCOMPLETE
 117
 118 #define CONFIG_SUPPORT_VFAT
 119 /************************************************************
 120  * ATAPI support (experimental)
 121  ************************************************************/
 122 #define CONFIG_ATAPI
 123
 124 /************************************************************
 125  * DISK Partition support
 126  ************************************************************/
 127 #define CONFIG_EFI_PARTITION
 128 #define CONFIG_DOS_PARTITION
 129 #define CONFIG_MAC_PARTITION
 130 #define CONFIG_ISO_PARTITION            /* Experimental */
 131
 132 #define CONFIG_CMD_PART
 133 #define CONFIG_CMD_CBFS
 134 #define CONFIG_CMD_EXT4
 135 #define CONFIG_CMD_EXT4_WRITE
 136 #define CONFIG_PARTITION_UUIDS
 137
 138 /*-----------------------------------------------------------------------
 139  * Video Configuration
 140  */
 141 #define CONFIG_VIDEO
 142 #define CONFIG_VIDEO_COREBOOT
 143 #define CONFIG_VIDEO_SW_CURSOR
 144 #define VIDEO_FB_16BPP_WORD_SWAP
 145 #define CONFIG_I8042_KBD
 146 #define CONFIG_CFB_CONSOLE
 147 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 148
 149 /* x86 GPIOs are accessed through a PCI device */
 150 #define CONFIG_INTEL_ICH6_GPIO
 151
 152 /*-----------------------------------------------------------------------
 153  * Command line configuration.
 154  */
 155 #include <config_cmd_default.h>
 156
 157 #define CONFIG_CMD_BDI
 158 #define CONFIG_CMD_BOOTD
 159 #define CONFIG_CMD_CONSOLE
 160 #define CONFIG_CMD_DATE
 161 #define CONFIG_CMD_ECHO
 162 #undef CONFIG_CMD_FLASH
 163 #define CONFIG_CMD_FPGA
 164 #define CONFIG_CMD_GPIO
 165 #define CONFIG_CMD_IMI
 166 #undef CONFIG_CMD_IMLS
 167 #define CONFIG_CMD_IO
 168 #define CONFIG_CMD_IRQ
 169 #define CONFIG_CMD_ITEST
 170 #define CONFIG_CMD_LOADB
 171 #define CONFIG_CMD_LOADS
 172 #define CONFIG_CMD_MEMORY
 173 #define CONFIG_CMD_MISC
 174 #define CONFIG_CMD_NET
 175 #undef CONFIG_CMD_NFS
 176 #define CONFIG_CMD_PCI
 177 #define CONFIG_CMD_PING
 178 #define CONFIG_CMD_RUN
 179 #define CONFIG_CMD_SAVEENV
 180 #define CONFIG_CMD_SETGETDCR
 181 #define CONFIG_CMD_SOURCE
 182 #define CONFIG_CMD_TIME
 183 #define CONFIG_CMD_GETTIME
 184 #define CONFIG_CMD_XIMG
 185 #define CONFIG_CMD_SCSI
 186
 187 #define CONFIG_CMD_FAT
 188 #define CONFIG_CMD_EXT2
 189
 190 #define CONFIG_CMD_ZBOOT
 191
 192 #define CONFIG_BOOTDELAY        2
 193 #define CONFIG_BOOTARGS         \
 194         "root=/dev/sdb3 init=/sbin/init rootwait ro"
 195 #define CONFIG_BOOTCOMMAND      \
 196         "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
 197
 198
 199 #if defined(CONFIG_CMD_KGDB)
 200 #define CONFIG_KGDB_BAUDRATE                    115200
 201 #define CONFIG_KGDB_SER_INDEX                   2
 202 #endif
 203
 204 /*
 205  * Miscellaneous configurable options
 206  */
 207 #define CONFIG_SYS_LONGHELP
 208 #define CONFIG_SYS_PROMPT                       "boot > "
 209 #define CONFIG_SYS_CBSIZE                       256
 210 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + \
 211                                                  sizeof(CONFIG_SYS_PROMPT) + \
 212                                                  16)
 213 #define CONFIG_SYS_MAXARGS                      16
 214 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
 215
 216 #define CONFIG_SYS_MEMTEST_START                0x00100000
 217 #define CONFIG_SYS_MEMTEST_END                  0x01000000
 218 #define CONFIG_SYS_LOAD_ADDR                    0x100000
 219 #define CONFIG_SYS_HZ                           1000
 220 #define CONFIG_SYS_X86_ISR_TIMER
 221
 222 /*-----------------------------------------------------------------------
 223  * SDRAM Configuration
 224  */
 225 #define CONFIG_NR_DRAM_BANKS                    4
 226
 227 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
 228 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
 229 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
 230 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
 231 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
 232
 233 /*-----------------------------------------------------------------------
 234  * CPU Features
 235  */
 236
 237 #define CONFIG_SYS_GENERIC_TIMER
 238 #define CONFIG_SYS_PCAT_INTERRUPTS
 239 #define CONFIG_SYS_NUM_IRQS                     16
 240
 241 /*-----------------------------------------------------------------------
 242  * Memory organization:
 243  * 32kB Stack
 244  * 16kB Cache-As-RAM @ 0x19200000
 245  * 256kB Monitor
 246  * (128kB + Environment Sector Size) malloc pool
 247  */
 248 #define CONFIG_SYS_STACK_SIZE                   (32 * 1024)
 249 #define CONFIG_SYS_CAR_ADDR                     0x19200000
 250 #define CONFIG_SYS_CAR_SIZE                     (16 * 1024)
 251 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 252 #define CONFIG_SYS_MONITOR_LEN                  (256 * 1024)
 253 #define CONFIG_SYS_MALLOC_LEN                   (0x20000 + 128 * 1024)
 254
 255
 256 /* allow to overwrite serial and ethaddr */
 257 #define CONFIG_ENV_OVERWRITE
 258
 259 /*-----------------------------------------------------------------------
 260  * FLASH configuration
 261  */
 262 #define CONFIG_ICH_SPI
 263 #define CONFIG_SPI_FLASH
 264 #define CONFIG_SPI_FLASH_MACRONIX
 265 #define CONFIG_SPI_FLASH_WINBOND
 266 #define CONFIG_SPI_FLASH_GIGADEVICE
 267 #define CONFIG_SYS_NO_FLASH
 268 #define CONFIG_CMD_SF
 269 #define CONFIG_CMD_SF_TEST
 270 #define CONFIG_CMD_SPI
 271 #define CONFIG_SPI
 272
 273 /*-----------------------------------------------------------------------
 274  * Environment configuration
 275  */
 276 #define CONFIG_ENV_IS_NOWHERE
 277 #define CONFIG_ENV_SIZE                 0x01000
 278
 279 /*-----------------------------------------------------------------------
 280  * PCI configuration
 281  */
 282 #define CONFIG_PCI
 283
 284 /*-----------------------------------------------------------------------
 285  * USB configuration
 286  */
 287 #define CONFIG_USB_EHCI
 288 #define CONFIG_USB_EHCI_PCI
 289 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS     12
 290 #define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 291 #define CONFIG_USB_STORAGE
 292 #define CONFIG_USB_KEYBOARD
 293 #define CONFIG_SYS_USB_EVENT_POLL
 294
 295 #define CONFIG_USB_HOST_ETHER
 296 #define CONFIG_USB_ETHER_ASIX
 297 #define CONFIG_USB_ETHER_SMSC95XX
 298
 299 #define CONFIG_CMD_USB
 300
 301 #define CONFIG_EXTRA_ENV_SETTINGS \
 302         CONFIG_STD_DEVICES_SETTINGS
 303
 304 #endif  /* __CONFIG_H */