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1 /*
2  * (C) Copyright 2013
3  * Texas Instruments Incorporated.
4  * Lokesh Vutla   <lokeshvutla@ti.com>
5  *
6  * Configuration settings for the TI DRA7XX board.
7  * See ti_omap5_common.h for omap5 common settings.
8  *
9  * SPDX-License-Identifier:     GPL-2.0+
10  */
11
12 #ifndef __CONFIG_DRA7XX_EVM_H
13 #define __CONFIG_DRA7XX_EVM_H
14
15 #define CONFIG_DRA7XX
16 #define CONFIG_BOARD_EARLY_INIT_F
17
18 #ifndef CONFIG_QSPI_BOOT
19 /* MMC ENV related defines */
20 #define CONFIG_ENV_IS_IN_MMC
21 #define CONFIG_SYS_MMC_ENV_DEV          1       /* SLOT2: eMMC(1) */
22 #define CONFIG_ENV_SIZE                 (128 << 10)
23 #define CONFIG_ENV_OFFSET               0xE0000
24 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
25 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
26 #endif
27 #define CONFIG_CMD_SAVEENV
28
29 #if (CONFIG_CONS_INDEX == 1)
30 #define CONSOLEDEV                      "ttyO0"
31 #elif (CONFIG_CONS_INDEX == 3)
32 #define CONSOLEDEV                      "ttyO2"
33 #endif
34 #define CONFIG_SYS_NS16550_COM1         UART1_BASE      /* Base EVM has UART0 */
35 #define CONFIG_SYS_NS16550_COM2         UART2_BASE      /* UART2 */
36 #define CONFIG_SYS_NS16550_COM3         UART3_BASE      /* UART3 */
37 #define CONFIG_BAUDRATE                 115200
38
39 #define CONFIG_SYS_OMAP_ABE_SYSCK
40
41 /* Define the default GPT table for eMMC */
42 #define PARTS_DEFAULT \
43         "uuid_disk=${uuid_gpt_disk};" \
44         "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
45
46 #include <configs/ti_omap5_common.h>
47
48 /* Enhance our eMMC support / experience. */
49 #define CONFIG_CMD_GPT
50 #define CONFIG_EFI_PARTITION
51 #define CONFIG_HSMMC2_8BIT
52
53 /* CPSW Ethernet */
54 #define CONFIG_CMD_NET                  /* 'bootp' and 'tftp' */
55 #define CONFIG_CMD_DHCP
56 #define CONFIG_BOOTP_DNS                /* Configurable parts of CMD_DHCP */
57 #define CONFIG_BOOTP_DNS2
58 #define CONFIG_BOOTP_SEND_HOSTNAME
59 #define CONFIG_BOOTP_GATEWAY
60 #define CONFIG_BOOTP_SUBNETMASK
61 #define CONFIG_NET_RETRY_COUNT          10
62 #define CONFIG_CMD_PING
63 #define CONFIG_CMD_MII
64 #define CONFIG_DRIVER_TI_CPSW           /* Driver for IP block */
65 #define CONFIG_MII                      /* Required in net/eth.c */
66 #define CONFIG_PHY_GIGE                 /* per-board part of CPSW */
67 #define CONFIG_PHYLIB
68
69 /* SPI */
70 #undef  CONFIG_OMAP3_SPI
71 #define CONFIG_TI_QSPI
72 #define CONFIG_SPI_FLASH
73 #define CONFIG_SPI_FLASH_SPANSION
74 #define CONFIG_CMD_SF
75 #define CONFIG_CMD_SPI
76 #define CONFIG_SPI_FLASH_BAR
77 #define CONFIG_TI_SPI_MMAP
78 #define CONFIG_SF_DEFAULT_SPEED                48000000
79 #define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
80
81 /*
82  * Default to using SPI for environment, etc.
83  * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
84  * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
85  * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
86  * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
87  * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
88  * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
89  * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
90  * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
91  * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
92  * 0x9E0000 - 0x2000000 : USERLAND
93  */
94 #define CONFIG_SYS_SPI_KERNEL_OFFS      0x1E0000
95 #define CONFIG_SYS_SPI_ARGS_OFFS        0x140000
96 #define CONFIG_SYS_SPI_ARGS_SIZE        0x80000
97 #if defined(CONFIG_QSPI_BOOT)
98 /* In SPL, use the environment and discard MMC support for space. */
99 #ifdef CONFIG_SPL_BUILD
100 #undef CONFIG_SPL_MMC_SUPPORT
101 #undef CONFIG_SPL_MAX_SIZE
102 #define CONFIG_SPL_MAX_SIZE             (64 << 10) /* 64 KiB */
103 #endif
104 #define CONFIG_SPL_ENV_SUPPORT
105 #define CONFIG_ENV_IS_IN_SPI_FLASH
106 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
107 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
108 #define CONFIG_ENV_SIZE                 (64 << 10)
109 #define CONFIG_ENV_SECT_SIZE            (64 << 10) /* 64 KB sectors */
110 #define CONFIG_ENV_OFFSET               0x1C0000
111 #define CONFIG_ENV_OFFSET_REDUND        0x1D0000
112 #endif
113
114 /* SPI SPL */
115 #define CONFIG_SPL_SPI_SUPPORT
116 #define CONFIG_SPL_SPI_LOAD
117 #define CONFIG_SPL_SPI_FLASH_SUPPORT
118 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000
119
120 #define CONFIG_SUPPORT_EMMC_BOOT
121
122 /* USB xHCI HOST */
123 #define CONFIG_CMD_USB
124 #define CONFIG_USB_HOST
125 #define CONFIG_USB_XHCI
126 #define CONFIG_USB_XHCI_OMAP
127 #define CONFIG_USB_STORAGE
128 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
129
130 #define CONFIG_OMAP_USB_PHY
131 #define CONFIG_OMAP_USB2PHY2_HOST
132
133 /* SATA */
134 #define CONFIG_BOARD_LATE_INIT
135 #define CONFIG_CMD_SCSI
136 #define CONFIG_LIBATA
137 #define CONFIG_SCSI_AHCI
138 #define CONFIG_SCSI_AHCI_PLAT
139 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     1
140 #define CONFIG_SYS_SCSI_MAX_LUN         1
141 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
142                                                 CONFIG_SYS_SCSI_MAX_LUN)
143
144 /* NAND support */
145 #ifdef CONFIG_NAND
146 /* NAND: device related configs */
147 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
148 #define CONFIG_SYS_NAND_OOBSIZE         64
149 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
150 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
151 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
152                                          CONFIG_SYS_NAND_PAGE_SIZE)
153 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
154 /* NAND: driver related configs */
155 #define CONFIG_NAND_OMAP_GPMC
156 #define CONFIG_NAND_OMAP_ELM
157 #define CONFIG_SYS_NAND_ONFI_DETECTION
158 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW
159 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
160 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
161                                          10, 11, 12, 13, 14, 15, 16, 17, \
162                                          18, 19, 20, 21, 22, 23, 24, 25, \
163                                          26, 27, 28, 29, 30, 31, 32, 33, \
164                                          34, 35, 36, 37, 38, 39, 40, 41, \
165                                          42, 43, 44, 45, 46, 47, 48, 49, \
166                                          50, 51, 52, 53, 54, 55, 56, 57, }
167 #define CONFIG_SYS_NAND_ECCSIZE         512
168 #define CONFIG_SYS_NAND_ECCBYTES        14
169 #define MTDIDS_DEFAULT                  "nand0=nand.0"
170 #define MTDPARTS_DEFAULT                "mtdparts=nand.0:" \
171                                         "128k(NAND.SPL)," \
172                                         "128k(NAND.SPL.backup1)," \
173                                         "128k(NAND.SPL.backup2)," \
174                                         "128k(NAND.SPL.backup3)," \
175                                         "256k(NAND.u-boot-spl-os)," \
176                                         "1m(NAND.u-boot)," \
177                                         "128k(NAND.u-boot-env)," \
178                                         "128k(NAND.u-boot-env.backup1)," \
179                                         "8m(NAND.kernel)," \
180                                         "-(NAND.rootfs)"
181 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x000c0000
182 /* NAND: SPL related configs */
183 #ifdef CONFIG_SPL_NAND_SUPPORT
184 #define CONFIG_SPL_NAND_AM33XX_BCH
185 #endif
186 /* NAND: SPL falcon mode configs */
187 #ifdef CONFIG_SPL_OS_BOOT
188 #define CONFIG_CMD_SPL_NAND_OFS         0x00080000 /* os-boot params*/
189 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
190 #define CONFIG_CMD_SPL_WRITE_SIZE       0x2000
191 #endif
192 #endif /* !CONFIG_NAND */
193
194 /* Parallel NOR Support */
195 #if defined(CONFIG_NOR)
196 /* NOR: device related configs */
197 #define CONFIG_SYS_MAX_FLASH_SECT       512
198 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
199 #define CONFIG_SYS_FLASH_SIZE           (64 * 1024 * 1024) /* 64 MB */
200 /* #define CONFIG_INIT_IGNORE_ERROR */
201 #undef CONFIG_SYS_NO_FLASH
202 #define CONFIG_CMD_FLASH
203 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
204 #define CONFIG_SYS_FLASH_PROTECTION
205 #define CONFIG_SYS_FLASH_CFI
206 #define CONFIG_FLASH_CFI_DRIVER
207 #define CONFIG_FLASH_CFI_MTD
208 #define CONFIG_SYS_MAX_FLASH_BANKS      1
209 #define CONFIG_SYS_FLASH_BASE           (0x08000000)
210 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
211 /* Reduce SPL size by removing unlikey targets */
212 #ifdef CONFIG_NOR_BOOT
213 #define CONFIG_ENV_IS_IN_FLASH
214 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)    /* 128 KiB */
215 #define MTDIDS_DEFAULT                  "nor0=physmap-flash.0"
216 #define MTDPARTS_DEFAULT                "mtdparts=physmap-flash.0:" \
217                                         "128k(NOR.SPL)," \
218                                         "128k(NOR.SPL.backup1)," \
219                                         "128k(NOR.SPL.backup2)," \
220                                         "128k(NOR.SPL.backup3)," \
221                                         "256k(NOR.u-boot-spl-os)," \
222                                         "1m(NOR.u-boot)," \
223                                         "128k(NOR.u-boot-env)," \
224                                         "128k(NOR.u-boot-env.backup1)," \
225                                         "8m(NOR.kernel)," \
226                                         "-(NOR.rootfs)"
227 #define CONFIG_ENV_OFFSET               0x001c0000
228 #define CONFIG_ENV_OFFSET_REDUND        0x001e0000
229 #endif
230 #endif  /* NOR support */
231
232 #endif /* __CONFIG_DRA7XX_EVM_H */