include/configs/ebony.h

   1 /*
   2  * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /************************************************************************
   8  * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
   9  ***********************************************************************/
  10
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 /*-----------------------------------------------------------------------
  15  * High Level Configuration Options
  16  *----------------------------------------------------------------------*/
  17 #define CONFIG_EBONY            1           /* Board is ebony           */
  18 #define CONFIG_440GP            1           /* Specifc GP support       */
  19 #define CONFIG_440              1           /* ... PPC440 family        */
  20 #define CONFIG_4xx              1           /* ... PPC4xx family        */
  21 #define CONFIG_BOARD_EARLY_INIT_F 1         /* Call board_early_init_f  */
  22 #define CONFIG_SYS_CLK_FREQ     33333333    /* external freq to pll     */
  23
  24 #define CONFIG_SYS_TEXT_BASE    0xFFFC0000
  25
  26 /*
  27  * Include common defines/options for all AMCC eval boards
  28  */
  29 #define CONFIG_HOSTNAME         ebony
  30 #include "amcc-common.h"
  31
  32 /*
  33  * Define here the location of the environment variables (FLASH or NVRAM).
  34  * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
  35  *       supported for backward compatibility.
  36  */
  37 #if 1
  38 #define CONFIG_ENV_IS_IN_FLASH     1    /* use FLASH for environment vars       */
  39 #else
  40 #define CONFIG_ENV_IS_IN_NVRAM  1       /* use NVRAM for environment vars       */
  41 #endif
  42
  43 /*-----------------------------------------------------------------------
  44  * Base addresses -- Note these are effective addresses where the
  45  * actual resources get mapped (not physical addresses)
  46  *----------------------------------------------------------------------*/
  47 #define CONFIG_SYS_SDRAM_BASE       0x00000000      /* _must_ be 0              */
  48 #define CONFIG_SYS_FLASH_BASE       0xff800000      /* start of FLASH           */
  49 #define CONFIG_SYS_PCI_MEMBASE      0x80000000      /* mapped pci memory        */
  50 #define CONFIG_SYS_ISRAM_BASE       0xc0000000      /* internal SRAM            */
  51 #define CONFIG_SYS_PCI_BASE         0xd0000000      /* internal PCI regs        */
  52
  53 #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
  54 #define CONFIG_SYS_FPGA_BASE        (CONFIG_SYS_PERIPHERAL_BASE + 0x08300000)
  55
  56 /*-----------------------------------------------------------------------
  57  * Initial RAM & stack pointer (placed in internal SRAM)
  58  *----------------------------------------------------------------------*/
  59 #define CONFIG_SYS_INIT_RAM_ADDR   CONFIG_SYS_ISRAM_BASE  /* Initial RAM address        */
  60 #define CONFIG_SYS_INIT_RAM_SIZE    0x2000          /* Size of used area in RAM */
  61
  62 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  63 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  64
  65 /*-----------------------------------------------------------------------
  66  * Serial Port
  67  *----------------------------------------------------------------------*/
  68 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
  69 #define CONFIG_SYS_EXT_SERIAL_CLOCK     (1843200 * 6)   /* Ext clk @ 11.059 MHz */
  70
  71 /*-----------------------------------------------------------------------
  72  * NVRAM/RTC
  73  *
  74  * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
  75  * The DS1743 code assumes this condition (i.e. -- it assumes the base
  76  * address for the RTC registers is:
  77  *
  78  *      CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
  79  *
  80  *----------------------------------------------------------------------*/
  81 #define CONFIG_SYS_NVRAM_SIZE       (0x2000 - 8)    /* NVRAM size(8k)- RTC regs */
  82 #define CONFIG_RTC_DS174x       1                   /* DS1743 RTC               */
  83
  84 #ifdef CONFIG_ENV_IS_IN_NVRAM
  85 #define CONFIG_ENV_SIZE         0x1000      /* Size of Environment vars */
  86 #define CONFIG_ENV_ADDR         \
  87         (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE)
  88 #endif /* CONFIG_ENV_IS_IN_NVRAM */
  89
  90 /*-----------------------------------------------------------------------
  91  * FLASH related
  92  *----------------------------------------------------------------------*/
  93 #define CONFIG_SYS_MAX_FLASH_BANKS      3                   /* number of banks      */
  94 #define CONFIG_SYS_MAX_FLASH_SECT       32                  /* sectors per device   */
  95
  96 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
  97 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
  98
  99 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
 100
 101 #define CONFIG_SYS_FLASH_ADDR0         0x5555
 102 #define CONFIG_SYS_FLASH_ADDR1         0x2aaa
 103 #define CONFIG_SYS_FLASH_WORD_SIZE     unsigned char
 104
 105 #ifdef CONFIG_ENV_IS_IN_FLASH
 106 #define CONFIG_ENV_SECT_SIZE    0x10000 /* size of one complete sector          */
 107 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
 108 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector     */
 109
 110 /* Address and size of Redundant Environment Sector     */
 111 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 112 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 113 #endif /* CONFIG_ENV_IS_IN_FLASH */
 114
 115 /*-----------------------------------------------------------------------
 116  * DDR SDRAM
 117  *----------------------------------------------------------------------*/
 118 #define CONFIG_SPD_EEPROM       1       /* Use SPD EEPROM for setup     */
 119 #define SPD_EEPROM_ADDRESS {0x53,0x52}  /* SPD i2c spd addresses        */
 120 #define CONFIG_PROG_SDRAM_TLB   1       /* setup SDRAM TLB's dynamically*/
 121
 122 /*-----------------------------------------------------------------------
 123  * I2C
 124  *----------------------------------------------------------------------*/
 125 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           400000
 126
 127 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 128 #define CONFIG_SYS_I2C_EEPROM_ADDR      (0xa8>>1)
 129 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 130 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 131 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 132
 133 /*
 134  * Default environment variables
 135  */
 136 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 137         CONFIG_AMCC_DEF_ENV                                             \
 138         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
 139         CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
 140         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
 141         "kernel_addr=ff800000\0"                                        \
 142         "ramdisk_addr=ff810000\0"                                       \
 143         ""
 144
 145 #define CONFIG_PHY_ADDR         8       /* PHY address                  */
 146 #define CONFIG_HAS_ETH0
 147 #define CONFIG_HAS_ETH1
 148 #define CONFIG_PHY1_ADDR        9       /* EMAC1 PHY address            */
 149
 150 /*
 151  * Commands additional to the ones defined in amcc-common.h
 152  */
 153 #define CONFIG_CMD_DATE
 154 #define CONFIG_CMD_PCI
 155 #define CONFIG_CMD_SDRAM
 156 #define CONFIG_CMD_SNTP
 157
 158 /*-----------------------------------------------------------------------
 159  * PCI stuff
 160  *-----------------------------------------------------------------------
 161  */
 162 /* General PCI */
 163 #define CONFIG_PCI                                  /* include pci support              */
 164 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
 165 #define CONFIG_PCI_PNP                          /* do pci plug-and-play         */
 166 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 167 #define CONFIG_SYS_PCI_TARGBASE    0x80000000  /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
 168
 169 /* Board-specific PCI */
 170 #define CONFIG_SYS_PCI_TARGET_INIT                  /* let board init pci target    */
 171
 172 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8   /* AMCC */
 173 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe  /* Whatever */
 174
 175 #endif  /* __CONFIG_H */