2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
5 * Configuration settings for the Embest RIoTboard
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
16 #include <asm/arch/imx-regs.h>
17 #include <asm/imx-common/gpio.h>
19 #include "mx6_common.h"
20 #include <linux/sizes.h>
22 #define CONFIG_SYS_GENERIC_BOARD
24 #define CONFIG_MXC_UART_BASE UART2_BASE
25 #define CONFIG_CONSOLE_DEV "ttymxc1"
26 #define CONFIG_MMCROOT "/dev/mmcblk1p2"
28 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
31 #define CONFIG_DISPLAY_CPUINFO
32 #define CONFIG_DISPLAY_BOARDINFO
34 #define CONFIG_CMDLINE_TAG
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_INITRD_TAG
37 #define CONFIG_REVISION_TAG
39 /* Size of malloc() pool */
40 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_BOARD_LATE_INIT
44 #define CONFIG_MXC_GPIO
46 #define CONFIG_MXC_UART
48 #define CONFIG_CMD_FUSE
49 #ifdef CONFIG_CMD_FUSE
50 #define CONFIG_MXC_OCOTP
54 #define CONFIG_CMD_I2C
55 #define CONFIG_SYS_I2C
56 #define CONFIG_SYS_I2C_MXC
57 #define CONFIG_SYS_I2C_SPEED 100000
60 #define CONFIG_CMD_USB
61 #define CONFIG_USB_EHCI
62 #define CONFIG_USB_EHCI_MX6
63 #define CONFIG_USB_STORAGE
64 #define CONFIG_USB_HOST_ETHER
65 #define CONFIG_USB_ETHER_ASIX
66 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
67 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
68 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
69 #define CONFIG_MXC_USB_FLAGS 0
72 #define CONFIG_FSL_ESDHC
73 #define CONFIG_FSL_USDHC
74 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
77 #define CONFIG_CMD_MMC
78 #define CONFIG_GENERIC_MMC
79 #define CONFIG_BOUNCE_BUFFER
81 #define CONFIG_FEC_MXC
83 #define IMX_FEC_BASE ENET_BASE_ADDR
84 #define CONFIG_FEC_XCV_TYPE RGMII
85 #define CONFIG_ETHPRIME "FEC"
86 #define CONFIG_FEC_MXC_PHYADDR 4
89 #define CONFIG_PHY_ATHEROS
93 #define CONFIG_SPI_FLASH
94 #define CONFIG_SPI_FLASH_SST
95 #define CONFIG_MXC_SPI
96 #define CONFIG_SF_DEFAULT_BUS 0
97 #define CONFIG_SF_DEFAULT_CS 0
98 #define CONFIG_SF_DEFAULT_SPEED 20000000
99 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
102 /* allow to overwrite serial and ethaddr */
103 #define CONFIG_ENV_OVERWRITE
104 #define CONFIG_CONS_INDEX 1
105 #define CONFIG_BAUDRATE 115200
107 /* Command definition */
108 #include <config_cmd_default.h>
109 #undef CONFIG_CMD_FPGA
111 #define CONFIG_CMD_BMODE
112 #define CONFIG_CMD_SETEXPR
113 #undef CONFIG_CMD_IMLS
115 #define CONFIG_LOADADDR 0x12000000
116 #define CONFIG_SYS_TEXT_BASE 0x17800000
118 #define CONFIG_ARP_TIMEOUT 200UL
120 /* Miscellaneous configurable options */
121 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
122 #define CONFIG_SYS_CBSIZE 256
124 /* Print Buffer Size */
125 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
126 #define CONFIG_SYS_MAXARGS 16
127 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
129 #define CONFIG_SYS_MEMTEST_START 0x10000000
130 #define CONFIG_SYS_MEMTEST_END 0x10010000
131 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
133 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
135 #define CONFIG_STACKSIZE (128 * 1024)
137 /* Physical Memory Map */
138 #define CONFIG_NR_DRAM_BANKS 1
139 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
141 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
142 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
143 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
145 #define CONFIG_SYS_INIT_SP_OFFSET \
146 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
147 #define CONFIG_SYS_INIT_SP_ADDR \
148 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
150 /* FLASH and environment organization */
151 #define CONFIG_SYS_NO_FLASH
153 #define CONFIG_ENV_SIZE (8 * 1024)
155 #if defined(CONFIG_ENV_IS_IN_MMC)
157 #define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
158 #define CONFIG_SYS_FSL_USDHC_NUM 3
159 #define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
160 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
161 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
162 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
164 #define CONFIG_FDTFILE "imx6q-marsboard.dtb"
165 #define CONFIG_SYS_FSL_USDHC_NUM 2
166 #define CONFIG_ENV_OFFSET (768 * 1024)
167 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
168 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
169 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
170 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
171 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
174 #ifndef CONFIG_SYS_DCACHE_OFF
175 #define CONFIG_CMD_CACHE
180 #define CONFIG_VIDEO_IPUV3
181 #define CONFIG_CFB_CONSOLE
182 #define CONFIG_VGA_AS_SINGLE_DEVICE
183 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
184 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
185 #define CONFIG_VIDEO_BMP_RLE8
186 #define CONFIG_SPLASH_SCREEN
187 #define CONFIG_SPLASH_SCREEN_ALIGN
188 #define CONFIG_BMP_16BPP
189 #define CONFIG_VIDEO_LOGO
190 #define CONFIG_VIDEO_BMP_LOGO
191 #define CONFIG_IPUV3_CLK 260000000
192 #define CONFIG_IMX_HDMI
193 #define CONFIG_IMX_VIDEO_SKIP
195 #include <config_distro_defaults.h>
197 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
198 * 1M script, 1M pxe and the ramdisk at the end */
199 #define MEM_LAYOUT_ENV_SETTINGS \
200 "bootm_size=0x10000000\0" \
201 "kernel_addr_r=0x12000000\0" \
202 "fdt_addr_r=0x13000000\0" \
203 "scriptaddr=0x13100000\0" \
204 "pxefile_addr_r=0x13200000\0" \
205 "ramdisk_addr_r=0x13300000\0"
207 #define BOOT_TARGET_DEVICES(func) \
215 #include <config_distro_bootcmd.h>
217 #define CONSOLE_STDIN_SETTINGS \
220 #define CONSOLE_STDOUT_SETTINGS \
224 #define CONSOLE_ENV_SETTINGS \
225 CONSOLE_STDIN_SETTINGS \
226 CONSOLE_STDOUT_SETTINGS
228 #define CONFIG_EXTRA_ENV_SETTINGS \
229 CONSOLE_ENV_SETTINGS \
230 MEM_LAYOUT_ENV_SETTINGS \
231 "fdtfile=" CONFIG_FDTFILE "\0" \
234 #endif /* __RIOTBOARD_CONFIG_H */