2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX50-ARM2 Freescale board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/arch/mx50.h>
27 /* High Level Configuration Options */
28 #define CONFIG_ARMV7 1 /* This is armv7 Cortex-A8 CPU core */
32 #define CONFIG_MX50_ARM2
33 #define CONFIG_FLASH_HEADER
34 #define CONFIG_FLASH_HEADER_OFFSET 0x400
36 #define CONFIG_SKIP_RELOCATE_UBOOT
39 #define CONFIG_ARCH_CPU_INIT
40 #define CONFIG_ARCH_MMU
43 #define CONFIG_MX50_HCLK_FREQ 24000000
44 #define CONFIG_SYS_PLL2_FREQ 600
45 #define CONFIG_SYS_AHB_PODF 4
46 #define CONFIG_SYS_AXIA_PODF 1
47 #define CONFIG_SYS_AXIB_PODF 2
48 #define CONFIG_DISPLAY_CPUINFO
49 #define CONFIG_DISPLAY_BOARDINFO
51 #define BOARD_LATE_INIT
54 * Disabled for now due to build problems under Debian and a significant
55 * increase in the final file size: 144260 vs. 109536 Bytes.
58 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
59 #define CONFIG_REVISION_TAG 1
60 #define CONFIG_SETUP_MEMORY_TAGS 1
61 #define CONFIG_INITRD_TAG 1
64 * Size of malloc() pool
66 #define CONFIG_SYS_MALLOC_LEN (3 * 1024)
67 /* size in bytes reserved for initial data */
68 #define CONFIG_SYS_GBL_DATA_SIZE 128
73 #define CONFIG_MX50_UART 1
74 #define CONFIG_MX50_UART1 1
76 /* allow to overwrite serial and ethaddr */
77 #define CONFIG_ENV_OVERWRITE
78 #define CONFIG_CONS_INDEX 1
79 #define CONFIG_BAUDRATE 115200
80 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
82 /***********************************************************
84 ***********************************************************/
86 #define CONFIG_CMD_BDI /* bdinfo */
87 #define CONFIG_CMD_BOOTD /* bootd */
88 #define CONFIG_CMD_CONSOLE /* coninfo */
89 #define CONFIG_CMD_RUN /* run command in env variable */
103 /* Enable below configure when supporting nand */
104 #define CONFIG_CMD_ENV
106 #define CONFIG_REF_CLK_FREQ CONFIG_MX50_HCLK_FREQ
108 #undef CONFIG_CMD_IMLS
110 #define CONFIG_BOOTDELAY 3
112 #define CONFIG_PRIME "FEC0"
114 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
115 #define CONFIG_RD_LOADADDR (CONFIG_LOADADDR + 0x300000)
117 #define CONFIG_BOOTARGS "console=ttymxc0,115200 "\
120 #define CONFIG_BOOTCOMMAND "bootm"
121 #define CONFIG_ENV_IS_EMBEDDED
123 * The MX51 3stack board seems to have a hardware "peculiarity" confirmed under
124 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
125 * controller inverted. The controller is capable of detecting and correcting
126 * this, but it needs 4 network packets for that. Which means, at startup, you
127 * will not receive answers to the first 4 packest, unless there have been some
128 * broadcasts on the network, or your board is on a hub. Reducing the ARP
129 * timeout from default 5 seconds to 200ms we speed up the initial TFTP
130 * transfer, should the user wish one, significantly.
132 #define CONFIG_ARP_TIMEOUT 200UL
135 * Miscellaneous configurable options
137 #define CONFIG_SYS_PROMPT "ARM2 U-Boot > "
138 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
139 /* Print Buffer Size */
140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
141 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
142 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
144 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
145 #define CONFIG_SYS_MEMTEST_END 0x10000
147 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
149 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
151 #define CONFIG_SYS_HZ 1000
153 #define CONFIG_CMDLINE_EDITING 1
155 /*-----------------------------------------------------------------------
158 * The stack sizes are set up in start.S using the settings below
160 #define CONFIG_STACKSIZE (6 * 1024) /* regular stack */
162 /*-----------------------------------------------------------------------
163 * Physical Memory Map
165 #define CONFIG_NR_DRAM_BANKS 1
166 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
168 /* #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) */
169 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
170 #define iomem_valid_addr(addr, size) \
171 (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
173 /*-----------------------------------------------------------------------
174 * FLASH and environment organization
176 #define CONFIG_SYS_NO_FLASH
178 /* Monitor at beginning of flash */
179 /* #define CONFIG_FSL_ENV_IN_SF
181 /* #define CONFIG_FSL_ENV_IN_MMC */
183 #define CONFIG_ENV_SECT_SIZE (1 * 1024)
184 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
185 #define CONFIG_ENV_IS_NOWHERE
191 #undef CONFIG_JFFS2_CMDLINE
192 #define CONFIG_JFFS2_DEV "nand0"
194 #endif /* __CONFIG_H */