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1 /*
2  * MATRIX VISION GmbH mvBlueLYNX-X
3  *
4  * Derived from omap3_beagle.h:
5  * (C) Copyright 2006-2008
6  * Texas Instruments.
7  * Richard Woodruff <r-woodruff2@ti.com>
8  * Syed Mohammed Khasim <x0khasim@ti.com>
9  *
10  * Configuration settings for the TI OMAP3530 Beagle board.
11  *
12  * See file CREDITS for list of people who contributed to this
13  * project.
14  *
15  * This program is free software; you can redistribute it and/or
16  * modify it under the terms of the GNU General Public License as
17  * published by the Free Software Foundation; either version 2 of
18  * the License, or (at your option) any later version.
19  *
20  * This program is distributed in the hope that it will be useful,
21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  * GNU General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, write to the Free Software
27  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28  * MA 02111-1307 USA
29  */
30
31 #ifndef __CONFIG_H
32 #define __CONFIG_H
33
34 /*
35  * High Level Configuration Options
36  */
37 #define CONFIG_ARMV7            1       /* This is an ARM V7 CPU core */
38 #define CONFIG_OMAP             1       /* in a TI OMAP core */
39 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
40 #define CONFIG_MVBLX            1       /* working with mvBlueLYNX-X */
41 #define CONFIG_MACH_TYPE        MACH_TYPE_MVBLX
42 #define CONFIG_OMAP_GPIO
43
44 #define CONFIG_SDRC     /* The chip has SDRC controller */
45
46 #include <asm/arch/cpu.h>               /* get chip and board defs */
47 #include <asm/arch/omap3.h>
48
49 /*
50  * Display CPU and Board information
51  */
52 #define CONFIG_DISPLAY_CPUINFO          1
53 #define CONFIG_DISPLAY_BOARDINFO        1
54
55 /* Clock Defines */
56 #define V_OSCK                  26000000        /* Clock output from T2 */
57 #define V_SCLK                  (V_OSCK >> 1)
58
59 #define CONFIG_MISC_INIT_R
60
61 #define CONFIG_OF_LIBFDT                1
62
63 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
64 #define CONFIG_SETUP_MEMORY_TAGS        1
65 #define CONFIG_INITRD_TAG               1
66 #define CONFIG_REVISION_TAG             1
67 #define CONFIG_SERIAL_TAG               1
68
69 /*
70  * Size of malloc() pool
71  */
72 #define CONFIG_ENV_SIZE                 (2 << 10)       /* 2 KiB */
73                                                 /* Sector */
74 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
75
76 /*
77  * Hardware drivers
78  */
79
80 /*
81  * NS16550 Configuration
82  */
83 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
84
85 #define CONFIG_SYS_NS16550
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
88 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
89
90 /*
91  * select serial console configuration
92  */
93 #define CONFIG_CONS_INDEX               1
94 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
95 #define CONFIG_SERIAL1                  1       /* UART1 */
96
97 #define CONFIG_BAUDRATE                 115200
98 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
99                                         115200}
100 #define CONFIG_GENERIC_MMC              1
101 #define CONFIG_MMC                      1
102 #define CONFIG_OMAP_HSMMC               1
103 #define CONFIG_DOS_PARTITION            1
104
105 /* silent console by default */
106 #define CONFIG_SYS_DEVICE_NULLDEV       1
107 #define CONFIG_SILENT_CONSOLE           1
108
109 /* USB */
110 #define CONFIG_MUSB_UDC                 1
111 #define CONFIG_USB_OMAP3                1
112 #define CONFIG_TWL4030_USB              1
113
114 /* USB device configuration */
115 #define CONFIG_USB_DEVICE               1
116 #define CONFIG_USB_TTY                  1
117 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
118 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 1
119 #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE 1
120 #define CONFIG_USBD_VENDORID                    0x164c
121 #define CONFIG_USBD_PRODUCTID_GSERIAL   0x0201
122 #define CONFIG_USBD_PRODUCTID_CDCACM    0x0201
123 #define CONFIG_USBD_MANUFACTURER                "MATRIX VISION GmbH"
124 #define CONFIG_USBD_PRODUCT_NAME                "mvBlueLYNX-X"
125
126 /* no FLASH available */
127 #define CONFIG_SYS_NO_FLASH
128
129 /* commands to include */
130 #include <config_cmd_default.h>
131
132 #define CONFIG_CMD_CACHE
133 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
134 #define CONFIG_CMD_FAT          /* FAT support                  */
135 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
136 #define CONFIG_CMD_MMC          /* MMC support                  */
137 #define CONFIG_CMD_EEPROM
138 #define CONFIG_CMD_IMI          /* iminfo                       */
139 #undef CONFIG_CMD_IMLS          /* List all found images        */
140 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
141 #define CONFIG_CMD_NFS          /* NFS support                  */
142 #define CONFIG_CMD_DHCP
143 #define CONFIG_CMD_PING
144 #define CONFIG_CMD_FPGA
145
146 #define CONFIG_HARD_I2C                 1
147 #define CONFIG_SYS_I2C_SPEED            100000
148 #define CONFIG_SYS_I2C_SLAVE            0
149 #define CONFIG_DRIVER_OMAP34XX_I2C      1
150 #define CONFIG_I2C_MULTI_BUS            1
151
152 /*
153  * TWL4030
154  */
155 #define CONFIG_TWL4030_POWER            1
156
157 /* Environment information */
158 #undef CONFIG_ENV_OVERWRITE     /* disallow overwriting serial# and ethaddr */
159 #define CONFIG_BOOTDELAY                0
160 #define CONFIG_ZERO_BOOTDELAY_CHECK
161 #define CONFIG_AUTOBOOT_KEYED
162 #define CONFIG_AUTOBOOT_STOP_STR "S"
163
164 #define CONFIG_EXTRA_ENV_SETTINGS \
165         "silent=true\0" \
166         "loadaddr=0x82000000\0" \
167         "usbtty=cdc_acm\0" \
168         "console=ttyO0,115200n8\0" \
169         "mpurate=600\0" \
170         "vram=12M\0" \
171         "dvimode=1024x768-24@60\0" \
172         "defaultdisplay=dvi\0" \
173         "loadfpga=if ext2load mmc ${mmcdev}:2 ${loadaddr} "\
174                 "/lib/firmware/mvblx/${fpgafilename}; then " \
175                         "fpga load 0 ${loadaddr} ${filesize}; " \
176                 "fi;\0" \
177         "mmcdev=0\0" \
178         "mmcroot=/dev/mmcblk0p2 rw\0" \
179         "mmcrootfstype=ext3 rootwait\0" \
180         "mmcargs=setenv bootargs console=${console} " \
181                 "mpurate=${mpurate} " \
182                 "vram=${vram} " \
183                 "omapfb.mode=dvi:${dvimode} " \
184                 "omapfb.debug=y " \
185                 "omapdss.def_disp=${defaultdisplay} " \
186                 "root=${mmcroot} " \
187                 "rootfstype=${mmcrootfstype} " \
188                 "mvfw.fpgavers=${fpgavers} " \
189                 "${cmdline_suffix}\0" \
190         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
191         "importbootenv=echo Importing environment from mmc ...; " \
192                 "env import -t $loadaddr $filesize\0" \
193         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
194         "mmcboot=echo Booting from mmc ...; " \
195                 "run mmcargs; " \
196                 "bootm ${loadaddr}\0" \
197         "mmcbootcmd= " \
198                 "echo Trying mmc${mmcdev}; " \
199                 "mmc dev ${mmcdev}; " \
200                 "if mmc rescan; then " \
201                         "setenv mmcroot /dev/mmcblk${mmcdev}p2 rw; " \
202                         "echo SD/MMC found on device ${mmcdev};" \
203                         "if run loadbootenv; then " \
204                            "echo Loading boot environment from mmc${mmcdev}; " \
205                            "run importbootenv; " \
206                         "fi;" \
207                         "run loadfpga; " \
208                         "if test -n $uenvcmd; then " \
209                                 "echo Running uenvcmd ...;" \
210                                 "run uenvcmd;" \
211                         "fi;" \
212                         "if run loaduimage; then " \
213                                 "run mmcboot; " \
214                         "fi;" \
215                 "fi\0"
216
217 #define CONFIG_BOOTCOMMAND \
218         "setenv mmcdev 1;" \
219         "run mmcbootcmd || " \
220         "setenv mmcdev 0;" \
221         "run mmcbootcmd"
222
223
224 #define CONFIG_AUTO_COMPLETE            1
225 /*
226  * Miscellaneous configurable options
227  */
228 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
229 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
230 #define CONFIG_SYS_PROMPT               "mvblx # "
231 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
232 /* Print Buffer Size */
233 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
234                                         sizeof(CONFIG_SYS_PROMPT) + 16)
235 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
236 /* Boot Argument Buffer Size */
237 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
238
239 #define CONFIG_SYS_ALT_MEMTEST      1 /* alternative memtest with looping */
240 #define CONFIG_SYS_MEMTEST_START        (0x82000000)    /* memtest works on */
241 #define CONFIG_SYS_MEMTEST_END          (0x9dffffff)    /* end = 448 MB */
242 #define CONFIG_SYS_MEMTEST_SCRATCH      (0x81000000)    /* dummy address */
243
244 /* default load address */
245 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
246
247 /*
248  * OMAP3 has 12 GP timers, they can be driven by the system clock
249  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
250  * This rate is divided by a local divisor.
251  */
252 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
253 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
254 #define CONFIG_SYS_HZ                   1000
255
256 /*-----------------------------------------------------------------------
257  * Physical Memory Map
258  */
259 #define CONFIG_NR_DRAM_BANKS    1
260 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
261 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
262
263 #define CONFIG_ENV_IS_NOWHERE   1
264
265 /*----------------------------------------------------------------------------
266  * Network Subsystem (SMSC9211 Ethernet from SMSC9118 family)
267  *----------------------------------------------------------------------------
268  */
269 #if defined(CONFIG_CMD_NET)
270   #define CONFIG_SMC911X                1
271   #define CONFIG_SMC911X_32_BIT
272   #define CONFIG_SMC911X_BASE     0x2C000000
273 #endif /* (CONFIG_CMD_NET) */
274
275 #define CONFIG_FPGA_COUNT       1
276 #define CONFIG_FPGA          CONFIG_SYS_ALTERA_CYCLON2
277 #define CONFIG_FPGA_ALTERA
278 #define CONFIG_FPGA_CYCLON2
279 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
280 #define CONFIG_SYS_FPGA_DONT_USE_CONF_DONE
281
282 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 0xA0>>1 */
283 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
284 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4  /* 2^4 = 16-byte pages */
285 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
286 #define CONFIG_SYS_EEPROM_SIZE 256 /* Bytes */
287 #define CONFIG_ID_EEPROM
288 #define CONFIG_SYS_EEPROM_BUS_NUM       2
289
290 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
291 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
292 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
293 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
294                                          CONFIG_SYS_INIT_RAM_SIZE - \
295                                          GENERATED_GBL_DATA_SIZE)
296
297 #define CONFIG_OMAP3_SPI
298
299 #define CONFIG_SYS_CACHELINE_SIZE       64
300
301 #endif /* __CONFIG_H */