include/configs/redwood.h

   1 /*
   2  * Configuration for AMCC 460SX Ref (redwood)
   3  *
   4  * (C) Copyright 2008
   5  * Feng Kan, Applied Micro Circuits Corp., fkan@amcc.com
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 /*-----------------------------------------------------------------------
  13  * High Level Configuration Options
  14  *----------------------------------------------------------------------*/
  15 #define CONFIG_4xx                      1       /* ... PPC4xx family    */
  16 #define CONFIG_440                      1       /* ... PPC460 family    */
  17 #define CONFIG_460SX                    1       /* ... PPC460 family    */
  18 #define CONFIG_BOARD_EARLY_INIT_F       1       /* Call board_pre_init  */
  19
  20 #define CONFIG_SYS_TEXT_BASE    0xfffb0000
  21
  22 /*-----------------------------------------------------------------------
  23  * Include common defines/options for all AMCC boards
  24  *----------------------------------------------------------------------*/
  25 #define CONFIG_HOSTNAME         redwood
  26
  27 #include "amcc-common.h"
  28
  29 #define CONFIG_SYS_CLK_FREQ     33333333        /* external freq to pll */
  30
  31 /*-----------------------------------------------------------------------
  32  * Base addresses -- Note these are effective addresses where the
  33  * actual resources get mapped (not physical addresses)
  34  *----------------------------------------------------------------------*/
  35 #define CONFIG_SYS_FLASH_BASE           0xfff00000      /* start of FLASH       */
  36 #define CONFIG_SYS_ISRAM_BASE           0x90000000      /* internal SRAM        */
  37
  38 #define CONFIG_SYS_PCI_BASE             0xd0000000      /* internal PCI regs    */
  39
  40 #define CONFIG_SYS_PCIE_MEMBASE 0x90000000      /* mapped PCIe memory   */
  41 #define CONFIG_SYS_PCIE0_MEMBASE        0x90000000      /* mapped PCIe memory   */
  42 #define CONFIG_SYS_PCIE1_MEMBASE        0xa0000000      /* mapped PCIe memory   */
  43 #define CONFIG_SYS_PCIE_MEMSIZE 0x01000000
  44
  45 #define CONFIG_SYS_PCIE0_XCFGBASE       0xb0000000
  46 #define CONFIG_SYS_PCIE1_XCFGBASE       0xb2000000
  47 #define CONFIG_SYS_PCIE2_XCFGBASE       0xb4000000
  48 #define CONFIG_SYS_PCIE0_CFGBASE        0xb6000000
  49 #define CONFIG_SYS_PCIE1_CFGBASE        0xb8000000
  50 #define CONFIG_SYS_PCIE2_CFGBASE        0xba000000
  51
  52 /* PCIe mapped UTL registers */
  53 #define CONFIG_SYS_PCIE0_REGBASE   0xd0000000
  54 #define CONFIG_SYS_PCIE1_REGBASE   0xd0010000
  55 #define CONFIG_SYS_PCIE2_REGBASE   0xd0020000
  56
  57 /* System RAM mapped to PCI space */
  58 #define CONFIG_PCI_SYS_MEM_BUS  CONFIG_SYS_SDRAM_BASE
  59 #define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE
  60 #define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
  61
  62 #define CONFIG_SYS_FPGA_BASE            0xe2000000      /* epld                 */
  63 #define CONFIG_SYS_OPER_FLASH           0xe7000000      /* SRAM - OPER Flash    */
  64
  65 /*
  66  * Serial Port
  67  */
  68 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
  69
  70 /*-----------------------------------------------------------------------
  71  * Initial RAM & stack pointer (placed in internal SRAM)
  72  *----------------------------------------------------------------------*/
  73 #define CONFIG_SYS_TEMP_STACK_OCM       1
  74 #define CONFIG_SYS_OCM_DATA_ADDR        CONFIG_SYS_ISRAM_BASE
  75 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_ISRAM_BASE   /* Initial RAM address  */
  76 #define CONFIG_SYS_INIT_RAM_SIZE        0x2000          /* Size of used area in RAM */
  77
  78 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  79 #define CONFIG_SYS_INIT_SP_OFFSET       (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
  80
  81 /*-----------------------------------------------------------------------
  82  * DDR SDRAM
  83  *----------------------------------------------------------------------*/
  84 #define CONFIG_SPD_EEPROM       1       /* Use SPD EEPROM for setup     */
  85 #define CONFIG_DDR_ECC          1       /* with ECC support             */
  86
  87 #define CONFIG_SYS_SPD_MAX_DIMMS        2
  88
  89 /* SPD i2c spd addresses */
  90 #define SPD_EEPROM_ADDRESS     {IIC0_DIMM0_ADDR, IIC0_DIMM1_ADDR}
  91 #define IIC0_DIMM0_ADDR                0x53
  92 #define IIC0_DIMM1_ADDR                0x52
  93
  94 /*-----------------------------------------------------------------------
  95  * I2C
  96  *----------------------------------------------------------------------*/
  97 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           400000
  98
  99 #define IIC0_BOOTPROM_ADDR      0x50
 100 #define IIC0_ALT_BOOTPROM_ADDR  0x54
 101
 102 /* Don't probe these addrs */
 103 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
 104
 105 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2       /* Bytes of address             */
 106
 107 /*-----------------------------------------------------------------------
 108  * Environment
 109  *----------------------------------------------------------------------*/
 110 #undef  CONFIG_ENV_IS_IN_NVRAM          /* ... not in NVRAM             */
 111 #define CONFIG_ENV_IS_IN_FLASH  1       /* Environment uses flash       */
 112 #undef  CONFIG_ENV_IS_IN_EEPROM         /* ... not in EEPROM            */
 113
 114 #define CONFIG_PREBOOT  "echo;" \
 115         "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
 116         "echo"
 117
 118 #undef  CONFIG_BOOTARGS
 119
 120 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 121         CONFIG_AMCC_DEF_ENV                                             \
 122         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
 123         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
 124         CONFIG_AMCC_DEF_ENV_NAND_UPD                                    \
 125         "kernel_addr=fc000000\0"                                        \
 126         "fdt_addr=fc1e0000\0"                                           \
 127         "ramdisk_addr=fc200000\0"                                       \
 128         ""
 129
 130 /*----------------------------------------------------------------------------+
 131 | Commands in addition to amcc-common.h
 132 +----------------------------------------------------------------------------*/
 133 #define CONFIG_CMD_SDRAM
 134
 135 #define CONFIG_BOOTCOMMAND      "run flash_self"
 136
 137 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
 138
 139 #define CONFIG_IBM_EMAC4_V4     1
 140 #define CONFIG_PHY_RESET        1       /* reset phy upon startup       */
 141 #define CONFIG_PHY_RESET_DELAY  1000
 142 #define CONFIG_M88E1141_PHY     1       /* Enable phy */
 143 #define CONFIG_PHY_GIGE         1       /* Include GbE speed/duplex detection */
 144
 145 #define CONFIG_HAS_ETH0
 146 #define CONFIG_HAS_ETH1
 147 #define CONFIG_PHY_ADDR         0       /* PHY address, See schematics  */
 148 #define CONFIG_PHY1_ADDR        1       /* PHY address, See schematics  */
 149
 150 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 151
 152 /*-----------------------------------------------------------------------
 153  * FLASH related
 154  *----------------------------------------------------------------------*/
 155 #define CONFIG_SYS_FLASH_CFI                    /* The flash is CFI compatible  */
 156 #define CONFIG_FLASH_CFI_DRIVER         /* Use common CFI driver        */
 157 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1        /* Use AMD (Spansion) reset cmd */
 158
 159 #define CONFIG_SYS_MAX_FLASH_BANKS      3       /* number of banks              */
 160 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* sectors per device           */
 161
 162 #undef  CONFIG_SYS_FLASH_CHECKSUM
 163 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms) */
 164 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms) */
 165
 166 #ifdef CONFIG_ENV_IS_IN_FLASH
 167 #define CONFIG_ENV_SECT_SIZE    0x10000 /* size of one complete sector  */
 168 #define CONFIG_ENV_ADDR         0xfffa0000
 169 #define CONFIG_ENV_SIZE         0x10000 /* Size of Environment vars     */
 170 #endif /* CONFIG_ENV_IS_IN_FLASH */
 171
 172 /*---------------------------------------------------------------------------*/
 173
 174 #endif  /* __CONFIG_H */