include/configs/sama5d3xek.h

   1 /*
   2  * Configuation settings for the SAMA5D3xEK board.
   3  *
   4  * Copyright (C) 2012 - 2013 Atmel
   5  *
   6  * based on at91sam9m10g45ek.h by:
   7  * Stelian Pop <stelian@popies.net>
   8  * Lead Tech Design <www.leadtechdesign.com>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #include <asm/hardware.h>
  17
  18 #define CONFIG_SYS_TEXT_BASE            0x26f00000
  19
  20 /* ARM asynchronous clock */
  21 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  22 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
  23
  24 #define CONFIG_AT91FAMILY
  25 #define CONFIG_ARCH_CPU_INIT
  26
  27 #ifndef CONFIG_SPL_BUILD
  28 #define CONFIG_SKIP_LOWLEVEL_INIT
  29 #endif
  30
  31 #define CONFIG_BOARD_EARLY_INIT_F
  32 #define CONFIG_DISPLAY_CPUINFO
  33
  34 #define CONFIG_CMD_BOOTZ
  35 #define CONFIG_OF_LIBFDT                /* Device Tree support */
  36
  37 /* general purpose I/O */
  38 #define CONFIG_AT91_GPIO
  39
  40 /* serial console */
  41 #define CONFIG_ATMEL_USART
  42 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  43 #define CONFIG_USART_ID                 ATMEL_ID_DBGU
  44
  45 /*
  46  * This needs to be defined for the OHCI code to work but it is defined as
  47  * ATMEL_ID_UHPHS in the CPU specific header files.
  48  */
  49 #define ATMEL_ID_UHP                    ATMEL_ID_UHPHS
  50
  51 /*
  52  * Specify the clock enable bit in the PMC_SCER register.
  53  */
  54 #define ATMEL_PMC_UHP                   AT91SAM926x_PMC_UHP
  55
  56 /* LCD */
  57 #define CONFIG_LCD
  58 #define LCD_BPP                         LCD_COLOR16
  59 #define LCD_OUTPUT_BPP                  24
  60 #define CONFIG_LCD_LOGO
  61 #define CONFIG_LCD_INFO
  62 #define CONFIG_LCD_INFO_BELOW_LOGO
  63 #define CONFIG_SYS_WHITE_ON_BLACK
  64 #define CONFIG_ATMEL_HLCD
  65 #define CONFIG_ATMEL_LCD_RGB565
  66 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  67
  68 /* board specific (not enough SRAM) */
  69 #define CONFIG_SAMA5D3_LCD_BASE         0x23E00000
  70
  71 #define CONFIG_BOOTDELAY                3
  72
  73 /*
  74  * BOOTP options
  75  */
  76 #define CONFIG_BOOTP_BOOTFILESIZE
  77 #define CONFIG_BOOTP_BOOTPATH
  78 #define CONFIG_BOOTP_GATEWAY
  79 #define CONFIG_BOOTP_HOSTNAME
  80
  81 /* No NOR flash */
  82 #define CONFIG_SYS_NO_FLASH
  83
  84 /*
  85  * Command line configuration.
  86  */
  87 #include <config_cmd_default.h>
  88 #undef CONFIG_CMD_FPGA
  89 #undef CONFIG_CMD_IMI
  90 #undef CONFIG_CMD_LOADS
  91 #define CONFIG_CMD_PING
  92 #define CONFIG_CMD_DHCP
  93
  94 /* SDRAM */
  95 #define CONFIG_NR_DRAM_BANKS            1
  96 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
  97 #define CONFIG_SYS_SDRAM_SIZE           0x20000000
  98
  99 #ifdef CONFIG_SPL_BUILD
 100 #define CONFIG_SYS_INIT_SP_ADDR         0x310000
 101 #else
 102 #define CONFIG_SYS_INIT_SP_ADDR \
 103         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
 104 #endif
 105
 106 /* SerialFlash */
 107 #define CONFIG_CMD_SF
 108
 109 #ifdef CONFIG_CMD_SF
 110 #define CONFIG_ATMEL_SPI
 111 #define CONFIG_SPI_FLASH
 112 #define CONFIG_SPI_FLASH_ATMEL
 113 #define CONFIG_SF_DEFAULT_SPEED         30000000
 114 #endif
 115
 116 /* NAND flash */
 117 #define CONFIG_CMD_NAND
 118
 119 #ifdef CONFIG_CMD_NAND
 120 #define CONFIG_NAND_ATMEL
 121 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 122 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
 123 /* our ALE is AD21 */
 124 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
 125 /* our CLE is AD22 */
 126 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
 127 #define CONFIG_SYS_NAND_ONFI_DETECTION
 128 /* PMECC & PMERRLOC */
 129 #define CONFIG_ATMEL_NAND_HWECC
 130 #define CONFIG_ATMEL_NAND_HW_PMECC
 131 #define CONFIG_PMECC_CAP                4
 132 #define CONFIG_PMECC_SECTOR_SIZE        512
 133 #define CONFIG_CMD_NAND_TRIMFFS
 134 #endif
 135
 136 /* Ethernet Hardware */
 137 #define CONFIG_MACB
 138 #define CONFIG_RMII
 139 #define CONFIG_NET_RETRY_COUNT          20
 140 #define CONFIG_MACB_SEARCH_PHY
 141 #define CONFIG_RGMII
 142 #define CONFIG_CMD_MII
 143 #define CONFIG_PHYLIB
 144 #define CONFIG_PHY_MICREL
 145 #define CONFIG_PHY_MICREL_KSZ9021
 146
 147 /* MMC */
 148 #define CONFIG_CMD_MMC
 149
 150 #ifdef CONFIG_CMD_MMC
 151 #define CONFIG_MMC
 152 #define CONFIG_GENERIC_MMC
 153 #define CONFIG_GENERIC_ATMEL_MCI
 154 #define ATMEL_BASE_MMCI                 ATMEL_BASE_MCI0
 155 #endif
 156
 157 /* USB */
 158 #define CONFIG_CMD_USB
 159
 160 #ifdef CONFIG_CMD_USB
 161 #define CONFIG_USB_ATMEL
 162 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
 163 #define CONFIG_USB_OHCI_NEW
 164 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 165 #define CONFIG_SYS_USB_OHCI_REGS_BASE           ATMEL_BASE_OHCI
 166 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "sama5d3"
 167 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
 168 #define CONFIG_DOS_PARTITION
 169 #define CONFIG_USB_STORAGE
 170 #endif
 171
 172 /* USB device */
 173 #define CONFIG_USB_GADGET
 174 #define CONFIG_USB_GADGET_DUALSPEED
 175 #define CONFIG_USB_GADGET_ATMEL_USBA
 176 #define CONFIG_USB_ETHER
 177 #define CONFIG_USB_ETH_RNDIS
 178 #define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D3xEK"
 179
 180 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
 181 #define CONFIG_CMD_FAT
 182 #endif
 183
 184 #define CONFIG_SYS_LOAD_ADDR                    0x22000000 /* load address */
 185
 186 #ifdef CONFIG_SYS_USE_SERIALFLASH
 187 /* bootstrap + u-boot + env + linux in serial flash */
 188 #define CONFIG_ENV_IS_IN_SPI_FLASH
 189 #define CONFIG_ENV_OFFSET       0x5000
 190 #define CONFIG_ENV_SIZE         0x3000
 191 #define CONFIG_ENV_SECT_SIZE    0x1000
 192 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
 193                                 "sf read 0x22000000 0x42000 0x300000; " \
 194                                 "bootm 0x22000000"
 195 #elif CONFIG_SYS_USE_NANDFLASH
 196 /* bootstrap + u-boot + env in nandflash */
 197 #define CONFIG_ENV_IS_IN_NAND
 198 #define CONFIG_ENV_OFFSET               0xc0000
 199 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 200 #define CONFIG_ENV_SIZE                 0x20000
 201 #define CONFIG_BOOTCOMMAND      "nand read 0x21000000 0x180000 0x80000;" \
 202                                 "nand read 0x22000000 0x200000 0x600000;" \
 203                                 "bootm 0x22000000 - 0x21000000"
 204 #elif CONFIG_SYS_USE_MMC
 205 /* bootstrap + u-boot + env in sd card */
 206 #define CONFIG_ENV_IS_IN_MMC
 207 #define CONFIG_ENV_OFFSET       0x2000
 208 #define CONFIG_ENV_SIZE         0x1000
 209 #define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x21000000 dtb; " \
 210                                 "fatload mmc 0:1 0x22000000 uImage; " \
 211                                 "bootm 0x22000000 - 0x21000000"
 212 #define CONFIG_SYS_MMC_ENV_DEV  0
 213 #else
 214 #define CONFIG_ENV_IS_NOWHERE
 215 #endif
 216
 217 #ifdef CONFIG_SYS_USE_MMC
 218 #define CONFIG_BOOTARGS                                                 \
 219         "console=ttyS0,115200 earlyprintk "                             \
 220         "root=/dev/mmcblk0p2 rw rootwait"
 221 #else
 222 #define CONFIG_BOOTARGS                                                 \
 223         "console=ttyS0,115200 earlyprintk "                             \
 224         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
 225         "256K(env),256k(evn_redundent),256k(spare),"                    \
 226         "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
 227         "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
 228 #endif
 229
 230 #define CONFIG_BAUDRATE                 115200
 231
 232 #define CONFIG_SYS_PROMPT               "U-Boot> "
 233 #define CONFIG_SYS_CBSIZE               256
 234 #define CONFIG_SYS_MAXARGS              16
 235 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 236                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 237 #define CONFIG_SYS_LONGHELP
 238 #define CONFIG_CMDLINE_EDITING
 239 #define CONFIG_AUTO_COMPLETE
 240 #define CONFIG_SYS_HUSH_PARSER
 241
 242 /* Size of malloc() pool */
 243 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)
 244
 245 /* SPL */
 246 #define CONFIG_SPL
 247 #define CONFIG_SPL_FRAMEWORK
 248 #define CONFIG_SPL_TEXT_BASE            0x300000
 249 #define CONFIG_SPL_MAX_SIZE             0x10000
 250 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
 251 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 252 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
 253 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 254
 255 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 256 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 257 #define CONFIG_SPL_GPIO_SUPPORT
 258 #define CONFIG_SPL_SERIAL_SUPPORT
 259
 260 #define CONFIG_SPL_BOARD_INIT
 261 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 262
 263 #ifdef CONFIG_SYS_USE_MMC
 264 #define CONFIG_SPL_LDSCRIPT             arch/arm/cpu/at91-common/u-boot-spl.lds
 265 #define CONFIG_SPL_MMC_SUPPORT
 266 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x400
 267 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
 268 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
 269 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
 270 #define CONFIG_SPL_FAT_SUPPORT
 271 #define CONFIG_SPL_LIBDISK_SUPPORT
 272
 273 #elif CONFIG_SYS_USE_NANDFLASH
 274 #define CONFIG_SPL_NAND_SUPPORT
 275 #define CONFIG_SPL_NAND_DRIVERS
 276 #define CONFIG_SPL_NAND_BASE
 277 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 278 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 279 #define CONFIG_SYS_NAND_PAGE_SIZE       0x800
 280 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 281 #define CONFIG_SYS_NAND_OOBSIZE         64
 282 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x20000
 283 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
 284
 285 #elif CONFIG_SYS_USE_SERIALFLASH
 286 #define CONFIG_SPL_SPI_SUPPORT
 287 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 288 #define CONFIG_SPL_SPI_LOAD
 289 #define CONFIG_SPL_SPI_BUS              0
 290 #define CONFIG_SPL_SPI_CS               0
 291 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x8400
 292
 293 #endif
 294
 295 #endif