include/configs/sama5d3xek.h

   1 /*
   2  * Configuation settings for the SAMA5D3xEK board.
   3  *
   4  * Copyright (C) 2012 - 2013 Atmel
   5  *
   6  * based on at91sam9m10g45ek.h by:
   7  * Stelian Pop <stelian@popies.net>
   8  * Lead Tech Design <www.leadtechdesign.com>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #include <asm/hardware.h>
  17
  18 #define CONFIG_SYS_TEXT_BASE            0x26f00000
  19
  20 /* ARM asynchronous clock */
  21 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  22 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
  23 #define CONFIG_SYS_HZ                   1000
  24
  25 #define CONFIG_AT91FAMILY
  26 #define CONFIG_ARCH_CPU_INIT
  27
  28 #define CONFIG_SKIP_LOWLEVEL_INIT
  29 #define CONFIG_BOARD_EARLY_INIT_F
  30 #define CONFIG_DISPLAY_CPUINFO
  31
  32 #define CONFIG_CMD_BOOTZ
  33 #define CONFIG_OF_LIBFDT                /* Device Tree support */
  34
  35 /* general purpose I/O */
  36 #define CONFIG_AT91_GPIO
  37
  38 /* serial console */
  39 #define CONFIG_ATMEL_USART
  40 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  41 #define CONFIG_USART_ID                 ATMEL_ID_DBGU
  42
  43 /*
  44  * This needs to be defined for the OHCI code to work but it is defined as
  45  * ATMEL_ID_UHPHS in the CPU specific header files.
  46  */
  47 #define ATMEL_ID_UHP                    ATMEL_ID_UHPHS
  48
  49 /*
  50  * Specify the clock enable bit in the PMC_SCER register.
  51  */
  52 #define ATMEL_PMC_UHP                   AT91SAM926x_PMC_UHP
  53
  54 /* LCD */
  55 #define CONFIG_LCD
  56 #define LCD_BPP                         LCD_COLOR16
  57 #define LCD_OUTPUT_BPP                  24
  58 #define CONFIG_LCD_LOGO
  59 #define CONFIG_LCD_INFO
  60 #define CONFIG_LCD_INFO_BELOW_LOGO
  61 #define CONFIG_SYS_WHITE_ON_BLACK
  62 #define CONFIG_ATMEL_HLCD
  63 #define CONFIG_ATMEL_LCD_RGB565
  64 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  65
  66 /* board specific (not enough SRAM) */
  67 #define CONFIG_SAMA5D3_LCD_BASE         0x23E00000
  68
  69 #define CONFIG_BOOTDELAY                3
  70
  71 /*
  72  * BOOTP options
  73  */
  74 #define CONFIG_BOOTP_BOOTFILESIZE
  75 #define CONFIG_BOOTP_BOOTPATH
  76 #define CONFIG_BOOTP_GATEWAY
  77 #define CONFIG_BOOTP_HOSTNAME
  78
  79 /* No NOR flash */
  80 #define CONFIG_SYS_NO_FLASH
  81
  82 /*
  83  * Command line configuration.
  84  */
  85 #include <config_cmd_default.h>
  86 #undef CONFIG_CMD_FPGA
  87 #undef CONFIG_CMD_IMI
  88 #undef CONFIG_CMD_LOADS
  89 #define CONFIG_CMD_PING
  90 #define CONFIG_CMD_DHCP
  91
  92 /* SDRAM */
  93 #define CONFIG_NR_DRAM_BANKS            1
  94 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
  95 #define CONFIG_SYS_SDRAM_SIZE           0x20000000
  96
  97 #define CONFIG_SYS_INIT_SP_ADDR \
  98         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  99
 100 /* SerialFlash */
 101 #define CONFIG_CMD_SF
 102
 103 #ifdef CONFIG_CMD_SF
 104 #define CONFIG_ATMEL_SPI
 105 #define CONFIG_SPI_FLASH
 106 #define CONFIG_SPI_FLASH_ATMEL
 107 #define CONFIG_SF_DEFAULT_SPEED         30000000
 108 #endif
 109
 110 /* NAND flash */
 111 #define CONFIG_CMD_NAND
 112
 113 #ifdef CONFIG_CMD_NAND
 114 #define CONFIG_NAND_ATMEL
 115 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 116 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
 117 /* our ALE is AD21 */
 118 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
 119 /* our CLE is AD22 */
 120 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
 121 #define CONFIG_SYS_NAND_ONFI_DETECTION
 122 /* PMECC & PMERRLOC */
 123 #define CONFIG_ATMEL_NAND_HWECC
 124 #define CONFIG_ATMEL_NAND_HW_PMECC
 125 #define CONFIG_PMECC_CAP                4
 126 #define CONFIG_PMECC_SECTOR_SIZE        512
 127 #define CONFIG_CMD_NAND_TRIMFFS
 128 #endif
 129
 130 /* Ethernet Hardware */
 131 #define CONFIG_MACB
 132 #define CONFIG_RMII
 133 #define CONFIG_NET_MULTI
 134 #define CONFIG_NET_RETRY_COUNT          20
 135 #define CONFIG_MACB_SEARCH_PHY
 136 #define CONFIG_RGMII
 137 #define CONFIG_CMD_MII
 138 #define CONFIG_PHYLIB
 139 #define CONFIG_PHY_MICREL
 140 #define CONFIG_PHY_MICREL_KSZ9021
 141
 142 /* MMC */
 143 #define CONFIG_CMD_MMC
 144
 145 #ifdef CONFIG_CMD_MMC
 146 #define CONFIG_MMC
 147 #define CONFIG_GENERIC_MMC
 148 #define CONFIG_GENERIC_ATMEL_MCI
 149 #define ATMEL_BASE_MMCI                 ATMEL_BASE_MCI0
 150 #endif
 151
 152 /* USB */
 153 #define CONFIG_CMD_USB
 154
 155 #ifdef CONFIG_CMD_USB
 156 #define CONFIG_USB_ATMEL
 157 #define CONFIG_USB_OHCI_NEW
 158 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 159 #define CONFIG_SYS_USB_OHCI_REGS_BASE           ATMEL_BASE_OHCI
 160 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "sama5d3"
 161 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
 162 #define CONFIG_DOS_PARTITION
 163 #define CONFIG_USB_STORAGE
 164 #endif
 165
 166 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
 167 #define CONFIG_CMD_FAT
 168 #endif
 169
 170 #define CONFIG_SYS_LOAD_ADDR                    0x22000000 /* load address */
 171
 172 #ifdef CONFIG_SYS_USE_SERIALFLASH
 173 /* bootstrap + u-boot + env + linux in serial flash */
 174 #define CONFIG_ENV_IS_IN_SPI_FLASH
 175 #define CONFIG_ENV_OFFSET       0x5000
 176 #define CONFIG_ENV_SIZE         0x3000
 177 #define CONFIG_ENV_SECT_SIZE    0x1000
 178 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
 179                                 "sf read 0x22000000 0x42000 0x300000; " \
 180                                 "bootm 0x22000000"
 181 #elif CONFIG_SYS_USE_NANDFLASH
 182 /* bootstrap + u-boot + env in nandflash */
 183 #define CONFIG_ENV_IS_IN_NAND
 184 #define CONFIG_ENV_OFFSET               0xc0000
 185 #define CONFIG_ENV_OFFSET_REDUND        0x100000
 186 #define CONFIG_ENV_SIZE                 0x20000
 187 #define CONFIG_BOOTCOMMAND      "nand read 0x21000000 0x180000 0x80000;" \
 188                                 "nand read 0x22000000 0x200000 0x600000;" \
 189                                 "bootm 0x22000000 - 0x21000000"
 190 #elif CONFIG_SYS_USE_MMC
 191 /* bootstrap + u-boot + env in sd card */
 192 #define CONFIG_ENV_IS_IN_MMC
 193 #define CONFIG_ENV_OFFSET       0x2000
 194 #define CONFIG_ENV_SIZE         0x1000
 195 #define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x21000000 dtb; " \
 196                                 "fatload mmc 0:1 0x22000000 uImage; " \
 197                                 "bootm 0x22000000 - 0x21000000"
 198 #define CONFIG_SYS_MMC_ENV_DEV  0
 199 #else
 200 #define CONFIG_ENV_IS_NOWHERE
 201 #endif
 202
 203 #ifdef CONFIG_SYS_USE_MMC
 204 #define CONFIG_BOOTARGS                                                 \
 205         "console=ttyS0,115200 earlyprintk "                             \
 206         "root=/dev/mmcblk0p2 rw rootwait"
 207 #else
 208 #define CONFIG_BOOTARGS                                                 \
 209         "console=ttyS0,115200 earlyprintk "                             \
 210         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
 211         "256K(env),256k(evn_redundent),256k(spare),"                    \
 212         "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
 213         "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
 214 #endif
 215
 216 #define CONFIG_BAUDRATE                 115200
 217
 218 #define CONFIG_SYS_PROMPT               "U-Boot> "
 219 #define CONFIG_SYS_CBSIZE               256
 220 #define CONFIG_SYS_MAXARGS              16
 221 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 222                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 223 #define CONFIG_SYS_LONGHELP
 224 #define CONFIG_CMDLINE_EDITING
 225 #define CONFIG_AUTO_COMPLETE
 226 #define CONFIG_SYS_HUSH_PARSER
 227
 228 /* Size of malloc() pool */
 229 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)
 230
 231 #endif