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1 /*
2  * Copyright (C) 2013 Samsung Electronics
3  * Sanghee Kim <sh0130.kim@samsung.com>
4  * Piotr Wilczek <p.wilczek@samsung.com>
5  *
6  * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 /*
15  * High Level Configuration Options
16  * (easy to change)
17  */
18 #define CONFIG_SAMSUNG          /* in a SAMSUNG core */
19 #define CONFIG_S5P              /* which is in a S5P Family */
20 #define CONFIG_EXYNOS4          /* which is in a EXYNOS4XXX */
21 #define CONFIG_TIZEN            /* TIZEN lib */
22
23 #include <asm/arch/cpu.h>               /* get chip and board defs */
24
25 #define CONFIG_ARCH_CPU_INIT
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
28
29 #define CONFIG_SKIP_LOWLEVEL_INIT
30
31 #define CONFIG_SYS_CACHELINE_SIZE       32
32
33 #ifndef CONFIG_SYS_L2CACHE_OFF
34 #define CONFIG_SYS_L2_PL310
35 #define CONFIG_SYS_PL310_BASE   0x10502000
36 #endif
37
38 #define CONFIG_NR_DRAM_BANKS    4
39 #define PHYS_SDRAM_1            0x40000000      /* LDDDR2 DMC 0 */
40 #define PHYS_SDRAM_1_SIZE       (256 << 20)     /* 256 MB in CS 0 */
41 #define PHYS_SDRAM_2            0x50000000      /* LPDDR2 DMC 1 */
42 #define PHYS_SDRAM_2_SIZE       (256 << 20)     /* 256 MB in CS 0 */
43 #define PHYS_SDRAM_3            0x60000000      /* LPDDR2 DMC 1 */
44 #define PHYS_SDRAM_3_SIZE       (256 << 20)     /* 256 MB in CS 0 */
45 #define PHYS_SDRAM_4            0x70000000      /* LPDDR2 DMC 1 */
46 #define PHYS_SDRAM_4_SIZE       (256 << 20)     /* 256 MB in CS 0 */
47 #define PHYS_SDRAM_END          0x80000000
48
49 #define CONFIG_SYS_MEM_TOP_HIDE         (1 << 20)       /* ram console */
50
51 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
52 #define CONFIG_SYS_TEXT_BASE            0x78100000
53
54 #define CONFIG_SYS_CLK_FREQ             24000000
55
56 #define CONFIG_SETUP_MEMORY_TAGS
57 #define CONFIG_CMDLINE_TAG
58 #define CONFIG_REVISION_TAG
59
60 /* MACH_TYPE_TRATS2 */
61 #define MACH_TYPE_TRATS2                3765
62 #define CONFIG_MACH_TYPE                MACH_TYPE_TRATS2
63
64 #define CONFIG_DISPLAY_CPUINFO
65
66 #include <asm/sizes.h>
67 /* Size of malloc() pool */
68 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (80 * SZ_1M))
69
70 /* select serial console configuration */
71 #define CONFIG_SERIAL2
72
73 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser    */
74 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
75
76 #define CONFIG_CMDLINE_EDITING
77
78 #define CONFIG_BAUDRATE                 115200
79
80 /* It should define before config_cmd_default.h */
81 #define CONFIG_SYS_NO_FLASH
82
83 /***********************************************************
84  * Command definition
85  ***********************************************************/
86 #include <config_cmd_default.h>
87
88 #undef CONFIG_CMD_ECHO
89 #undef CONFIG_CMD_FPGA
90 #undef CONFIG_CMD_FLASH
91 #undef CONFIG_CMD_IMLS
92 #undef CONFIG_CMD_NAND
93 #undef CONFIG_CMD_MISC
94 #undef CONFIG_CMD_NFS
95 #undef CONFIG_CMD_SOURCE
96 #undef CONFIG_CMD_XIMG
97 #define CONFIG_CMD_CACHE
98 #define CONFIG_CMD_I2C
99 #define CONFIG_CMD_MMC
100 #define CONFIG_CMD_DFU
101 #define CONFIG_CMD_GPT
102 #define CONFIG_CMD_PMIC
103
104 #define CONFIG_BOOTDELAY        3
105 #define CONFIG_ZERO_BOOTDELAY_CHECK
106
107 #define CONFIG_CMD_FAT
108 #define CONFIG_FAT_WRITE
109
110 /* EXT4 */
111 #define CONFIG_CMD_EXT4
112 #define CONFIG_CMD_EXT4_WRITE
113
114 /* USB Composite download gadget - g_dnl */
115 #define CONFIG_USBDOWNLOAD_GADGET
116 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
117 #define CONFIG_DFU_FUNCTION
118 #define CONFIG_DFU_MMC
119
120 /* TIZEN THOR downloader support */
121 #define CONFIG_CMD_THOR_DOWNLOAD
122 #define CONFIG_THOR_FUNCTION
123
124 /* USB Samsung's IDs */
125 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8
126 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601
127 #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
128 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
129 #define CONFIG_G_DNL_MANUFACTURER "Samsung"
130
131 /* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */
132 #undef CONFIG_CMD_NET
133
134 /* MMC */
135 #define CONFIG_GENERIC_MMC
136 #define CONFIG_MMC
137 #define CONFIG_S5P_SDHCI
138 #define CONFIG_SDHCI
139 #define CONFIG_MMC_SDMA
140 #define CONFIG_MMC_DEFAULT_DEV  0
141
142 /* PWM */
143 #define CONFIG_PWM
144
145 #define CONFIG_BOOTARGS         "Please use defined boot"
146 #define CONFIG_BOOTCOMMAND      "run mmcboot"
147 #define CONFIG_DEFAULT_CONSOLE  "console=ttySAC2,115200n8\0"
148
149 #define CONFIG_ENV_OVERWRITE
150 #define CONFIG_SYS_CONSOLE_INFO_QUIET
151 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
152
153 /* Tizen - partitions definitions */
154 #define PARTS_CSA               "csa"
155 #define PARTS_BOOT              "boot"
156 #define PARTS_MODEM             "modem"
157 #define PARTS_CSC               "csc"
158 #define PARTS_ROOT              "platform"
159 #define PARTS_DATA              "data"
160 #define PARTS_UMS               "ums"
161
162 #define PARTS_DEFAULT \
163         "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
164         "name="PARTS_BOOT",size=64MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
165         "name="PARTS_MODEM",size=100MiB,uuid=${uuid_gpt_"PARTS_MODEM"};" \
166         "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
167         "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
168         "name="PARTS_DATA",size=512MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
169         "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
170
171 #define CONFIG_DFU_ALT \
172         "u-boot mmc 80 800;" \
173         "uImage ext4 0 2;" \
174         "exynos4412-trats2.dtb ext4 0 2;" \
175         ""PARTS_ROOT" part 0 5\0"
176
177 #define CONFIG_EXTRA_ENV_SETTINGS \
178         "bootk=" \
179                 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
180         "updatemmc=" \
181                 "mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \
182                 "mmc boot 0 1 1 0\0" \
183         "updatebackup=" \
184                 "mmc boot 0 1 1 2; mmc write 0x42100000 0 0x200;" \
185                 " mmc boot 0 1 1 0\0" \
186         "updatebootb=" \
187                 "mmc read 0x51000000 0x80 0x200; run updatebackup\0" \
188         "updateuboot=" \
189                 "mmc write 0x50000000 0x80 0x400\0" \
190         "mmcboot=" \
191                 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
192                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
193                 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
194         "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
195         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
196         "verify=n\0" \
197         "rootfstype=ext4\0" \
198         "console=" CONFIG_DEFAULT_CONSOLE \
199         "kernelname=uImage\0" \
200         "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
201                 "${kernelname}\0" \
202         "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
203                 "${fdtfile}\0" \
204         "mmcdev=CONFIG_MMC_DEFAULT_DEV\0" \
205         "mmcbootpart=2\0" \
206         "mmcrootpart=5\0" \
207         "opts=always_resume=1\0" \
208         "partitions=" PARTS_DEFAULT \
209         "dfu_alt_info=" CONFIG_DFU_ALT \
210         "uartpath=ap\0" \
211         "usbpath=ap\0" \
212         "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
213         "consoleoff=set console console=ram; save; reset\0" \
214         "spladdr=0x40000100\0" \
215         "splsize=0x200\0" \
216         "splfile=falcon.bin\0" \
217         "spl_export=" \
218                    "setexpr spl_imgsize ${splsize} + 8 ;" \
219                    "setenv spl_imgsize 0x${spl_imgsize};" \
220                    "setexpr spl_imgaddr ${spladdr} - 8 ;" \
221                    "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
222                    "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
223                    "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
224                    "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
225                    "spl export atags 0x40007FC0;" \
226                    "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
227                    "mw.l ${spl_addr_tmp} ${splsize};" \
228                    "ext4write mmc ${mmcdev}:${mmcbootpart}" \
229                    " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
230                    "setenv spl_imgsize;" \
231                    "setenv spl_imgaddr;" \
232                    "setenv spl_addr_tmp;\0" \
233         "fdtaddr=40800000\0" \
234         "fdtfile=exynos4412-trats2.dtb\0"
235
236 /*
237  * Miscellaneous configurable options
238  */
239 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
240 #define CONFIG_SYS_PROMPT       "Trats2 # "     /* Monitor Command Prompt */
241 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
242 #define CONFIG_SYS_PBSIZE       384             /* Print Buffer Size */
243 #define CONFIG_SYS_MAXARGS      32              /* max number of command args */
244
245 /* Boot Argument Buffer Size */
246 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
247
248 /* memtest works on */
249 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
250 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x5000000)
251 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x4800000)
252
253 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_LOAD_ADDR \
254                                         - GENERATED_GBL_DATA_SIZE)
255
256 /* valid baudrates */
257 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
258
259 #define CONFIG_SYS_MONITOR_BASE         0x00000000
260
261 /*-----------------------------------------------------------------------
262  * FLASH and environment organization
263  */
264
265 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
266
267 #define CONFIG_ENV_IS_IN_MMC
268 #define CONFIG_SYS_MMC_ENV_DEV          CONFIG_MMC_DEFAULT_DEV
269 #define CONFIG_ENV_SIZE                 4096
270 #define CONFIG_ENV_OFFSET               ((32 - 4) << 10) /* 32KiB - 4KiB */
271 #define CONFIG_EFI_PARTITION
272 #define CONFIG_PARTITION_UUIDS
273
274 #define CONFIG_MISC_INIT_R
275 #define CONFIG_BOARD_EARLY_INIT_F
276
277 /* I2C */
278 #include <asm/arch/gpio.h>
279
280 #define CONFIG_SYS_I2C
281 #define CONFIG_SYS_I2C_S3C24X0
282 #define CONFIG_SYS_I2C_S3C24X0_SPEED    100000
283 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0
284 #define CONFIG_MAX_I2C_NUM              8
285 #define CONFIG_SYS_I2C_SOFT
286 #define CONFIG_SYS_I2C_SOFT_SPEED       50000
287 #define CONFIG_SYS_I2C_SOFT_SLAVE       0x00
288 #define I2C_SOFT_DECLARATIONS2
289 #define CONFIG_SYS_I2C_SOFT_SPEED_2     50000
290 #define CONFIG_SYS_I2C_SOFT_SLAVE_2     0x00
291 #define CONFIG_SOFT_I2C_READ_REPEATED_START
292 #define CONFIG_SYS_I2C_INIT_BOARD
293
294 #ifndef __ASSEMBLY__
295 int get_soft_i2c_scl_pin(void);
296 int get_soft_i2c_sda_pin(void);
297 #endif
298 #define CONFIG_SOFT_I2C_GPIO_SCL        get_soft_i2c_scl_pin()
299 #define CONFIG_SOFT_I2C_GPIO_SDA        get_soft_i2c_sda_pin()
300
301 /* POWER */
302 #define CONFIG_POWER
303 #define CONFIG_POWER_I2C
304 #define CONFIG_POWER_MAX77686
305 #define CONFIG_POWER_PMIC_MAX77693
306 #define CONFIG_POWER_MUIC_MAX77693
307 #define CONFIG_POWER_FG_MAX77693
308 #define CONFIG_POWER_BATTERY_TRATS2
309 #define CONFIG_USB_GADGET
310 #define CONFIG_USB_GADGET_S3C_UDC_OTG
311 #define CONFIG_USB_GADGET_DUALSPEED
312 #define CONFIG_USB_GADGET_VBUS_DRAW     2
313 #define CONFIG_USB_CABLE_CHECK
314
315 /* LCD */
316 #define CONFIG_EXYNOS_FB
317 #define CONFIG_LCD
318 #define CONFIG_CMD_BMP
319 #define CONFIG_BMP_32BPP
320 #define CONFIG_FB_ADDR          0x52504000
321 #define CONFIG_S6E8AX0
322 #define CONFIG_EXYNOS_MIPI_DSIM
323 #define CONFIG_VIDEO_BMP_GZIP
324 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 250 * 4) + (1 << 12))
325
326 #define CONFIG_CMD_USB_MASS_STORAGE
327 #define CONFIG_USB_GADGET_MASS_STORAGE
328
329 /* Pass open firmware flat tree */
330 #define CONFIG_OF_LIBFDT    1
331
332 #endif  /* __CONFIG_H */