include/configs/trats2.h

   1 /*
   2  * Copyright (C) 2013 Samsung Electronics
   3  * Sanghee Kim <sh0130.kim@samsung.com>
   4  * Piotr Wilczek <p.wilczek@samsung.com>
   5  *
   6  * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __CONFIG_TRATS2_H
  12 #define __CONFIG_TRATS2_H
  13
  14 #include <configs/exynos4-dt.h>
  15
  16 #define CONFIG_SYS_PROMPT       "Trats2 # "     /* Monitor Command Prompt */
  17
  18
  19 #define CONFIG_TIZEN                    /* TIZEN lib */
  20
  21 #define CONFIG_SYS_L2CACHE_OFF
  22 #ifndef CONFIG_SYS_L2CACHE_OFF
  23 #define CONFIG_SYS_L2_PL310
  24 #define CONFIG_SYS_PL310_BASE   0x10502000
  25 #endif
  26
  27 /* TRATS2 has 4 banks of DRAM */
  28 #define CONFIG_NR_DRAM_BANKS            4
  29 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  30 #define PHYS_SDRAM_1                    CONFIG_SYS_SDRAM_BASE
  31 #define SDRAM_BANK_SIZE                 (256 << 20)     /* 256 MB */
  32 /* memtest works on */
  33 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  34 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
  35 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
  36
  37 #define CONFIG_SYS_TEXT_BASE            0x43e00000
  38
  39 #include <linux/sizes.h>
  40 /* Size of malloc() pool */
  41 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (80 * SZ_1M))
  42
  43 /* select serial console configuration */
  44 #define CONFIG_SERIAL2
  45 #define CONFIG_BAUDRATE                 115200
  46
  47 /* Console configuration */
  48 #define CONFIG_SYS_CONSOLE_INFO_QUIET
  49 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  50
  51 #define CONFIG_BOOTARGS                 "Please use defined boot"
  52 #define CONFIG_BOOTCOMMAND              "run mmcboot"
  53 #define CONFIG_DEFAULT_CONSOLE          "console=ttySAC2,115200n8\0"
  54
  55 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
  56                                         - GENERATED_GBL_DATA_SIZE)
  57
  58 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)       /* ram console */
  59
  60 #define CONFIG_SYS_MONITOR_BASE 0x00000000
  61
  62 #define CONFIG_ENV_IS_IN_MMC
  63 #define CONFIG_SYS_MMC_ENV_DEV          CONFIG_MMC_DEFAULT_DEV
  64 #define CONFIG_ENV_SIZE                 4096
  65 #define CONFIG_ENV_OFFSET               ((32 - 4) << 10) /* 32KiB - 4KiB */
  66
  67 #define CONFIG_ENV_OVERWRITE
  68
  69 #define CONFIG_ENV_VARS_UBOOT_CONFIG
  70 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  71
  72 /* Tizen - partitions definitions */
  73 #define PARTS_CSA               "csa-mmc"
  74 #define PARTS_BOOT              "boot"
  75 #define PARTS_QBOOT             "qboot"
  76 #define PARTS_CSC               "csc"
  77 #define PARTS_ROOT              "platform"
  78 #define PARTS_DATA              "data"
  79 #define PARTS_UMS               "ums"
  80
  81 #define PARTS_DEFAULT \
  82         "uuid_disk=${uuid_gpt_disk};" \
  83         "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
  84         "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
  85         "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
  86         "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
  87         "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
  88         "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
  89         "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
  90
  91 #define CONFIG_DFU_ALT \
  92         "u-boot raw 0x80 0x800;" \
  93         "/uImage ext4 0 2;" \
  94         "/modem.bin ext4 0 2;" \
  95         "/exynos4412-trats2.dtb ext4 0 2;" \
  96         ""PARTS_CSA" part 0 1;" \
  97         ""PARTS_BOOT" part 0 2;" \
  98         ""PARTS_QBOOT" part 0 3;" \
  99         ""PARTS_CSC" part 0 4;" \
 100         ""PARTS_ROOT" part 0 5;" \
 101         ""PARTS_DATA" part 0 6;" \
 102         ""PARTS_UMS" part 0 7;" \
 103         "params.bin raw 0x38 0x8\0"
 104
 105 #define CONFIG_EXTRA_ENV_SETTINGS \
 106         "bootk=" \
 107                 "run loaduimage;" \
 108                 "if run loaddtb; then " \
 109                         "bootm 0x40007FC0 - ${fdtaddr};" \
 110                 "fi;" \
 111                 "bootm 0x40007FC0;\0" \
 112         "updatebackup=" \
 113                 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
 114                 " mmc dev 0 0\0" \
 115         "updatebootb=" \
 116                 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
 117         "mmcboot=" \
 118                 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 119                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
 120                 "run bootk\0" \
 121         "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
 122         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
 123         "verify=n\0" \
 124         "rootfstype=ext4\0" \
 125         "console=" CONFIG_DEFAULT_CONSOLE \
 126         "kernelname=uImage\0" \
 127         "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
 128                 "${kernelname}\0" \
 129         "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
 130                 "${fdtfile}\0" \
 131         "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
 132         "mmcbootpart=2\0" \
 133         "mmcrootpart=5\0" \
 134         "opts=always_resume=1\0" \
 135         "partitions=" PARTS_DEFAULT \
 136         "dfu_alt_info=" CONFIG_DFU_ALT \
 137         "uartpath=ap\0" \
 138         "usbpath=ap\0" \
 139         "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
 140         "consoleoff=set console console=ram; save; reset\0" \
 141         "spladdr=0x40000100\0" \
 142         "splsize=0x200\0" \
 143         "splfile=falcon.bin\0" \
 144         "spl_export=" \
 145                    "setexpr spl_imgsize ${splsize} + 8 ;" \
 146                    "setenv spl_imgsize 0x${spl_imgsize};" \
 147                    "setexpr spl_imgaddr ${spladdr} - 8 ;" \
 148                    "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
 149                    "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
 150                    "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 151                    "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
 152                    "spl export atags 0x40007FC0;" \
 153                    "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
 154                    "mw.l ${spl_addr_tmp} ${splsize};" \
 155                    "ext4write mmc ${mmcdev}:${mmcbootpart}" \
 156                    " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
 157                    "setenv spl_imgsize;" \
 158                    "setenv spl_imgaddr;" \
 159                    "setenv spl_addr_tmp;\0" \
 160         "fdtaddr=40800000\0" \
 161
 162 /* GPT */
 163 #define CONFIG_RANDOM_UUID
 164
 165 /* I2C */
 166 #include <asm/arch/gpio.h>
 167
 168 #define CONFIG_CMD_I2C
 169
 170 #define CONFIG_SYS_I2C
 171 #define CONFIG_SYS_I2C_S3C24X0
 172 #define CONFIG_SYS_I2C_S3C24X0_SPEED    100000
 173 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0
 174 #define CONFIG_MAX_I2C_NUM              8
 175 #define CONFIG_SYS_I2C_SOFT
 176 #define CONFIG_SYS_I2C_SOFT_SPEED       50000
 177 #define CONFIG_SYS_I2C_SOFT_SLAVE       0x00
 178 #define I2C_SOFT_DECLARATIONS2
 179 #define CONFIG_SYS_I2C_SOFT_SPEED_2     50000
 180 #define CONFIG_SYS_I2C_SOFT_SLAVE_2     0x00
 181 #define CONFIG_SOFT_I2C_READ_REPEATED_START
 182 #define CONFIG_SYS_I2C_INIT_BOARD
 183
 184 #ifndef __ASSEMBLY__
 185 int get_soft_i2c_scl_pin(void);
 186 int get_soft_i2c_sda_pin(void);
 187 #endif
 188 #define CONFIG_SOFT_I2C_GPIO_SCL        get_soft_i2c_scl_pin()
 189 #define CONFIG_SOFT_I2C_GPIO_SDA        get_soft_i2c_sda_pin()
 190
 191 /* POWER */
 192 #define CONFIG_POWER
 193 #define CONFIG_POWER_I2C
 194 #define CONFIG_POWER_MAX77686
 195 #define CONFIG_POWER_PMIC_MAX77693
 196 #define CONFIG_POWER_MUIC_MAX77693
 197 #define CONFIG_POWER_FG_MAX77693
 198 #define CONFIG_POWER_BATTERY_TRATS2
 199
 200 /* Security subsystem - enable hw_rand() */
 201 #define CONFIG_EXYNOS_ACE_SHA
 202 #define CONFIG_LIB_HW_RAND
 203
 204 /* Common misc for Samsung */
 205 #define CONFIG_MISC_COMMON
 206
 207 #define CONFIG_MISC_INIT_R
 208
 209 /* Download menu - Samsung common */
 210 #define CONFIG_LCD_MENU
 211 #define CONFIG_LCD_MENU_BOARD
 212
 213 /* Download menu - definitions for check keys */
 214 #ifndef __ASSEMBLY__
 215 #include <power/max77686_pmic.h>
 216
 217 #define KEY_PWR_PMIC_NAME               "MAX77686_PMIC"
 218 #define KEY_PWR_STATUS_REG              MAX77686_REG_PMIC_STATUS1
 219 #define KEY_PWR_STATUS_MASK             (1 << 0)
 220 #define KEY_PWR_INTERRUPT_REG           MAX77686_REG_PMIC_INT1
 221 #define KEY_PWR_INTERRUPT_MASK          (1 << 1)
 222
 223 #define KEY_VOL_UP_GPIO                 EXYNOS4X12_GPIO_X22
 224 #define KEY_VOL_DOWN_GPIO               EXYNOS4X12_GPIO_X33
 225 #endif /* __ASSEMBLY__ */
 226
 227 /* LCD console */
 228 #define LCD_BPP                 LCD_COLOR16
 229 #define CONFIG_SYS_WHITE_ON_BLACK
 230
 231 /* LCD */
 232 #define CONFIG_EXYNOS_FB
 233 #define CONFIG_LCD
 234 #define CONFIG_CMD_BMP
 235 #define CONFIG_BMP_16BPP
 236 #define CONFIG_FB_ADDR          0x52504000
 237 #define CONFIG_S6E8AX0
 238 #define CONFIG_EXYNOS_MIPI_DSIM
 239 #define CONFIG_VIDEO_BMP_GZIP
 240 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
 241
 242 #endif  /* __CONFIG_H */