include/configs/tuxx1.h

   1 /*
   2  * Copyright (C) 2006 Freescale Semiconductor, Inc.
   3  *                    Dave Liu <daveliu@freescale.com>
   4  *
   5  * Copyright (C) 2007 Logic Product Development, Inc.
   6  *                    Peter Barada <peterb@logicpd.com>
   7  *
   8  * Copyright (C) 2007 MontaVista Software, Inc.
   9  *                    Anton Vorontsov <avorontsov@ru.mvista.com>
  10  *
  11  * (C) Copyright 2008
  12  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  13  *
  14  * (C) Copyright 2010-2013
  15  * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
  16  * Holger Brunck,  Keymile GmbH, holger.bruncl@keymile.com
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License as
  20  * published by the Free Software Foundation; either version 2 of
  21  * the License, or (at your option) any later version.
  22  */
  23
  24 #ifndef __CONFIG_H
  25 #define __CONFIG_H
  26
  27 /*
  28  * High Level Configuration Options
  29  */
  30 #if defined(CONFIG_KMSUPX5)
  31 #define CONFIG_KM_BOARD_NAME    "kmsupx5"
  32 #define CONFIG_HOSTNAME         kmsupx5
  33 #elif defined(CONFIG_TUGE1)
  34 #define CONFIG_KM_BOARD_NAME    "tuge1"
  35 #define CONFIG_HOSTNAME         tuge1
  36 #elif defined(CONFIG_TUXX1)     /* TUXX1 board (tuxa1/tuda1) specific */
  37 #define CONFIG_KM_BOARD_NAME    "tuxx1"
  38 #define CONFIG_HOSTNAME         tuxx1
  39 #elif defined(CONFIG_KMOPTI2)
  40 #define CONFIG_KM_BOARD_NAME    "kmopti2"
  41 #define CONFIG_HOSTNAME         kmopti2
  42 #else
  43 #error ("Board not supported")
  44 #endif
  45
  46 #define CONFIG_SYS_TEXT_BASE    0xF0000000
  47
  48 /* include common defines/options for all 8321 Keymile boards */
  49 #include "km/km8321-common.h"
  50
  51 #define CONFIG_SYS_APP1_BASE    0xA0000000    /* PAXG */
  52 #define CONFIG_SYS_APP1_SIZE    256 /* Megabytes */
  53 #if defined(CONFIG_TUXX1) || defined(CONFIG_KMOPTI2)
  54 #define CONFIG_SYS_APP2_BASE    0xB0000000    /* PINC3 */
  55 #define CONFIG_SYS_APP2_SIZE    256 /* Megabytes */
  56 #endif
  57
  58 /*
  59  * Init Local Bus Memory Controller:
  60  *                                    Device on
  61  * Bank Bus     Machine PortSz  Size  TUDA1  TUXA1  TUGE1  KMSUPX4 KMOPTI2
  62  * ---- ---     ------- ------  ----- ---------------------------------------
  63  *  2   Local   GPCM    8 bit  256MB  PAXG  LPXF   PAXI     LPXF   PAXE
  64  *  3   Local   GPCM    8 bit  256MB  PINC3 PINC2  unused  unused  OPI2(16 bit)
  65  *
  66  */
  67
  68 /*
  69  * Configuration for C2 on the local bus
  70  */
  71 /* Window base at flash base */
  72 #define CONFIG_SYS_LBLAWBAR2_PRELIM     CONFIG_SYS_APP1_BASE
  73 /* Window size: 256 MB */
  74 #define CONFIG_SYS_LBLAWAR2_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
  75
  76 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_APP1_BASE | \
  77                                  BR_PS_8 | \
  78                                  BR_MS_GPCM | \
  79                                  BR_V)
  80
  81 #define CONFIG_SYS_OR2_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
  82                                  OR_GPCM_CSNT | \
  83                                  OR_GPCM_ACS_DIV4 | \
  84                                  OR_GPCM_SCY_2 | \
  85                                  OR_GPCM_TRLX_SET | \
  86                                  OR_GPCM_EHTR_CLEAR | \
  87                                  OR_GPCM_EAD)
  88 #if defined(CONFIG_TUXX1)
  89 /*
  90  * Configuration for C3 on the local bus
  91  */
  92 /* Access window base at PINC3 base */
  93 #define CONFIG_SYS_LBLAWBAR3_PRELIM     CONFIG_SYS_APP2_BASE
  94 /* Window size: 256 MB */
  95 #define CONFIG_SYS_LBLAWAR3_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
  96
  97 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_APP2_BASE | \
  98                                  BR_PS_8 |              \
  99                                  BR_MS_GPCM |           \
 100                                  BR_V)
 101
 102 #define CONFIG_SYS_OR3_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
 103                                  OR_GPCM_CSNT | \
 104                                  OR_GPCM_ACS_DIV2 | \
 105                                  OR_GPCM_SCY_2 | \
 106                                  OR_GPCM_TRLX_SET | \
 107                                  OR_GPCM_EHTR_CLEAR)
 108
 109 #define CONFIG_SYS_MAMR         (MxMR_GPL_x4DIS | \
 110                                  0x0000c000 | \
 111                                  MxMR_WLFx_2X)
 112 #endif
 113
 114 #if defined(CONFIG_KMOPTI2)
 115 /*
 116  * Configuration for C3 on the local bus
 117  */
 118 #define CONFIG_SYS_LBLAWBAR3_PRELIM     CONFIG_SYS_APP2_BASE
 119 #define CONFIG_SYS_LBLAWAR3_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
 120 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_APP2_BASE | \
 121                                  BR_PS_16 |             \
 122                                  BR_MS_GPCM |           \
 123                                  BR_V)
 124 #define CONFIG_SYS_OR3_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
 125                                  OR_GPCM_SCY_4 | \
 126                                  OR_GPCM_TRLX_CLEAR | \
 127                                  OR_GPCM_EHTR_CLEAR)
 128 #endif
 129
 130 /*
 131  * MMU Setup
 132  */
 133 /* APP1: icache cacheable, but dcache-inhibit and guarded */
 134 #define CONFIG_SYS_IBAT5L       (CONFIG_SYS_APP1_BASE | \
 135                                  BATL_PP_RW | \
 136                                  BATL_MEMCOHERENCE)
 137 /* 512M should also include APP2... */
 138 #define CONFIG_SYS_IBAT5U       (CONFIG_SYS_APP1_BASE | \
 139                                  BATU_BL_256M | \
 140                                  BATU_VS | \
 141                                  BATU_VP)
 142 #define CONFIG_SYS_DBAT5L       (CONFIG_SYS_APP1_BASE | \
 143                                  BATL_PP_RW | \
 144                                  BATL_CACHEINHIBIT | \
 145                                  BATL_GUARDEDSTORAGE)
 146 #define CONFIG_SYS_DBAT5U       CONFIG_SYS_IBAT5U
 147
 148 #if defined(CONFIG_TUGE1) || defined(CONFIG_KMSUPX5)
 149 #define CONFIG_SYS_IBAT6L       (0)
 150 #define CONFIG_SYS_IBAT6U       (0)
 151 #define CONFIG_SYS_DBAT6L       CONFIG_SYS_IBAT6L
 152 #else
 153 /* APP2:  icache cacheable, but dcache-inhibit and guarded */
 154 #define CONFIG_SYS_IBAT6L       (CONFIG_SYS_APP2_BASE | \
 155                                  BATL_PP_RW | \
 156                                  BATL_MEMCOHERENCE)
 157 #define CONFIG_SYS_IBAT6U       (CONFIG_SYS_APP2_BASE | \
 158                                  BATU_BL_256M | \
 159                                  BATU_VS | \
 160                                  BATU_VP)
 161 #define CONFIG_SYS_DBAT6L       (CONFIG_SYS_APP2_BASE | \
 162                                  BATL_PP_RW | \
 163                                  BATL_CACHEINHIBIT | \
 164                                  BATL_GUARDEDSTORAGE)
 165 #endif
 166 #define CONFIG_SYS_DBAT6U       CONFIG_SYS_IBAT6U
 167
 168 #define CONFIG_SYS_IBAT7L       (0)
 169 #define CONFIG_SYS_IBAT7U       (0)
 170 #define CONFIG_SYS_DBAT7L       CONFIG_SYS_IBAT7L
 171 #define CONFIG_SYS_DBAT7U       CONFIG_SYS_IBAT7U
 172
 173 #endif /* __CONFIG_H */