include/configs/tx28.h

   1 /*
   2  * Copyright (C) 2012 <LW@KARO-electronics.de>
   3  *
   4  * SPDX-License-Identifier:      GPL-2.0
   5  *
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #include <linux/kconfig.h>
  12 #include <linux/sizes.h>
  13 #include <asm/arch/regs-base.h>
  14
  15 /*
  16  * Ka-Ro TX28 board - SoC configuration
  17  */
  18 #define CONFIG_MXS_GPIO                                 /* GPIO control */
  19 #define CONFIG_SYS_HZ                   1000            /* Ticks per second */
  20 #define PHYS_SDRAM_1_SIZE               CONFIG_SYS_SDRAM_SIZE
  21 #ifdef CONFIG_TX28_S
  22 #define TX28_MOD_SUFFIX                 "1"
  23 #else
  24 #define CONFIG_SYS_SPL_FIXED_BATT_SUPPLY
  25 #define TX28_MOD_SUFFIX                 "0"
  26 #endif
  27 #define IRAM_BASE_ADDR                  0x00000000
  28
  29 #ifndef CONFIG_SPL_BUILD
  30 #define CONFIG_SKIP_LOWLEVEL_INIT
  31 #define CONFIG_SHOW_ACTIVITY
  32 #define CONFIG_ARCH_CPU_INIT
  33 #define CONFIG_ARCH_MISC_INIT           /* init vector table after relocation */
  34 #define CONFIG_DISPLAY_CPUINFO
  35 #define CONFIG_DISPLAY_BOARDINFO
  36 #define CONFIG_BOARD_LATE_INIT
  37 #define CONFIG_BOARD_EARLY_INIT_F
  38 #define CONFIG_SYS_GENERIC_BOARD
  39 #define CONFIG_CMD_GPIO
  40
  41 /* LCD Logo and Splash screen support */
  42 #ifdef CONFIG_LCD
  43 #define CONFIG_SPLASH_SCREEN
  44 #define CONFIG_SPLASH_SCREEN_ALIGN
  45 #define CONFIG_VIDEO_MXS
  46 #define CONFIG_LCD_LOGO
  47 #define LCD_BPP                         LCD_COLOR32
  48 #define CONFIG_CMD_BMP
  49 #define CONFIG_VIDEO_BMP_RLE8
  50 #endif /* CONFIG_LCD */
  51 #endif /* CONFIG_SPL_BUILD */
  52
  53 /*
  54  * Memory configuration options
  55  */
  56 #define CONFIG_NR_DRAM_BANKS            0x1             /* 1 bank of SDRAM */
  57 #define PHYS_SDRAM_1                    0x40000000      /* SDRAM Bank #1 */
  58 #define CONFIG_STACKSIZE                SZ_64K
  59 #define CONFIG_SYS_MALLOC_LEN           SZ_4M
  60 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM_1    /* Memtest start address */
  61 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + SZ_4M)
  62
  63 /*
  64  * U-Boot general configurations
  65  */
  66 #define CONFIG_SYS_LONGHELP
  67 #define CONFIG_SYS_CBSIZE               2048            /* Console I/O buffer size */
  68 #define CONFIG_SYS_PBSIZE \
  69         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  70                                                         /* Print buffer size */
  71 #define CONFIG_SYS_MAXARGS              256             /* Max number of command args */
  72 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  73                                         /* Boot argument buffer size */
  74 #define CONFIG_VERSION_VARIABLE         /* U-BOOT version */
  75 #define CONFIG_AUTO_COMPLETE            /* Command auto complete */
  76 #define CONFIG_CMDLINE_EDITING          /* Command history etc */
  77
  78 #define CONFIG_SYS_64BIT_VSPRINTF
  79
  80 /*
  81  * Flattened Device Tree (FDT) support
  82 */
  83 #ifdef CONFIG_OF_LIBFDT
  84 #endif
  85
  86 /*
  87  * Boot Linux
  88  */
  89 #define xstr(s)                         str(s)
  90 #define str(s)                          #s
  91 #define __pfx(x, s)                     (x##s)
  92 #define _pfx(x, s)                      __pfx(x, s)
  93
  94 #define CONFIG_CMDLINE_TAG
  95 #define CONFIG_SETUP_MEMORY_TAGS
  96 #define CONFIG_BOOTDELAY                3
  97 #define CONFIG_ZERO_BOOTDELAY_CHECK
  98 #define CONFIG_SYS_AUTOLOAD             "no"
  99 #define CONFIG_BOOTFILE                 "uImage"
 100 #define CONFIG_BOOTARGS                 "init=/linuxrc console=ttyAMA0,115200 ro debug panic=1"
 101 #define CONFIG_BOOTCOMMAND              "run bootcmd_${boot_mode} bootm_cmd"
 102 #ifdef CONFIG_TX28_S
 103 #define CONFIG_LOADADDR                 41000000
 104 #else
 105 #define CONFIG_LOADADDR                 43000000
 106 #endif
 107 #define CONFIG_FDTADDR                  40800000
 108 #define CONFIG_SYS_LOAD_ADDR            _pfx(0x, CONFIG_LOADADDR)
 109 #define CONFIG_SYS_FDT_ADDR             _pfx(0x, CONFIG_FDTADDR)
 110 #define CONFIG_U_BOOT_IMG_SIZE          SZ_1M
 111
 112 /*
 113  * Extra Environment Settings
 114  */
 115 #ifdef CONFIG_TX28_UBOOT_NOENV
 116 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 117         "autostart=no\0"                                                \
 118         "autoload=no\0"                                                 \
 119         "baseboard=stk5-v3\0"                                           \
 120         "bootdelay=-1\0"                                                \
 121         "fdtaddr=" xstr(CONFIG_FDTADDR) "\0"                            \
 122         "mtdids=" MTDIDS_DEFAULT "\0"                                   \
 123         "mtdparts=" MTDPARTS_DEFAULT "\0"
 124 #else
 125 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 126         "autostart=no\0"                                                \
 127         "baseboard=stk5-v3\0"                                           \
 128         "bootargs_jffs2=run default_bootargs"                           \
 129         ";setenv bootargs ${bootargs}"                                  \
 130         " root=/dev/mtdblock3 rootfstype=jffs2\0"                       \
 131         "bootargs_mmc=run default_bootargs;setenv bootargs ${bootargs}" \
 132         " root=/dev/mmcblk0p3 rootwait\0"                               \
 133         "bootargs_nfs=run default_bootargs;setenv bootargs ${bootargs}" \
 134         " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock"        \
 135         " ip=dhcp\0"                                                    \
 136         "bootargs_ubifs=run default_bootargs"                           \
 137         ";setenv bootargs ${bootargs}"                                  \
 138         " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0"           \
 139         "bootcmd_jffs2=setenv autostart no;run bootargs_jffs2"          \
 140         ";nboot linux\0"                                                \
 141         "bootcmd_mmc=setenv autostart no;run bootargs_mmc"              \
 142         ";fatload mmc 0 ${loadaddr} uImage\0"                           \
 143         "bootcmd_nand=setenv autostart no;run bootargs_ubifs"           \
 144         ";nboot linux\0"                                                \
 145         "bootcmd_net=setenv autoload y;setenv autostart n"              \
 146         ";run bootargs_nfs"                                             \
 147         ";dhcp\0"                                                       \
 148         "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0"                    \
 149         "boot_mode=nand\0"                                              \
 150         "default_bootargs=setenv bootargs " CONFIG_BOOTARGS             \
 151         " ${append_bootargs}\0"                                         \
 152         "fdtaddr=" xstr(CONFIG_FDTADDR) "\0"                            \
 153         "fdtsave=fdt resize;nand erase.part dtb"                        \
 154         ";nand write ${fdtaddr} dtb ${fdtsize}\0"                       \
 155         "mtdids=" MTDIDS_DEFAULT "\0"                                   \
 156         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 157         "nfsroot=/tftpboot/rootfs\0"                                    \
 158         "otg_mode=device\0"                                             \
 159         "touchpanel=tsc2007\0"                                          \
 160         "video_mode=VGA\0"
 161 #endif /*  CONFIG_ENV_IS_NOWHERE */
 162
 163 #define MTD_NAME                        "gpmi-nand"
 164 #define MTDIDS_DEFAULT                  "nand0=" MTD_NAME
 165
 166 /*
 167  * Serial Driver
 168  */
 169 #ifdef CONFIG_CONS_INDEX
 170 /*
 171  * select STK5 UART port 0: 1st UART (DUART) 1,2 2nd,3rd UART (Appl. UART)
 172  */
 173 #if CONFIG_CONS_INDEX == 0
 174 #define CONFIG_PL011_SERIAL
 175 #define CONFIG_PL011_CLOCK              24000000
 176 #define CONFIG_PL01x_PORTS      {       \
 177         (void *)MXS_UARTDBG_BASE,       \
 178         }
 179 #else /* CONFIG_CONS_INDEX == 0 */
 180 #define CONFIG_MXS_AUART
 181 #if CONFIG_CONS_INDEX == 1
 182 #define CONFIG_MXS_AUART_BASE           ((void *)MXS_UARTAPP1_BASE)
 183 #elif CONFIG_CONS_INDEX == 2
 184 #define CONFIG_MXS_AUART_BASE           ((void *)MXS_UARTAPP3_BASE)
 185 #elif CONFIG_CONS_INDEX != -1
 186 #error Unsupported console UART selection
 187 #endif
 188 #endif /* CONFIG_CONS_INDEX == 0 */
 189 #endif /* ifdef CONFIG_CONS_INDEX */
 190 #define CONFIG_BAUDRATE                 115200          /* Default baud rate */
 191 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, }
 192 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 193
 194 /*
 195  * Ethernet Driver
 196  */
 197 #ifdef CONFIG_FEC_MXC
 198 /* This is required for the FEC driver to work with cache enabled */
 199 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
 200 #define CONFIG_SYS_CACHELINE_SIZE       32
 201
 202 #ifdef CONFIG_TX28_S
 203 #define CONFIG_FEC_MXC_PHYADDR          0
 204 #define IMX_FEC_BASE                    MXS_ENET0_BASE
 205 #endif
 206
 207 #define CONFIG_FEC_XCV_TYPE             RMII
 208 #endif
 209
 210 /*
 211  * NAND flash driver
 212  */
 213 #ifdef CONFIG_NAND
 214 #define CONFIG_SYS_NAND_BLOCK_SIZE      SZ_128K
 215 #define CONFIG_SYS_NAND_U_BOOT_OFFS     CONFIG_SYS_NAND_BLOCK_SIZE
 216 #define CONFIG_SYS_MXS_DMA_CHANNEL      4
 217 #define CONFIG_SYS_NAND_MAX_CHIPS       0x1
 218 #define CONFIG_SYS_MAX_NAND_DEVICE      0x1
 219 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 220 #define CONFIG_SYS_NAND_BASE            0x00000000
 221 #endif /* CONFIG_NAND */
 222
 223 #define CONFIG_ENV_OVERWRITE
 224
 225 #ifdef CONFIG_ENV_IS_IN_NAND
 226 #define CONFIG_ENV_OFFSET               (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
 227 #define CONFIG_ENV_SIZE                 SZ_128K
 228 #define CONFIG_ENV_RANGE                (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
 229 #endif /* CONFIG_ENV_IS_IN_NAND */
 230
 231 #ifdef CONFIG_ENV_OFFSET_REDUND
 232 #define CONFIG_SYS_ENV_PART_STR         xstr(CONFIG_SYS_ENV_PART_SIZE)  \
 233         "(env),"                                                        \
 234         xstr(CONFIG_SYS_ENV_PART_SIZE)                                  \
 235         "(env2),"
 236 #define CONFIG_SYS_USERFS_PART_STR      xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
 237 #else
 238 #define CONFIG_SYS_ENV_PART_STR         xstr(CONFIG_SYS_ENV_PART_SIZE)  \
 239         "(env),"
 240 #define CONFIG_SYS_USERFS_PART_STR      xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
 241 #endif /* CONFIG_ENV_OFFSET_REDUND */
 242
 243 /*
 244  * MMC Driver
 245  */
 246 #ifdef CONFIG_MXS_MMC
 247 #ifdef CONFIG_CMD_MMC
 248 #define CONFIG_CMD_FAT
 249 #define CONFIG_FAT_WRITE
 250 #define CONFIG_CMD_EXT2
 251 #endif
 252
 253 /*
 254  * Environments on MMC
 255  */
 256 #ifdef CONFIG_ENV_IS_IN_MMC
 257 #define CONFIG_SYS_MMC_ENV_DEV          0
 258 /* Associated with the MMC layout defined in mmcops.c */
 259 #define CONFIG_ENV_OFFSET               SZ_1K
 260 #define CONFIG_ENV_SIZE                 (SZ_128K - CONFIG_ENV_OFFSET)
 261 #define CONFIG_DYNAMIC_MMC_DEVNO
 262 #endif /* CONFIG_ENV_IS_IN_MMC */
 263 #endif /* CONFIG_MXS_MMC */
 264
 265 #define MTDPARTS_DEFAULT                "mtdparts=" MTD_NAME ":"        \
 266         "1m@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) "(u-boot),"             \
 267         CONFIG_SYS_ENV_PART_STR                                         \
 268         "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR             \
 269         ",512k@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)"               \
 270         ",512k@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
 271
 272 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 273 #ifndef CONFIG_SPL_BUILD
 274 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
 275                                         GENERATED_GBL_DATA_SIZE)
 276 #else
 277 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SPL_STACK
 278 #endif
 279
 280 /* Defines for SPL */
 281 #define CONFIG_SPL_START_S_PATH         "arch/arm/cpu/arm926ejs/mxs"
 282 #define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
 283 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 284 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 285 #define CONFIG_SPL_SERIAL_SUPPORT
 286 #define CONFIG_SPL_GPIO_SUPPORT
 287 #define CONFIG_SYS_SPL_VDDD_VAL         1500
 288 #define CONFIG_SYS_SPL_BATT_BO_LEVEL    2400
 289 #define CONFIG_SYS_SPL_VDDA_BO_VAL      100
 290 #define CONFIG_SYS_SPL_VDDMEM_VAL       0       /* VDDMEM is not utilized on TX28 */
 291 #define CONFIG_SPL_STACK                0x1fffc /* End of OCRAM */
 292
 293 #endif /* __CONFIG_H */