2 * Copyright (C) 2012-2015 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #ifndef CONFIG_SOC_MX6UL
12 #define CONFIG_ARM_ERRATA_743622
13 #define CONFIG_ARM_ERRATA_751472
14 #define CONFIG_ARM_ERRATA_794072
15 #define CONFIG_ARM_ERRATA_761320
17 #ifndef CONFIG_SYS_L2CACHE_OFF
18 #define CONFIG_SYS_L2_PL310
19 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE
22 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
25 #define CONFIG_BOARD_POSTCLK_INIT
26 #define CONFIG_MXC_GPT_HCLK
28 #include <linux/kconfig.h>
29 #include <linux/sizes.h>
30 #include <asm/arch/imx-regs.h>
33 * Ka-Ro TX6 board - SoC configuration
35 #define CONFIG_SYS_MX6_HCLK 24000000
36 #define CONFIG_SYS_MX6_CLK32 32768
37 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
38 #define CONFIG_SHOW_ACTIVITY
39 #define CONFIG_ARCH_CPU_INIT
40 #define CONFIG_DISPLAY_BOARDINFO
41 #define CONFIG_BOARD_LATE_INIT
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_SYS_GENERIC_BOARD
44 #define CONFIG_CMD_GPIO
46 #ifndef CONFIG_TX6_UBOOT_MFG
47 /* LCD Logo and Splash screen support */
49 #define CONFIG_SPLASH_SCREEN
50 #define CONFIG_SPLASH_SCREEN_ALIGN
51 #ifndef CONFIG_SOC_MX6UL
52 #define CONFIG_VIDEO_IPUV3
53 #define CONFIG_IPUV3_CLK (CONFIG_SYS_SDRAM_CLK * 1000000 / 2)
55 #define CONFIG_LCD_LOGO
56 #define LCD_BPP LCD_COLOR32
57 #define CONFIG_CMD_BMP
58 #define CONFIG_VIDEO_BMP_RLE8
59 #endif /* CONFIG_LCD */
60 #endif /* CONFIG_TX6_UBOOT_MFG */
63 * Memory configuration options
65 #define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */
66 #ifndef CONFIG_SOC_MX6UL
67 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
68 #define CONFIG_SYS_MPU_CLK 792
70 #define PHYS_SDRAM_1 0x80000000 /* Base address of bank 1 */
71 #define CONFIG_SYS_MPU_CLK 528
73 #ifndef CONFIG_SYS_SDRAM_BUS_WIDTH
74 #if defined(CONFIG_SYS_SDRAM_BUS_WIDTH_32)
75 #define CONFIG_SYS_SDRAM_BUS_WIDTH 32
76 #elif defined(CONFIG_SYS_SDRAM_BUS_WIDTH_16)
77 #define CONFIG_SYS_SDRAM_BUS_WIDTH 16
79 #define CONFIG_SYS_SDRAM_BUS_WIDTH 64
81 #endif /* CONFIG_SYS_SDRAM_BUS_WIDTH */
82 #define PHYS_SDRAM_1_SIZE (SZ_512M / 32 * CONFIG_SYS_SDRAM_BUS_WIDTH)
83 #ifdef CONFIG_SOC_MX6Q
84 #define CONFIG_SYS_SDRAM_CLK 528
86 #define CONFIG_SYS_SDRAM_CLK 400
88 #define CONFIG_STACKSIZE SZ_128K
89 #define CONFIG_SPL_STACK (IRAM_BASE_ADDR + SZ_16K)
90 #define CONFIG_SYS_MALLOC_LEN SZ_8M
91 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
92 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
95 * U-Boot general configurations
97 #define CONFIG_SYS_LONGHELP
98 #if defined(CONFIG_SOC_MX6Q)
99 #elif defined(CONFIG_SOC_MX6DL)
100 #elif defined(CONFIG_SOC_MX6S)
101 #elif defined(CONFIG_SOC_MX6UL)
103 #error Unsupported i.MX6 processor variant
105 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
106 #define CONFIG_SYS_PBSIZE \
107 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
108 /* Print buffer size */
109 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
110 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
111 /* Boot argument buffer size */
112 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
113 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
114 #define CONFIG_CMDLINE_EDITING /* Command history etc */
116 #define CONFIG_SYS_64BIT_VSPRINTF
121 #define xstr(s) str(s)
123 #define __pfx(x, s) (x##s)
124 #define _pfx(x, s) __pfx(x, s)
126 #define CONFIG_CMDLINE_TAG
127 #define CONFIG_INITRD_TAG
128 #define CONFIG_SETUP_MEMORY_TAGS
129 #ifndef CONFIG_TX6_UBOOT_MFG
130 #define CONFIG_BOOTDELAY 1
132 #define CONFIG_BOOTDELAY 0
134 #define CONFIG_ZERO_BOOTDELAY_CHECK
135 #define CONFIG_SYS_AUTOLOAD "no"
136 #define DEFAULT_BOOTCMD "run bootcmd_${boot_mode} bootm_cmd"
137 #define CONFIG_BOOTFILE "uImage"
138 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
139 #ifndef CONFIG_TX6_UBOOT_MFG
140 #define CONFIG_BOOTCOMMAND DEFAULT_BOOTCMD
142 #define CONFIG_BOOTCOMMAND "setenv bootcmd '" DEFAULT_BOOTCMD "';" \
143 "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
144 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL))
145 #define CONFIG_BOOTCMD_MFG_LOADADDR 80500000
147 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
149 #define CONFIG_DELAY_ENVIRONMENT
150 #endif /* CONFIG_TX6_UBOOT_MFG */
151 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL))
152 #define CONFIG_LOADADDR 82000000
153 #define CONFIG_FDTADDR 81000000
155 #define CONFIG_LOADADDR 18000000
156 #define CONFIG_FDTADDR 11000000
158 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
159 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
160 #ifndef CONFIG_SYS_LVDS_IF
161 #define DEFAULT_VIDEO_MODE "VGA"
163 #define DEFAULT_VIDEO_MODE "HSD100PXN1"
169 #ifdef CONFIG_TX6_UBOOT_NOENV
170 #define CONFIG_EXTRA_ENV_SETTINGS \
173 "baseboard=stk5-v3\0" \
175 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
176 "mtdids=" MTDIDS_DEFAULT "\0" \
177 "mtdparts=" MTDPARTS_DEFAULT "\0"
179 #define CONFIG_SYS_CPU_CLK_STR xstr(CONFIG_SYS_MPU_CLK)
181 #define CONFIG_EXTRA_ENV_SETTINGS \
183 "baseboard=stk5-v3\0" \
184 "bootargs_jffs2=run default_bootargs" \
185 ";setenv bootargs ${bootargs}" \
186 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
187 "bootargs_mmc=run default_bootargs;setenv bootargs ${bootargs}" \
189 "bootargs_nfs=run default_bootargs;setenv bootargs ${bootargs}" \
190 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
192 "bootargs_ubifs=run default_bootargs" \
193 ";setenv bootargs ${bootargs}" \
194 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
195 "bootcmd_jffs2=setenv autostart no;run bootargs_jffs2" \
197 "bootcmd_mmc=setenv autostart no;run bootargs_mmc" \
198 ";fatload mmc 0 ${loadaddr} uImage\0" \
199 CONFIG_SYS_BOOT_CMD_NAND \
200 "bootcmd_net=setenv autoload y;setenv autostart n" \
201 ";run bootargs_nfs" \
203 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
204 "boot_mode=" CONFIG_SYS_DEFAULT_BOOT_MODE "\0" \
205 "cpu_clk=" CONFIG_SYS_CPU_CLK_STR "\0" \
206 "default_bootargs=setenv bootargs " CONFIG_BOOTARGS \
207 " ${append_bootargs}\0" \
210 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
211 CONFIG_SYS_FDTSAVE_CMD \
212 "mtdids=" MTDIDS_DEFAULT "\0" \
213 "mtdparts=" MTDPARTS_DEFAULT "\0" \
214 "nfsroot=/tftpboot/rootfs\0" \
215 "otg_mode=device\0" \
217 "touchpanel=tsc2007\0" \
218 "video_mode=" DEFAULT_VIDEO_MODE "\0"
219 #endif /* CONFIG_ENV_IS_NOWHERE */
221 #ifdef CONFIG_TX6_NAND
222 #define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
223 #define CONFIG_SYS_BOOT_CMD_NAND \
224 "bootcmd_nand=setenv autostart no;run bootargs_ubifs;nboot linux\0"
225 #define CONFIG_SYS_FDTSAVE_CMD \
226 "fdtsave=fdt resize;nand erase.part dtb" \
227 ";nand write ${fdtaddr} dtb ${fdtsize}\0"
228 #define MTD_NAME "gpmi-nand"
229 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
230 #define CONFIG_SYS_NAND_ONFI_DETECTION
231 #define MMC_ROOT_STR " root=/dev/mmcblk0p2 rootwait\0"
232 #define ROOTPART_UUID_STR ""
233 #define EMMC_BOOT_ACK_STR ""
234 #define EMMC_BOOT_PART_STR ""
236 #define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
237 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
238 #define CONFIG_SYS_BOOT_CMD_NAND ""
239 #define CONFIG_SYS_FDTSAVE_CMD \
240 "fdtsave=mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} ${emmc_boot_part}" \
241 ";mmc write ${fdtaddr} " xstr(CONFIG_SYS_DTB_BLKNO) " 80" \
242 ";mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 0\0"
244 #define MTDIDS_DEFAULT ""
245 #define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
246 #define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
247 #define EMMC_BOOT_ACK_STR "emmc_boot_ack=1\0"
248 #define EMMC_BOOT_PART_STR "emmc_boot_part=" \
249 xstr(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0"
250 #endif /* CONFIG_TX6_NAND */
255 #define CONFIG_MXC_UART
256 #define CONFIG_MXC_UART_BASE UART1_BASE
257 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
258 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
259 #define CONFIG_SYS_CONSOLE_INFO_QUIET
260 #define CONFIG_CONS_INDEX 1
265 #define CONFIG_MXC_GPIO
270 #ifdef CONFIG_FEC_MXC
271 /* This is required for the FEC driver to work with cache enabled */
272 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
274 #ifndef CONFIG_SOC_MX6UL
275 #define CONFIG_FEC_MXC_PHYADDR 0
276 #define IMX_FEC_BASE ENET_BASE_ADDR
278 #define CONFIG_FEC_XCV_TYPE RMII
284 #ifdef CONFIG_HARD_I2C
285 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
286 #define CONFIG_SYS_I2C_SPEED 400000
287 #if defined(CONFIG_TX6_REV)
288 #if CONFIG_TX6_REV == 0x1
289 #define CONFIG_SYS_I2C_SLAVE 0x3c
290 #define CONFIG_LTC3676
291 #elif CONFIG_TX6_REV == 0x2
292 #define CONFIG_SYS_I2C_SLAVE 0x32
293 #define CONFIG_RN5T618
294 #elif CONFIG_TX6_REV == 0x3
295 #define CONFIG_SYS_I2C_SLAVE 0x33
296 #define CONFIG_RN5T567
298 #error Unsupported TX6 module revision
300 #endif /* CONFIG_TX6_REV */
301 /* autodetect which PMIC is present to derive TX6_REV */
302 #ifndef CONFIG_SOC_MX6UL
303 #define CONFIG_LTC3676 /* TX6_REV == 1 */
305 #define CONFIG_RN5T567 /* TX6_REV == 3 */
306 #endif /* CONFIG_HARD_I2C */
308 #define CONFIG_ENV_OVERWRITE
313 #ifdef CONFIG_TX6_NAND
314 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
315 #define CONFIG_SYS_MAX_FLASH_BANKS 0x1
316 #define CONFIG_SYS_NAND_MAX_CHIPS 0x1
317 #define CONFIG_SYS_MAX_NAND_DEVICE 0x1
318 #define CONFIG_SYS_NAND_BASE 0x00000000
319 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
321 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
322 #define CONFIG_ENV_SIZE SZ_128K
323 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
324 #endif /* CONFIG_TX6_NAND */
326 #ifdef CONFIG_ENV_OFFSET_REDUND
327 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
329 xstr(CONFIG_SYS_ENV_PART_SIZE) \
331 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
333 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
335 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
336 #endif /* CONFIG_ENV_OFFSET_REDUND */
341 #ifdef CONFIG_FSL_ESDHC
342 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
344 #ifdef CONFIG_CMD_MMC
345 #define CONFIG_CMD_FAT
346 #define CONFIG_FAT_WRITE
347 #define CONFIG_CMD_EXT2
350 * Environments on MMC
352 #ifdef CONFIG_ENV_IS_IN_MMC
353 #define CONFIG_SYS_MMC_ENV_DEV 0
354 #define CONFIG_SYS_MMC_ENV_PART 0x1
355 #define CONFIG_DYNAMIC_MMC_DEVNO
356 #endif /* CONFIG_ENV_IS_IN_MMC */
357 #endif /* CONFIG_CMD_MMC */
359 #ifdef CONFIG_TX6_NAND
360 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
361 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
362 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
364 CONFIG_SYS_ENV_PART_STR \
365 "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
366 xstr(CONFIG_SYS_DTB_PART_SIZE) \
367 "@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)," \
368 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
369 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
371 #define MTDPARTS_DEFAULT ""
374 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
375 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
376 GENERATED_GBL_DATA_SIZE)
378 #endif /* __CONFIG_H */