2 * Copyright (C) 2012-2015 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #ifndef CONFIG_BOARD_TX6UL
12 #define CONFIG_ARM_ERRATA_743622
13 #define CONFIG_ARM_ERRATA_751472
14 #define CONFIG_ARM_ERRATA_794072
15 #define CONFIG_ARM_ERRATA_761320
17 #ifndef CONFIG_SYS_L2CACHE_OFF
18 #define CONFIG_SYS_L2_PL310
19 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE
22 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
25 #define CONFIG_BOARD_POSTCLK_INIT
26 #define CONFIG_MXC_GPT_HCLK
28 #include <linux/kconfig.h>
29 #include <linux/sizes.h>
30 #include <asm/arch/imx-regs.h>
33 * Ka-Ro TX6 board - SoC configuration
35 #define CONFIG_SYS_MX6_HCLK 24000000
36 #define CONFIG_SYS_MX6_CLK32 32768
37 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
38 #define CONFIG_SHOW_ACTIVITY
39 #define CONFIG_ARCH_CPU_INIT
40 #define CONFIG_DISPLAY_BOARDINFO
41 #define CONFIG_BOARD_LATE_INIT
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_SYS_GENERIC_BOARD
44 #define CONFIG_CMD_GPIO
46 /* LCD Logo and Splash screen support */
48 #define CONFIG_SPLASH_SCREEN
49 #define CONFIG_SPLASH_SCREEN_ALIGN
50 #ifndef CONFIG_BOARD_TX6UL
51 #define CONFIG_VIDEO_IPUV3
52 #define CONFIG_IPUV3_CLK (CONFIG_SYS_SDRAM_CLK * 1000000 / 2)
54 #define CONFIG_VIDEO_MXS
55 #define MXS_LCDIF_BASE 0x021c8000UL
56 #endif /* CONFIG_BOARD_TX6UL */
57 #define CONFIG_LCD_LOGO
58 #define LCD_BPP LCD_COLOR32
59 #define CONFIG_CMD_BMP
60 #define CONFIG_BMP_8BPP
61 #define CONFIG_BMP_16BPP
62 #define CONFIG_BMP_24BPP
63 #define CONFIG_BMP_32BPP
64 #define CONFIG_VIDEO_BMP_RLE8
65 #endif /* CONFIG_LCD */
68 * Memory configuration options
70 #define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */
71 #ifndef CONFIG_BOARD_TX6UL
72 /* Base address of SDRAM bank 1 */
73 #define PHYS_SDRAM_1 0x10000000
75 #define PHYS_SDRAM_1 0x80000000
78 #ifndef CONFIG_SOC_MX6UL
79 #define CONFIG_SYS_MPU_CLK 792
81 #define CONFIG_SYS_MPU_CLK 528
84 #ifndef CONFIG_SYS_SDRAM_BUS_WIDTH
85 #if defined(CONFIG_SYS_SDRAM_BUS_WIDTH_32)
86 #define CONFIG_SYS_SDRAM_BUS_WIDTH 32
87 #elif defined(CONFIG_SYS_SDRAM_BUS_WIDTH_16)
88 #define CONFIG_SYS_SDRAM_BUS_WIDTH 16
90 #define CONFIG_SYS_SDRAM_BUS_WIDTH 64
92 #endif /* CONFIG_SYS_SDRAM_BUS_WIDTH */
96 #define _AC(x,s) (x##s)
98 #define UL(x) _AC(x,UL)
99 #define PHYS_SDRAM_1_SIZE (UL(CONFIG_SYS_SDRAM_CHIP_SIZE) * \
101 CONFIG_SYS_SDRAM_BUS_WIDTH)
102 #ifndef CONFIG_BOARD_TX6UL
103 #define FDT_HIGH_ADDR_STR "20000000"
105 #define FDT_HIGH_ADDR_STR "90000000"
108 #ifdef CONFIG_SOC_MX6Q
109 #define CONFIG_SYS_SDRAM_CLK 528
111 #define CONFIG_SYS_SDRAM_CLK 400
113 #define CONFIG_STACKSIZE SZ_128K
114 #define CONFIG_SPL_STACK (IRAM_BASE_ADDR + SZ_16K)
115 #define CONFIG_SYS_MALLOC_LEN SZ_8M
116 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
117 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
118 #define CONFIG_SYS_BOOTM_LEN SZ_32M
121 * U-Boot general configurations
123 #define CONFIG_SYS_LONGHELP
124 #if defined(CONFIG_SOC_MX6Q)
125 #elif defined(CONFIG_SOC_MX6DL)
126 #elif defined(CONFIG_SOC_MX6S)
127 #elif defined(CONFIG_SOC_MX6UL)
128 #elif defined(CONFIG_SOC_MX6ULL)
130 #error Unsupported i.MX6 processor variant
132 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
133 #define CONFIG_SYS_PBSIZE \
134 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
135 /* Print buffer size */
136 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
137 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
138 /* Boot argument buffer size */
139 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
140 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
141 #define CONFIG_CMDLINE_EDITING /* Command history etc */
143 #define CONFIG_SYS_64BIT_VSPRINTF
148 #define xstr(s) str(s)
150 #define __pfx(x, s) (x##s)
151 #define _pfx(x, s) __pfx(x, s)
153 #define CONFIG_CMDLINE_TAG
154 #define CONFIG_INITRD_TAG
155 #define CONFIG_SUPPORT_RAW_INITRD
156 #define CONFIG_SETUP_MEMORY_TAGS
157 #ifndef CONFIG_TX6_UBOOT_MFG
158 #define CONFIG_BOOTDELAY 1
160 #define CONFIG_BOOTDELAY 0
162 #define CONFIG_ZERO_BOOTDELAY_CHECK
163 #define CONFIG_SYS_AUTOLOAD "no"
164 #define DEFAULT_BOOTCMD "run bootcmd_${boot_mode} bootm_cmd"
165 #define CONFIG_BOOTFILE "uImage"
166 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
167 #ifndef CONFIG_TX6_UBOOT_MFG
168 #define CONFIG_BOOTCOMMAND DEFAULT_BOOTCMD
170 #define CONFIG_BOOTCOMMAND "setenv bootcmd '" DEFAULT_BOOTCMD "';" \
171 "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
172 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || \
173 defined(CONFIG_BOARD_TX6UL))
174 #define CONFIG_BOOTCMD_MFG_LOADADDR 80500000
176 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
178 #define CONFIG_DELAY_ENVIRONMENT
179 #endif /* CONFIG_TX6_UBOOT_MFG */
180 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || \
181 defined(CONFIG_BOARD_TX6UL))
182 #define CONFIG_LOADADDR 82000000
183 #define CONFIG_FDTADDR 81000000
185 #define CONFIG_LOADADDR 18000000
186 #define CONFIG_FDTADDR 11000000
188 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
189 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
190 #ifndef CONFIG_SYS_LVDS_IF
191 #define DEFAULT_VIDEO_MODE "VGA"
193 #define DEFAULT_VIDEO_MODE "HSD100PXN1"
197 * Extra Environment Settings
199 #ifdef CONFIG_TX6_UBOOT_NOENV
200 #define CONFIG_EXTRA_ENV_SETTINGS \
203 "baseboard=stk5-v3\0" \
205 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
206 "mtdids=" MTDIDS_DEFAULT "\0" \
207 "mtdparts=" MTDPARTS_DEFAULT "\0"
210 #define CONFIG_SYS_CPU_CLK_STR xstr(CONFIG_SYS_MPU_CLK)
212 #define CONFIG_EXTRA_ENV_SETTINGS \
214 "baseboard=stk5-v3\0" \
215 "bootargs_jffs2=run default_bootargs" \
216 ";setenv bootargs ${bootargs}" \
217 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
218 "bootargs_mmc=run default_bootargs;setenv bootargs ${bootargs}" \
220 "bootargs_nfs=run default_bootargs;setenv bootargs ${bootargs}" \
221 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
223 "bootargs_ubifs=run default_bootargs" \
224 ";setenv bootargs ${bootargs}" \
225 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
226 "bootcmd_jffs2=setenv autostart no;run bootargs_jffs2" \
228 "bootcmd_mmc=setenv autostart no;run bootargs_mmc" \
229 ";fatload mmc 0 ${loadaddr} uImage\0" \
230 CONFIG_SYS_BOOT_CMD_NAND \
231 "bootcmd_net=setenv autoload y;setenv autostart n" \
232 ";run bootargs_nfs" \
234 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
235 "boot_mode=" CONFIG_SYS_DEFAULT_BOOT_MODE "\0" \
236 "cpu_clk=" CONFIG_SYS_CPU_CLK_STR "\0" \
237 "default_bootargs=setenv bootargs " CONFIG_BOOTARGS \
238 " ${append_bootargs}\0" \
241 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
243 "fdt_high=" FDT_HIGH_ADDR_STR "\0" \
244 "mtdids=" MTDIDS_DEFAULT "\0" \
245 "mtdparts=" MTDPARTS_DEFAULT "\0" \
246 "nfsroot=/tftpboot/rootfs\0" \
247 "otg_mode=device\0" \
249 "touchpanel=tsc2007\0" \
250 "video_mode=" DEFAULT_VIDEO_MODE "\0"
251 #endif /* CONFIG_ENV_IS_NOWHERE */
253 #ifdef CONFIG_TX6_NAND
254 #define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
255 #define CONFIG_SYS_BOOT_CMD_NAND \
256 "bootcmd_nand=setenv autostart no;run bootargs_ubifs;nboot linux\0"
257 #define FDTSAVE_CMD_STR \
258 "fdtsave=fdt resize;nand erase.part dtb" \
259 ";nand write ${fdtaddr} dtb ${fdtsize}\0"
260 #define MTD_NAME "gpmi-nand"
261 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
262 #define CONFIG_SYS_NAND_ONFI_DETECTION
263 #define MMC_ROOT_STR " root=/dev/mmcblk0p2 rootwait\0"
264 #define ROOTPART_UUID_STR ""
265 #define EMMC_BOOT_ACK_STR ""
266 #define EMMC_BOOT_PART_STR ""
268 #define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
269 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
270 #define CONFIG_SYS_BOOT_CMD_NAND ""
271 #define FDTSAVE_CMD_STR \
272 "fdtsave=mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} ${emmc_boot_part}" \
273 ";mmc write ${fdtaddr} " xstr(CONFIG_SYS_DTB_BLKNO) " 80" \
274 ";mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 0\0"
276 #define MTDIDS_DEFAULT ""
277 #define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
278 #define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
279 #define EMMC_BOOT_ACK_STR "emmc_boot_ack=1\0"
280 #define EMMC_BOOT_PART_STR "emmc_boot_part=" \
281 xstr(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0"
282 #endif /* CONFIG_TX6_NAND */
287 #define CONFIG_MXC_UART
288 #define CONFIG_MXC_UART_BASE UART1_BASE
289 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
290 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
291 #define CONFIG_SYS_CONSOLE_INFO_QUIET
292 #define CONFIG_CONS_INDEX 1
297 #define CONFIG_MXC_GPIO
302 #ifdef CONFIG_FEC_MXC
303 /* This is required for the FEC driver to work with cache enabled */
304 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
306 #ifndef CONFIG_BOARD_TX6UL
307 #define CONFIG_FEC_MXC_PHYADDR 0
308 #define IMX_FEC_BASE ENET_BASE_ADDR
310 #define FEC_MDIO_BASE_ADDR ENET_BASE_ADDR
312 #define CONFIG_FEC_XCV_TYPE RMII
318 #ifdef CONFIG_HARD_I2C
319 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
320 #define CONFIG_SYS_I2C_SPEED 400000
321 #endif /* CONFIG_HARD_I2C */
322 #if defined(CONFIG_TX6_REV)
323 #if CONFIG_TX6_REV == 0x1
324 #define CONFIG_LTC3676
325 #elif CONFIG_TX6_REV == 0x3
326 #define CONFIG_RN5T567
328 #error Unsupported TX6 module revision
330 #else /* CONFIG_TX6_REV */
331 #ifdef CONFIG_BOARD_TX6UL
332 #ifdef CONFIG_SYS_I2C_SOFT
333 /* NOENV U-Boot is used for initial bootstrap.
334 * Since the TAMPER_PIN_DISABLE fuses have to be programmed
335 * to be able to use the TAMPER pins as GPIO to access the
336 * PMIC I2C bus, this is not possible on virgin hardware.
338 #define CONFIG_SYS_I2C_SOFT_SPEED 400000
339 #define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED
340 #define CONFIG_SOFT_I2C_GPIO_SCL IMX_GPIO_NR(5, 0)
341 #define CONFIG_SOFT_I2C_GPIO_SDA IMX_GPIO_NR(5, 1)
342 #define CONFIG_SOFT_I2C_READ_REPEATED_START
343 #endif /* CONFIG_SYS_I2C_SOFT */
344 #else /* !CONFIG_BOARD_TX6UL */
345 /* autodetect which PMIC is present to derive TX6_REV */
346 #define CONFIG_LTC3676 /* TX6_REV == 1 */
347 #endif /* CONFIG_BOARD_TX6UL */
348 #define CONFIG_RN5T567 /* TX6_REV == 3 */
349 #endif /* CONFIG_TX6_REV */
351 #define CONFIG_ENV_OVERWRITE
356 #ifdef CONFIG_TX6_NAND
357 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
358 #define CONFIG_SYS_MAX_FLASH_BANKS 0x1
359 #define CONFIG_SYS_NAND_MAX_CHIPS 0x1
360 #define CONFIG_SYS_MAX_NAND_DEVICE 0x1
361 #define CONFIG_SYS_NAND_BASE 0x00000000
362 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
364 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
365 #define CONFIG_ENV_SIZE SZ_128K
366 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
367 #endif /* CONFIG_TX6_NAND */
369 #ifdef CONFIG_ENV_OFFSET_REDUND
370 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
372 xstr(CONFIG_SYS_ENV_PART_SIZE) \
374 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
376 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
378 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
379 #endif /* CONFIG_ENV_OFFSET_REDUND */
384 #ifdef CONFIG_FSL_ESDHC
385 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
387 #ifdef CONFIG_CMD_MMC
388 #define CONFIG_CMD_FAT
389 #define CONFIG_FAT_WRITE
390 #define CONFIG_CMD_EXT2
391 #define CONFIG_CMD_GPT
392 #define CONFIG_CMD_FS_GENERIC
393 #define CONFIG_PARTITION_UUIDS
394 #define CONFIG_EFI_PARTITION
397 * Environments on MMC
399 #ifdef CONFIG_ENV_IS_IN_MMC
400 #define CONFIG_SYS_MMC_ENV_DEV 0
401 #define CONFIG_SYS_MMC_ENV_PART 0x1
402 #define CONFIG_DYNAMIC_MMC_DEVNO
403 #endif /* CONFIG_ENV_IS_IN_MMC */
404 #endif /* CONFIG_CMD_MMC */
406 #ifdef CONFIG_TX6_NAND
407 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
408 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
409 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
411 CONFIG_SYS_ENV_PART_STR \
412 "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
413 xstr(CONFIG_SYS_DTB_PART_SIZE) \
414 "@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)," \
415 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
416 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
418 #define MTDPARTS_DEFAULT ""
421 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
422 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
423 GENERATED_GBL_DATA_SIZE)
425 #endif /* __CONFIG_H */