2 * Copyright (C) 2012-2015 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #ifndef CONFIG_SOC_MX6UL
12 #define CONFIG_ARM_ERRATA_743622
13 #define CONFIG_ARM_ERRATA_751472
14 #define CONFIG_ARM_ERRATA_794072
15 #define CONFIG_ARM_ERRATA_761320
17 #ifndef CONFIG_SYS_L2CACHE_OFF
18 #define CONFIG_SYS_L2_PL310
19 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE
22 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
25 #define CONFIG_BOARD_POSTCLK_INIT
26 #define CONFIG_MXC_GPT_HCLK
28 #include <linux/kconfig.h>
29 #include <linux/sizes.h>
30 #include <asm/arch/imx-regs.h>
33 * Ka-Ro TX6 board - SoC configuration
35 #define CONFIG_SYS_MX6_HCLK 24000000
36 #define CONFIG_SYS_MX6_CLK32 32768
37 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
38 #define CONFIG_SHOW_ACTIVITY
39 #define CONFIG_ARCH_CPU_INIT
40 #define CONFIG_DISPLAY_BOARDINFO
41 #define CONFIG_BOARD_LATE_INIT
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_SYS_GENERIC_BOARD
44 #define CONFIG_CMD_GPIO
46 /* LCD Logo and Splash screen support */
48 #define CONFIG_SPLASH_SCREEN
49 #define CONFIG_SPLASH_SCREEN_ALIGN
50 #ifndef CONFIG_SOC_MX6UL
51 #define CONFIG_VIDEO_IPUV3
52 #define CONFIG_IPUV3_CLK (CONFIG_SYS_SDRAM_CLK * 1000000 / 2)
54 #define CONFIG_VIDEO_MXS
55 #define MXS_LCDIF_BASE 0x021c8000UL
56 #endif /* CONFIG_SOC_MX6UL */
57 #define CONFIG_LCD_LOGO
58 #define LCD_BPP LCD_COLOR32
59 #define CONFIG_CMD_BMP
60 #define CONFIG_BMP_8BPP
61 #define CONFIG_BMP_16BPP
62 #define CONFIG_BMP_24BPP
63 #define CONFIG_BMP_32BPP
64 #define CONFIG_VIDEO_BMP_RLE8
65 #endif /* CONFIG_LCD */
68 * Memory configuration options
70 #define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */
71 #ifndef CONFIG_SOC_MX6UL
72 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
73 #define CONFIG_SYS_MPU_CLK 792
75 #define PHYS_SDRAM_1 0x80000000 /* Base address of bank 1 */
76 #define CONFIG_SYS_MPU_CLK 528
78 #ifndef CONFIG_SYS_SDRAM_BUS_WIDTH
79 #if defined(CONFIG_SYS_SDRAM_BUS_WIDTH_32)
80 #define CONFIG_SYS_SDRAM_BUS_WIDTH 32
81 #elif defined(CONFIG_SYS_SDRAM_BUS_WIDTH_16)
82 #define CONFIG_SYS_SDRAM_BUS_WIDTH 16
84 #define CONFIG_SYS_SDRAM_BUS_WIDTH 64
86 #endif /* CONFIG_SYS_SDRAM_BUS_WIDTH */
87 #define PHYS_SDRAM_1_SIZE (SZ_512M / 32 * CONFIG_SYS_SDRAM_BUS_WIDTH)
88 #ifdef CONFIG_SOC_MX6Q
89 #define CONFIG_SYS_SDRAM_CLK 528
91 #define CONFIG_SYS_SDRAM_CLK 400
93 #define CONFIG_STACKSIZE SZ_128K
94 #define CONFIG_SPL_STACK (IRAM_BASE_ADDR + SZ_16K)
95 #define CONFIG_SYS_MALLOC_LEN SZ_8M
96 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
97 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
100 * U-Boot general configurations
102 #define CONFIG_SYS_LONGHELP
103 #if defined(CONFIG_SOC_MX6Q)
104 #elif defined(CONFIG_SOC_MX6DL)
105 #elif defined(CONFIG_SOC_MX6S)
106 #elif defined(CONFIG_SOC_MX6UL)
108 #error Unsupported i.MX6 processor variant
110 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
111 #define CONFIG_SYS_PBSIZE \
112 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
113 /* Print buffer size */
114 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
115 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
116 /* Boot argument buffer size */
117 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
118 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
119 #define CONFIG_CMDLINE_EDITING /* Command history etc */
121 #define CONFIG_SYS_64BIT_VSPRINTF
126 #define xstr(s) str(s)
128 #define __pfx(x, s) (x##s)
129 #define _pfx(x, s) __pfx(x, s)
131 #define CONFIG_CMDLINE_TAG
132 #define CONFIG_INITRD_TAG
133 #define CONFIG_SETUP_MEMORY_TAGS
134 #ifndef CONFIG_TX6_UBOOT_MFG
135 #define CONFIG_BOOTDELAY 1
137 #define CONFIG_BOOTDELAY 0
139 #define CONFIG_ZERO_BOOTDELAY_CHECK
140 #define CONFIG_SYS_AUTOLOAD "no"
141 #define DEFAULT_BOOTCMD "run bootcmd_${boot_mode} bootm_cmd"
142 #define CONFIG_BOOTFILE "uImage"
143 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
144 #ifndef CONFIG_TX6_UBOOT_MFG
145 #define CONFIG_BOOTCOMMAND DEFAULT_BOOTCMD
147 #define CONFIG_BOOTCOMMAND "setenv bootcmd '" DEFAULT_BOOTCMD "';" \
148 "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
149 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL))
150 #define CONFIG_BOOTCMD_MFG_LOADADDR 80500000
152 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
154 #define CONFIG_DELAY_ENVIRONMENT
155 #endif /* CONFIG_TX6_UBOOT_MFG */
156 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL))
157 #define CONFIG_LOADADDR 82000000
158 #define CONFIG_FDTADDR 81000000
160 #define CONFIG_LOADADDR 18000000
161 #define CONFIG_FDTADDR 11000000
163 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
164 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
165 #ifndef CONFIG_SYS_LVDS_IF
166 #define DEFAULT_VIDEO_MODE "VGA"
168 #define DEFAULT_VIDEO_MODE "HSD100PXN1"
172 * Extra Environment Settings
174 #ifdef CONFIG_TX6_UBOOT_NOENV
175 #define CONFIG_EXTRA_ENV_SETTINGS \
178 "baseboard=stk5-v3\0" \
180 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
181 "mtdids=" MTDIDS_DEFAULT "\0" \
182 "mtdparts=" MTDPARTS_DEFAULT "\0"
184 #define CONFIG_SYS_CPU_CLK_STR xstr(CONFIG_SYS_MPU_CLK)
186 #define CONFIG_EXTRA_ENV_SETTINGS \
188 "baseboard=stk5-v3\0" \
189 "bootargs_jffs2=run default_bootargs" \
190 ";setenv bootargs ${bootargs}" \
191 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
192 "bootargs_mmc=run default_bootargs;setenv bootargs ${bootargs}" \
194 "bootargs_nfs=run default_bootargs;setenv bootargs ${bootargs}" \
195 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
197 "bootargs_ubifs=run default_bootargs" \
198 ";setenv bootargs ${bootargs}" \
199 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
200 "bootcmd_jffs2=setenv autostart no;run bootargs_jffs2" \
202 "bootcmd_mmc=setenv autostart no;run bootargs_mmc" \
203 ";fatload mmc 0 ${loadaddr} uImage\0" \
204 CONFIG_SYS_BOOT_CMD_NAND \
205 "bootcmd_net=setenv autoload y;setenv autostart n" \
206 ";run bootargs_nfs" \
208 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
209 "boot_mode=" CONFIG_SYS_DEFAULT_BOOT_MODE "\0" \
210 "cpu_clk=" CONFIG_SYS_CPU_CLK_STR "\0" \
211 "default_bootargs=setenv bootargs " CONFIG_BOOTARGS \
212 " ${append_bootargs}\0" \
215 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
216 CONFIG_SYS_FDTSAVE_CMD \
217 "mtdids=" MTDIDS_DEFAULT "\0" \
218 "mtdparts=" MTDPARTS_DEFAULT "\0" \
219 "nfsroot=/tftpboot/rootfs\0" \
220 "otg_mode=device\0" \
222 "touchpanel=tsc2007\0" \
223 "video_mode=" DEFAULT_VIDEO_MODE "\0"
224 #endif /* CONFIG_ENV_IS_NOWHERE */
226 #ifdef CONFIG_TX6_NAND
227 #define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
228 #define CONFIG_SYS_BOOT_CMD_NAND \
229 "bootcmd_nand=setenv autostart no;run bootargs_ubifs;nboot linux\0"
230 #define CONFIG_SYS_FDTSAVE_CMD \
231 "fdtsave=fdt resize;nand erase.part dtb" \
232 ";nand write ${fdtaddr} dtb ${fdtsize}\0"
233 #define MTD_NAME "gpmi-nand"
234 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
235 #define CONFIG_SYS_NAND_ONFI_DETECTION
236 #define MMC_ROOT_STR " root=/dev/mmcblk0p2 rootwait\0"
237 #define ROOTPART_UUID_STR ""
238 #define EMMC_BOOT_ACK_STR ""
239 #define EMMC_BOOT_PART_STR ""
241 #define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
242 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
243 #define CONFIG_SYS_BOOT_CMD_NAND ""
244 #define CONFIG_SYS_FDTSAVE_CMD \
245 "fdtsave=mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} ${emmc_boot_part}" \
246 ";mmc write ${fdtaddr} " xstr(CONFIG_SYS_DTB_BLKNO) " 80" \
247 ";mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 0\0"
249 #define MTDIDS_DEFAULT ""
250 #define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
251 #define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
252 #define EMMC_BOOT_ACK_STR "emmc_boot_ack=1\0"
253 #define EMMC_BOOT_PART_STR "emmc_boot_part=" \
254 xstr(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0"
255 #endif /* CONFIG_TX6_NAND */
260 #define CONFIG_MXC_UART
261 #define CONFIG_MXC_UART_BASE UART1_BASE
262 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
263 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
264 #define CONFIG_SYS_CONSOLE_INFO_QUIET
265 #define CONFIG_CONS_INDEX 1
270 #define CONFIG_MXC_GPIO
275 #ifdef CONFIG_FEC_MXC
276 /* This is required for the FEC driver to work with cache enabled */
277 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
279 #ifndef CONFIG_SOC_MX6UL
280 #define CONFIG_FEC_MXC_PHYADDR 0
281 #define IMX_FEC_BASE ENET_BASE_ADDR
283 #define FEC_MDIO_BASE_ADDR ENET_BASE_ADDR
285 #define CONFIG_FEC_XCV_TYPE RMII
291 #ifdef CONFIG_HARD_I2C
292 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
293 #define CONFIG_SYS_I2C_SPEED 400000
294 #endif /* CONFIG_HARD_I2C */
295 #if defined(CONFIG_TX6_REV)
296 #if CONFIG_TX6_REV == 0x1
297 #define CONFIG_LTC3676
298 #elif CONFIG_TX6_REV == 0x2
299 #define CONFIG_RN5T618
300 #elif CONFIG_TX6_REV == 0x3
301 #define CONFIG_RN5T567
303 #error Unsupported TX6 module revision
305 #else /* CONFIG_TX6_REV */
306 /* autodetect which PMIC is present to derive TX6_REV */
307 #ifdef CONFIG_SOC_MX6UL
308 #define CONFIG_SYS_I2C
309 #define CONFIG_SYS_I2C_SOFT
310 #define CONFIG_SYS_I2C_SOFT_SPEED 400000
311 #define CONFIG_SOFT_I2C_GPIO_SCL IMX_GPIO_NR(5, 0)
312 #define CONFIG_SOFT_I2C_GPIO_SDA IMX_GPIO_NR(5, 1)
313 #define CONFIG_SOFT_I2C_READ_REPEATED_START
315 #define CONFIG_LTC3676 /* TX6_REV == 1 */
317 #define CONFIG_RN5T567 /* TX6_REV == 3 */
318 #endif /* CONFIG_TX6_REV */
320 #define CONFIG_ENV_OVERWRITE
325 #ifdef CONFIG_TX6_NAND
326 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
327 #define CONFIG_SYS_MAX_FLASH_BANKS 0x1
328 #define CONFIG_SYS_NAND_MAX_CHIPS 0x1
329 #define CONFIG_SYS_MAX_NAND_DEVICE 0x1
330 #define CONFIG_SYS_NAND_BASE 0x00000000
331 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
333 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
334 #define CONFIG_ENV_SIZE SZ_128K
335 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
336 #endif /* CONFIG_TX6_NAND */
338 #ifdef CONFIG_ENV_OFFSET_REDUND
339 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
341 xstr(CONFIG_SYS_ENV_PART_SIZE) \
343 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
345 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
347 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
348 #endif /* CONFIG_ENV_OFFSET_REDUND */
353 #ifdef CONFIG_FSL_ESDHC
354 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
356 #ifdef CONFIG_CMD_MMC
357 #define CONFIG_CMD_FAT
358 #define CONFIG_FAT_WRITE
359 #define CONFIG_CMD_EXT2
362 * Environments on MMC
364 #ifdef CONFIG_ENV_IS_IN_MMC
365 #define CONFIG_SYS_MMC_ENV_DEV 0
366 #define CONFIG_SYS_MMC_ENV_PART 0x1
367 #define CONFIG_DYNAMIC_MMC_DEVNO
368 #endif /* CONFIG_ENV_IS_IN_MMC */
369 #endif /* CONFIG_CMD_MMC */
371 #ifdef CONFIG_TX6_NAND
372 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
373 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
374 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
376 CONFIG_SYS_ENV_PART_STR \
377 "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
378 xstr(CONFIG_SYS_DTB_PART_SIZE) \
379 "@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)," \
380 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
381 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
383 #define MTDPARTS_DEFAULT ""
386 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
387 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
388 GENERATED_GBL_DATA_SIZE)
390 #endif /* __CONFIG_H */