2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #include <asm/sizes.h>
12 #include <asm/arch/imx-regs.h>
15 * Ka-Ro TX6 board - SoC configuration
18 #define CONFIG_SYS_MX6_HCLK 24000000
19 #define CONFIG_SYS_MX6_CLK32 32768
20 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
21 #define CONFIG_SHOW_ACTIVITY
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_DISPLAY_BOARDINFO
24 #define CONFIG_BOARD_LATE_INIT
25 #define CONFIG_BOARD_EARLY_INIT_F
28 /* LCD Logo and Splash screen support */
31 #define CONFIG_SPLASH_SCREEN
32 #define CONFIG_SPLASH_SCREEN_ALIGN
33 #define CONFIG_VIDEO_IPUV3
34 #define CONFIG_IPUV3_CLK 266000000
35 #define CONFIG_LCD_LOGO
36 #define LCD_BPP LCD_COLOR24
37 #define CONFIG_CMD_BMP
38 #define CONFIG_VIDEO_BMP_RLE8
39 #endif /* CONFIG_LCD */
40 #endif /* CONFIG_MFG */
42 #ifdef CONFIG_SYS_LVDS_IF
49 * Memory configuration options
51 #define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
52 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
53 #ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
54 #define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
56 #define PHYS_SDRAM_1_WIDTH 64
58 #define PHYS_SDRAM_1_SIZE (SZ_512M * (PHYS_SDRAM_1_WIDTH / 32))
61 #define CONFIG_SYS_SDRAM_CLK 528
63 #define CONFIG_SYS_SDRAM_CLK 400
65 #define CONFIG_STACKSIZE SZ_128K
66 #define CONFIG_SYS_MALLOC_LEN SZ_8M
67 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
68 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
71 * U-Boot general configurations
73 #define CONFIG_SYS_LONGHELP
75 #define CONFIG_SYS_PROMPT "TX6Q U-Boot > "
77 #define CONFIG_SYS_PROMPT "TX6DL U-Boot > "
79 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
80 #define CONFIG_SYS_PBSIZE \
81 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
82 /* Print buffer size */
83 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
84 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
85 /* Boot argument buffer size */
86 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
87 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
88 #define CONFIG_CMDLINE_EDITING /* Command history etc */
90 #define CONFIG_SYS_64BIT_VSPRINTF
91 #define CONFIG_SYS_NO_FLASH
94 * Flattened Device Tree (FDT) support
97 #define CONFIG_OF_LIBFDT
98 #ifdef CONFIG_OF_LIBFDT
99 #define CONFIG_FDT_FIXUP_PARTITIONS
100 #define CONFIG_OF_BOARD_SETUP
102 #define CONFIG_DEFAULT_DEVICE_TREE tx6q
103 #define CONFIG_ARCH_DEVICE_TREE mx6q
105 #define CONFIG_DEFAULT_DEVICE_TREE tx6dl
106 #define CONFIG_ARCH_DEVICE_TREE mx6dl
108 #define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
109 #endif /* CONFIG_OF_LIBFDT */
110 #endif /* CONFIG_MFG */
115 #define xstr(s) str(s)
117 #define __pfx(x, s) (x##s)
118 #define _pfx(x, s) __pfx(x, s)
120 #define CONFIG_CMDLINE_TAG
121 #define CONFIG_INITRD_TAG
122 #define CONFIG_SETUP_MEMORY_TAGS
123 #define CONFIG_SERIAL_TAG
125 #define CONFIG_BOOTDELAY 1
127 #define CONFIG_BOOTDELAY 0
129 #define CONFIG_ZERO_BOOTDELAY_CHECK
130 #define CONFIG_SYS_AUTOLOAD "no"
132 #define CONFIG_BOOTFILE "uImage"
133 #define CONFIG_BOOTARGS "console=ttymxc0,115200 ro debug panic=1"
134 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
136 #define CONFIG_BOOTCOMMAND "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
137 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
138 #define CONFIG_DELAY_ENVIRONMENT
139 #endif /* CONFIG_MFG */
140 #define CONFIG_LOADADDR 18000000
141 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
142 #define CONFIG_IMX_WATCHDOG
143 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000
149 #ifdef CONFIG_ENV_IS_NOWHERE
150 #define CONFIG_EXTRA_ENV_SETTINGS \
154 "fdtaddr=11000000\0" \
155 "mtdids=" MTDIDS_DEFAULT "\0" \
156 "mtdparts=" MTDPARTS_DEFAULT "\0"
158 #define CONFIG_EXTRA_ENV_SETTINGS \
160 "baseboard=stk5-v3\0" \
161 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
162 " root=/dev/mmcblk0p3 rootwait\0" \
163 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
164 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
165 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
166 " root=/dev/nfs ip=dhcp nfsroot=${nfs_server}:${nfsroot},nolock\0"\
167 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
168 "fatload mmc 0 ${loadaddr} uImage;run bootm_cmd\0" \
169 "bootcmd_nand=set autostart no;run bootargs_nand;" \
170 "nboot linux;run bootm_cmd\0" \
171 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
173 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
176 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
177 " ${append_bootargs}\0" \
178 "fdtaddr=11000000\0" \
179 "fdtsave=nand erase.part dtb;nand write ${fdtaddr} dtb ${fdtsize}\0" \
180 "mtdids=" MTDIDS_DEFAULT "\0" \
181 "mtdparts=" MTDPARTS_DEFAULT "\0" \
182 "nfsroot=/tftpboot/rootfs\0" \
183 "otg_mode=device\0" \
184 "touchpanel=tsc2007\0" \
186 #endif /* CONFIG_ENV_IS_NOWHERE */
187 #endif /* CONFIG_MFG */
189 #define MTD_NAME "gpmi-nand"
190 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
191 #define CONFIG_SYS_NAND_ONFI_DETECTION
196 #include <config_cmd_default.h>
197 #define CONFIG_CMD_CACHE
198 #define CONFIG_CMD_MMC
199 #define CONFIG_CMD_NAND
200 #define CONFIG_CMD_MTDPARTS
201 #define CONFIG_CMD_BOOTCE
202 #define CONFIG_CMD_TIME
203 #define CONFIG_CMD_I2C
204 #define CONFIG_CMD_MEMTEST
209 #define CONFIG_MXC_UART
210 #define CONFIG_MXC_UART_BASE UART1_BASE
211 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
212 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
213 #define CONFIG_SYS_CONSOLE_INFO_QUIET
218 #define CONFIG_MXC_GPIO
223 #define CONFIG_FEC_MXC
224 #ifdef CONFIG_FEC_MXC
225 /* This is required for the FEC driver to work with cache enabled */
226 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
227 #define CONFIG_SYS_CACHELINE_SIZE 64
229 #define IMX_FEC_BASE ENET_BASE_ADDR
230 #define CONFIG_FEC_MXC_PHYADDR 0
231 #define CONFIG_PHYLIB
232 #define CONFIG_PHY_SMSC
234 #define CONFIG_FEC_XCV_TYPE RMII
235 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
236 #define CONFIG_CMD_MII
237 #define CONFIG_CMD_DHCP
238 #define CONFIG_CMD_PING
239 /* Add for working with "strict" DHCP server */
240 #define CONFIG_BOOTP_SUBNETMASK
241 #define CONFIG_BOOTP_GATEWAY
242 #define CONFIG_BOOTP_DNS
248 #ifdef CONFIG_CMD_I2C
249 #define CONFIG_HARD_I2C
250 #define CONFIG_I2C_MXC
251 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
252 #define CONFIG_SYS_I2C_MX6_PORT1
253 #define CONFIG_SYS_I2C_SPEED 400000
254 #define CONFIG_SYS_I2C_SLAVE 0x3c
257 #ifndef CONFIG_ENV_IS_NOWHERE
258 /* define one of the following options:
259 #define CONFIG_ENV_IS_IN_NAND
260 #define CONFIG_ENV_IS_IN_MMC
262 #define CONFIG_ENV_IS_IN_NAND
264 #define CONFIG_ENV_OVERWRITE
269 #ifdef CONFIG_CMD_NAND
270 #define CONFIG_MTD_DEVICE
272 #define CONFIG_MTD_DEBUG
273 #define CONFIG_MTD_DEBUG_VERBOSE 4
275 #define CONFIG_NAND_MXS
276 #define CONFIG_NAND_MXS_NO_BBM_SWAP
277 #define CONFIG_APBH_DMA
278 #define CONFIG_APBH_DMA_BURST
279 #define CONFIG_APBH_DMA_BURST8
280 #define CONFIG_CMD_NAND_TRIMFFS
281 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
282 #define CONFIG_SYS_MAX_FLASH_BANKS 1
283 #define CONFIG_SYS_NAND_MAX_CHIPS 1
284 #define CONFIG_SYS_MAX_NAND_DEVICE 1
285 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
286 #define CONFIG_SYS_NAND_USE_FLASH_BBT
287 #define CONFIG_SYS_NAND_BASE 0x00000000
288 #define CONFIG_CMD_ROMUPDATE
290 #undef CONFIG_ENV_IS_IN_NAND
291 #endif /* CONFIG_CMD_NAND */
293 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
294 #define CONFIG_ENV_SIZE SZ_128K
295 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
296 #ifdef CONFIG_ENV_OFFSET_REDUND
297 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
299 xstr(CONFIG_SYS_ENV_PART_SIZE) \
301 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
303 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
305 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
306 #endif /* CONFIG_ENV_OFFSET_REDUND */
311 #ifdef CONFIG_CMD_MMC
313 #define CONFIG_GENERIC_MMC
314 #define CONFIG_FSL_ESDHC
315 #define CONFIG_FSL_USDHC
316 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
317 #define CONFIG_SYS_FSL_ESDHC_NUM 2
319 #define CONFIG_DOS_PARTITION
320 #define CONFIG_CMD_FAT
321 #define CONFIG_CMD_EXT2
324 * Environments on MMC
326 #ifdef CONFIG_ENV_IS_IN_MMC
327 #define CONFIG_SYS_MMC_ENV_DEV 0
328 #undef CONFIG_ENV_OFFSET
329 #undef CONFIG_ENV_SIZE
330 /* Associated with the MMC layout defined in mmcops.c */
331 #define CONFIG_ENV_OFFSET SZ_1K
332 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
333 #define CONFIG_DYNAMIC_MMC_DEVNO
334 #endif /* CONFIG_ENV_IS_IN_MMC */
336 #undef CONFIG_ENV_IS_IN_MMC
337 #endif /* CONFIG_CMD_MMC */
339 #ifdef CONFIG_ENV_IS_NOWHERE
340 #undef CONFIG_ENV_SIZE
341 #define CONFIG_ENV_SIZE SZ_4K
344 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
345 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
346 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
348 CONFIG_SYS_ENV_PART_STR \
349 "4m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
350 xstr(CONFIG_SYS_DTB_PART_SIZE) \
352 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
353 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
355 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
356 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
357 GENERATED_GBL_DATA_SIZE)
359 #endif /* __CONFIG_H */