include/configs/u8500_href.h

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2009
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef __CONFIG_H
  24 #define __CONFIG_H
  25
  26 /*
  27  * High Level Configuration Options
  28  * (easy to change)
  29  */
  30 #define CONFIG_U8500
  31 #define CONFIG_L2_OFF
  32
  33 #define CONFIG_SYS_MEMTEST_START        0x00000000
  34 #define CONFIG_SYS_MEMTEST_END  0x1FFFFFFF
  35 #define CONFIG_SYS_HZ           1000            /* must be 1000 */
  36
  37 #define CONFIG_BOARD_EARLY_INIT_F
  38 #define CONFIG_BOARD_LATE_INIT
  39
  40 /*
  41  * Size of malloc() pool
  42  */
  43 #ifdef CONFIG_BOOT_SRAM
  44 #define CONFIG_ENV_SIZE         (32*1024)
  45 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 64*1024)
  46 #else
  47 #define CONFIG_ENV_SIZE         (128*1024)
  48 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 256*1024)
  49 #endif
  50 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* for initial data */
  51
  52 /*
  53  * PL011 Configuration
  54  */
  55 #define CONFIG_PL011_SERIAL
  56 #define CONFIG_PL011_SERIAL_RLCR
  57 #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
  58
  59 /*
  60  * U8500 UART registers base for 3 serial devices
  61  */
  62 #define CFG_UART0_BASE          0x80120000
  63 #define CFG_UART1_BASE          0x80121000
  64 #define CFG_UART2_BASE          0x80007000
  65 #define CFG_SERIAL0             CFG_UART0_BASE
  66 #define CFG_SERIAL1             CFG_UART1_BASE
  67 #define CFG_SERIAL2             CFG_UART2_BASE
  68 #define CONFIG_PL011_CLOCK      38400000
  69 #define CONFIG_PL01x_PORTS      { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
  70                                   (void *)CFG_SERIAL2 }
  71 #define CONFIG_CONS_INDEX       2
  72 #define CONFIG_BAUDRATE         115200
  73
  74 /*
  75  * Devices and file systems
  76  */
  77 #define CONFIG_MMC
  78 #define CONFIG_GENERIC_MMC
  79 #define CONFIG_DOS_PARTITION
  80
  81 /*
  82  * Commands
  83  */
  84 #define CONFIG_CMD_MEMORY
  85 #define CONFIG_CMD_BOOTD
  86 #define CONFIG_CMD_BDI
  87 #define CONFIG_CMD_IMI
  88 #define CONFIG_CMD_MISC
  89 #define CONFIG_CMD_RUN
  90 #define CONFIG_CMD_ECHO
  91 #define CONFIG_CMD_CONSOLE
  92 #define CONFIG_CMD_LOADS
  93 #define CONFIG_CMD_LOADB
  94 #define CONFIG_CMD_MMC
  95 #define CONFIG_CMD_FAT
  96 #define CONFIG_CMD_EXT2
  97 #define CONFIG_CMD_SOURCE
  98 #define CONFIG_CMD_I2C
  99
 100 #ifndef CONFIG_BOOTDELAY
 101 #define CONFIG_BOOTDELAY        1
 102 #endif
 103 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 104
 105 #undef CONFIG_BOOTARGS
 106 #define CONFIG_BOOTCOMMAND      "run emmcboot"
 107
 108 #define CONFIG_EXTRA_ENV_SETTINGS \
 109         "verify=n\0"                                                    \
 110         "loadaddr=0x00100000\0"                                         \
 111         "console=ttyAMA2,115200n8\0"                                    \
 112         "memargs256=mem=96M@0 mem_modem=32M@96M mem=30M@128M "          \
 113                 "pmem=22M@158M pmem_hwb=44M@180M mem_mali=32@224M\0"    \
 114         "memargs512=mem=96M@0 mem_modem=32M@96M mem=44M@128M "          \
 115                 "pmem=22M@172M mem=30M@194M mem_mali=32M@224M "         \
 116                 "pmem_hwb=54M@256M mem=202M@310M\0"                     \
 117         "commonargs=setenv bootargs cachepolicy=writealloc noinitrd "   \
 118                 "init=init "                                            \
 119                 "board_id=${board_id} "                                 \
 120                 "logo.${logo} "                                         \
 121                 "startup_graphics=${startup_graphics}\0"                \
 122         "emmcargs=setenv bootargs ${bootargs} "                         \
 123                 "root=/dev/mmcblk0p2 "                                  \
 124                 "rootdelay=1\0"                                         \
 125         "addcons=setenv bootargs ${bootargs} "                          \
 126                 "console=${console}\0"                                  \
 127         "emmcboot=echo Booting from eMMC ...; "                         \
 128                 "run commonargs emmcargs addcons memargs;"              \
 129                 "mmc read 0 ${loadaddr} 0xA0000 0x4000;"                \
 130                 "bootm ${loadaddr}\0"                                   \
 131         "flash=mmc init 1;fatload mmc 1 ${loadaddr} flash.scr;"         \
 132                 "source ${loadaddr}\0"                                  \
 133         "loaduimage=mmc init 1;fatload mmc 1 ${loadaddr} uImage\0"      \
 134         "usbtty=cdc_acm\0"                                              \
 135         "stdout=serial,usbtty\0"                                        \
 136         "stdin=serial,usbtty\0"                                         \
 137         "stderr=serial,usbtty\0"
 138
 139 /*
 140  * Miscellaneous configurable options
 141  */
 142
 143 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 144 #define CONFIG_SYS_PROMPT       "U8500 $ "      /* Monitor Command Prompt   */
 145 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size  */
 146
 147 /* Print Buffer Size */
 148 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE \
 149                                         + sizeof(CONFIG_SYS_PROMPT) + 16)
 150 #define CONFIG_SYS_MAXARGS      32      /* max number of command args */
 151 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
 152
 153 #undef  CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
 154 #define CONFIG_SYS_LOAD_ADDR            0x00100000 /* default load address */
 155 #define CONFIG_SYS_LOADS_BAUD_CHANGE
 156
 157 #define CONFIG_SYS_HUSH_PARSER
 158 #define CONFIG_CMDLINE_EDITING
 159
 160 #define CONFIG_SETUP_MEMORY_TAGS        2
 161 #define CONFIG_INITRD_TAG
 162 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs  */
 163
 164 /*
 165  * I2C
 166  */
 167 #define CONFIG_U8500_I2C
 168 #undef  CONFIG_HARD_I2C                 /* I2C with hardware support */
 169 #undef  CONFIG_SOFT_I2C                 /* I2C bit-banged */
 170 #define CONFIG_I2C_MULTI_BUS
 171 #define CONFIG_SYS_I2C_SPEED            100000
 172 #define CONFIG_SYS_I2C_SLAVE            0       /* slave addr of controller */
 173 #define CONFIG_SYS_U8500_I2C0_BASE              0x80004000
 174 #define CONFIG_SYS_U8500_I2C1_BASE              0x80122000
 175 #define CONFIG_SYS_U8500_I2C2_BASE              0x80128000
 176 #define CONFIG_SYS_U8500_I2C3_BASE              0x80110000
 177 #define CONFIG_SYS_U8500_I2C_BUS_MAX            4
 178
 179 #define CONFIG_SYS_I2C_GPIOE_ADDR       0x42    /* GPIO expander chip addr */
 180 #define CONFIG_TC35892_GPIO
 181
 182 /*
 183  * Physical Memory Map
 184  */
 185 #define CONFIG_NR_DRAM_BANKS            1
 186 #define PHYS_SDRAM_1                    0x00000000      /* DDR-SDRAM Bank #1 */
 187 #define PHYS_SDRAM_SIZE_1               0x20000000      /* 512 MB */
 188
 189 /*
 190  * additions for new relocation code
 191  */
 192 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 193 #define CONFIG_SYS_INIT_RAM_SIZE        0x100000
 194 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_SDRAM_BASE + \
 195                                          CONFIG_SYS_INIT_RAM_SIZE - \
 196                                          GENERATED_GBL_DATA_SIZE)
 197 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_GBL_DATA_OFFSET
 198
 199 /* landing address before relocation */
 200 #ifndef CONFIG_SYS_TEXT_BASE
 201 #define CONFIG_SYS_TEXT_BASE            0x0
 202 #endif
 203
 204 /*
 205  * MMC related configs
 206  * NB Only externa SD slot is currently supported
 207  */
 208 #define MMC_BLOCK_SIZE                  512
 209 #define CONFIG_ARM_PL180_MMCI
 210 #define CONFIG_ARM_PL180_MMCI_BASE      0x80126000      /* MMC base for 8500  */
 211 #define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000
 212 #define CONFIG_MMC_DEV_NUM              1
 213
 214 #define CONFIG_CMD_ENV
 215 #define CONFIG_CMD_SAVEENV      /* CMD_ENV is obsolete but used in env_emmc.c */
 216 #define CONFIG_ENV_IS_IN_MMC
 217 #define CONFIG_ENV_OFFSET               0x13F80000
 218 #define CONFIG_SYS_MMC_ENV_DEV          0               /* SLOT2: eMMC */
 219
 220 /*
 221  * FLASH and environment organization
 222  */
 223 #define CONFIG_SYS_NO_FLASH
 224
 225 /*
 226  * base register values for U8500
 227  */
 228 #define CFG_PRCMU_BASE          0x80157000      /* Power, reset and clock
 229                                                    management unit */
 230 #define CFG_FSMC_BASE           0x80000000      /* FSMC Controller */
 231
 232 #endif  /* __CONFIG_H */