#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
+#include <asm/arch/crm_regs.h>
#ifdef CONFIG_FSL_ESDHC
#include <fsl_esdhc.h>
#endif
-static char *get_reset_cause(void)
+char *get_reset_cause(void)
{
u32 cause;
struct src *src_regs = (struct src *)SRC_BASE_ADDR;
void reset_cpu(ulong addr)
{
+ struct src *src_regs = (struct src *)SRC_BASE_ADDR;
+
+ /* Clear the reset status flags */
+ writel(readl(&src_regs->srsr), &src_regs->srsr);
+
__raw_writew(4, WDOG1_BASE_ADDR);
}
+
+u32 get_ahb_clk(void)
+{
+ struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ u32 reg, ahb_podf;
+
+ reg = __raw_readl(&imx_ccm->cbcdr);
+ reg &= MXC_CCM_CBCDR_AHB_PODF_MASK;
+ ahb_podf = reg >> MXC_CCM_CBCDR_AHB_PODF_OFFSET;
+
+ return get_periph_clk() / (ahb_podf + 1);
+}