ARM: i.MX6: include prototype for get_board_rev()

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / mx6 / soc.c

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 05683a3400cbcb55d436c6128d8d6262bc5db64f..6dc26003b692cbab444a1136f7f85d3eef3aca76 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -20,6 +20,7 @@
 #include <stdbool.h>
 #include <asm/arch/mxc_hdmi.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/bootm.h>
 
 enum ldo_reg {
        LDO_ARM,
@@ -354,10 +355,10 @@ const struct boot_mode soc_boot_modes[] = {
 void s_init(void)
 {
        struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
-       int is_6q = is_cpu_type(MXC_CPU_MX6Q);
+       struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
        u32 mask480;
        u32 mask528;
-
+       u32 reg, periph1, periph2;
 
        if (is_cpu_type(MXC_CPU_MX6SX))
                return;
@@ -372,15 +373,23 @@ void s_init(void)
                ANATOP_PFD_CLKGATE_MASK(1) |
                ANATOP_PFD_CLKGATE_MASK(2) |
                ANATOP_PFD_CLKGATE_MASK(3);
-       mask528 = ANATOP_PFD_CLKGATE_MASK(0) |
-               ANATOP_PFD_CLKGATE_MASK(1) |
+       mask528 = ANATOP_PFD_CLKGATE_MASK(1) |
                ANATOP_PFD_CLKGATE_MASK(3);
 
-       /*
-        * Don't reset PFD2 on DL/S
-        */
-       if (is_6q)
+       reg = readl(&ccm->cbcmr);
+       periph2 = ((reg & MXC_CCM_CBCMR_PRE_PERIPH2_CLK_SEL_MASK)
+               >> MXC_CCM_CBCMR_PRE_PERIPH2_CLK_SEL_OFFSET);
+       periph1 = ((reg & MXC_CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK)
+               >> MXC_CCM_CBCMR_PRE_PERIPH_CLK_SEL_OFFSET);
+
+       /* Checking if PLL2 PFD0 or PLL2 PFD2 is using for periph clock */
+       if ((periph2 != 0x2) && (periph1 != 0x2))
+               mask528 |= ANATOP_PFD_CLKGATE_MASK(0);
+
+       if ((periph2 != 0x1) && (periph1 != 0x1) &&
+               (periph2 != 0x3) && (periph1 != 0x3))
                mask528 |= ANATOP_PFD_CLKGATE_MASK(2);
+
        writel(mask480, &anatop->pfd_480_set);
        writel(mask528, &anatop->pfd_528_set);
        writel(mask480, &anatop->pfd_480_clr);