sunxi: add sun7i dram setup support

[karo-tx-uboot.git] / arch / arm / cpu / pxa / usb.c

diff --git a/arch/arm/cpu/pxa/usb.c b/arch/arm/cpu/pxa/usb.c
index 0311d5e9978480630223ae7c2df68a4226e91521..c31c2d73390eef5fefa6d135c649fce04db888d7 100644 (file)
--- a/arch/arm/cpu/pxa/usb.c
+++ b/arch/arm/cpu/pxa/usb.c
@@ -2,29 +2,13 @@
  * (C) Copyright 2006
  * Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
-# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
+# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X)
 
 #include <asm/arch/pxa-regs.h>
 #include <asm/io.h>
@@ -37,7 +21,7 @@ int usb_cpu_init(void)
        writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA);
        udelay(100);
 #endif
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_CPU_PXA27X)
        /* Enable USB host clock. */
        writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
 #endif
@@ -48,17 +32,17 @@ int usb_cpu_init(void)
 #endif
 
        writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
-       wait_ms(11);
+       mdelay(11);
        writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
 
        writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
        while (readl(UHCHR) & UHCHR_FSBIR)
                udelay(1);
 
-#if defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
        writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
 #endif
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_CPU_PXA27X)
        writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR);
 #endif
        writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR);
@@ -72,13 +56,13 @@ int usb_cpu_stop(void)
        udelay(11);
        writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
 
-       writel(readl(UHCCOMS) | UHCHR_FHR, UHCCOMS);
+       writel(readl(UHCCOMS) | UHCCOMS_HCR, UHCCOMS);
        udelay(10);
 
-#if defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
        writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR);
 #endif
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_CPU_PXA27X)
        writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR);
 #endif
        writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR);
@@ -88,7 +72,7 @@ int usb_cpu_stop(void)
        writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA);
        udelay(100);
 #endif
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_CPU_PXA27X)
        /* Disable USB host clock. */
        writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
 #endif
@@ -101,5 +85,5 @@ int usb_cpu_init_fail(void)
        return usb_cpu_stop();
 }
 
-# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) */
+# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) */
 #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */