]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - arch/arm/include/asm/arch-at91/at91sam9_smc.h
at91: remove all occourances of CONFIG_AT91_LEGACY
[karo-tx-uboot.git] / arch / arm / include / asm / arch-at91 / at91sam9_smc.h
index ec5d79735e8f7adf3dcdaee90c6baef9379e55b6..d29e98e711841f10c5a3b600b50c6e3574c43d41 100644 (file)
@@ -73,64 +73,4 @@ typedef struct       at91_smc {
 #define AT91_SMC_MODE_PS_16            0x20000000
 #define AT91_SMC_MODE_PS_32            0x30000000
 
-#ifdef CONFIG_AT91_LEGACY
-
-#define AT91_SMC_SETUP(n)      (AT91_SMC + 0x00 + ((n)*0x10))  /* Setup Register for CS n */
-#define                AT91_SMC_NWESETUP       (0x3f << 0)                     /* NWE Setup Length */
-#define                        AT91_SMC_NWESETUP_(x)   ((x) << 0)
-#define                AT91_SMC_NCS_WRSETUP    (0x3f << 8)                     /* NCS Setup Length in Write Access */
-#define                        AT91_SMC_NCS_WRSETUP_(x)        ((x) << 8)
-#define                AT91_SMC_NRDSETUP       (0x3f << 16)                    /* NRD Setup Length */
-#define                        AT91_SMC_NRDSETUP_(x)   ((x) << 16)
-#define                AT91_SMC_NCS_RDSETUP    (0x3f << 24)                    /* NCS Setup Length in Read Access */
-#define                        AT91_SMC_NCS_RDSETUP_(x)        ((x) << 24)
-
-#define AT91_SMC_PULSE(n)      (AT91_SMC + 0x04 + ((n)*0x10))  /* Pulse Register for CS n */
-#define                AT91_SMC_NWEPULSE       (0x7f <<  0)                    /* NWE Pulse Length */
-#define                        AT91_SMC_NWEPULSE_(x)   ((x) << 0)
-#define                AT91_SMC_NCS_WRPULSE    (0x7f <<  8)                    /* NCS Pulse Length in Write Access */
-#define                        AT91_SMC_NCS_WRPULSE_(x)((x) << 8)
-#define                AT91_SMC_NRDPULSE       (0x7f << 16)                    /* NRD Pulse Length */
-#define                        AT91_SMC_NRDPULSE_(x)   ((x) << 16)
-#define                AT91_SMC_NCS_RDPULSE    (0x7f << 24)                    /* NCS Pulse Length in Read Access */
-#define                        AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
-
-#define AT91_SMC_CYCLE(n)      (AT91_SMC + 0x08 + ((n)*0x10))  /* Cycle Register for CS n */
-#define                AT91_SMC_NWECYCLE       (0x1ff << 0 )                   /* Total Write Cycle Length */
-#define                        AT91_SMC_NWECYCLE_(x)   ((x) << 0)
-#define                AT91_SMC_NRDCYCLE       (0x1ff << 16)                   /* Total Read Cycle Length */
-#define                        AT91_SMC_NRDCYCLE_(x)   ((x) << 16)
-
-#define AT91_SMC_MODE(n)       (AT91_SMC + 0x0c + ((n)*0x10))  /* Mode Register for CS n */
-#define                AT91_SMC_READMODE       (1 <<  0)                       /* Read Mode */
-#define                AT91_SMC_WRITEMODE      (1 <<  1)                       /* Write Mode */
-#define                AT91_SMC_EXNWMODE       (3 <<  4)                       /* NWAIT Mode */
-#define                        AT91_SMC_EXNWMODE_DISABLE       (0 << 4)
-#define                        AT91_SMC_EXNWMODE_FROZEN        (2 << 4)
-#define                        AT91_SMC_EXNWMODE_READY         (3 << 4)
-#define                AT91_SMC_BAT            (1 <<  8)                       /* Byte Access Type */
-#define                        AT91_SMC_BAT_SELECT             (0 << 8)
-#define                        AT91_SMC_BAT_WRITE              (1 << 8)
-#define                AT91_SMC_DBW            (3 << 12)                       /* Data Bus Width */
-#define                        AT91_SMC_DBW_8                  (0 << 12)
-#define                        AT91_SMC_DBW_16                 (1 << 12)
-#define                        AT91_SMC_DBW_32                 (2 << 12)
-#define                AT91_SMC_TDF            (0xf << 16)                     /* Data Float Time. */
-#define                        AT91_SMC_TDF_(x)                ((x) << 16)
-#define                AT91_SMC_TDFMODE        (1 << 20)                       /* TDF Optimization - Enabled */
-#define                AT91_SMC_PMEN           (1 << 24)                       /* Page Mode Enabled */
-#define                AT91_SMC_PS             (3 << 28)                       /* Page Size */
-#define                        AT91_SMC_PS_4                   (0 << 28)
-#define                        AT91_SMC_PS_8                   (1 << 28)
-#define                        AT91_SMC_PS_16                  (2 << 28)
-#define                        AT91_SMC_PS_32                  (3 << 28)
-
-#if defined(AT91_SMC1)         /* The AT91SAM9263 has 2 Static Memory contollers */
-#define AT91_SMC1_SETUP(n)     (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
-#define AT91_SMC1_PULSE(n)     (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
-#define AT91_SMC1_CYCLE(n)     (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
-#define AT91_SMC1_MODE(n)      (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
-#endif
-
-#endif
 #endif