#define MXC_CPU_MX6DL 0x61
#define MXC_CPU_MX6SX 0x62
#define MXC_CPU_MX6Q 0x63
-#define MXC_CPU_MX6D 0x64
-#define MXC_CPU_MX6SOLO 0x65 /* dummy ID */
+#define MXC_CPU_MX6UL 0x64
+#define MXC_CPU_MX6ULL 0x65
+#define MXC_CPU_MX6SOLO 0x66 /* dummy ID */
+#define MXC_CPU_MX6SLL 0x67
+#define MXC_CPU_MX6D 0x6A
+#define MXC_CPU_MX6DP 0x68
+#define MXC_CPU_MX6QP 0x69
#define CS0_128 0
#define CS0_64M_CS1_64M 1
#define CS0_64M_CS1_32M_CS2_32M 2
#define CS0_32M_CS1_32M_CS2_32M_CS3_32M 3
+
+u32 get_imx_reset_cause(void);