const unsigned int iomux_size);
#endif
+struct mx28_pair {
+ uint8_t boot_pads;
+ uint8_t boot_mask;
+ const char *mode;
+};
+
+static const struct mx28_pair mx28_boot_modes[] = {
+ { 0x00, 0x0f, "USB #0" },
+ { 0x01, 0x1f, "I2C #0, master, 3V3" },
+ { 0x11, 0x1f, "I2C #0, master, 1V8" },
+ { 0x02, 0x1f, "SSP SPI #2, master, 3V3 NOR" },
+ { 0x12, 0x1f, "SSP SPI #2, master, 1V8 NOR" },
+ { 0x03, 0x1f, "SSP SPI #3, master, 3V3 NOR" },
+ { 0x13, 0x1f, "SSP SPI #3, master, 1V8 NOR" },
+ { 0x04, 0x1f, "NAND, 3V3" },
+ { 0x14, 0x1f, "NAND, 1V8" },
+ { 0x08, 0x1f, "SSP SPI #3, master, 3V3 EEPROM" },
+ { 0x18, 0x1f, "SSP SPI #3, master, 1V8 EEPROM" },
+ { 0x09, 0x1f, "SSP SD/MMC #0, 3V3" },
+ { 0x19, 0x1f, "SSP SD/MMC #0, 1V8" },
+ { 0x0a, 0x1f, "SSP SD/MMC #1, 3V3" },
+ { 0x1a, 0x1f, "SSP SD/MMC #1, 1V8" },
+ { 0x00, 0x00, "Reserved/Unknown/Wrong" },
+};
+
+struct mx28_spl_data {
+ uint8_t boot_mode_idx;
+ uint32_t mem_dram_size;
+};
+
int mx28_dram_init(void);
#endif /* __MX28_H__ */