Merge branch 'master' of git://git.denx.de/u-boot-arm

[karo-tx-uboot.git] / arch / arm / include / asm / arch-omap4 / omap.h

diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 5f321fe6f0095a3a7ba4901391c6108567b2e29a..9fd00ff2aa431502eb92608fb3706047063758fe 100644 (file)
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -47,14 +47,6 @@
 #define DRAM_ADDR_SPACE_START  OMAP44XX_DRAM_ADDR_SPACE_START
 #define DRAM_ADDR_SPACE_END    OMAP44XX_DRAM_ADDR_SPACE_END
 
-/* CONTROL */
-#define CTRL_BASE              (OMAP44XX_L4_CORE_BASE + 0x2000)
-#define CONTROL_PADCONF_CORE   (OMAP44XX_L4_CORE_BASE + 0x100000)
-#define CONTROL_PADCONF_WKUP   (OMAP44XX_L4_CORE_BASE + 0x31E000)
-
-/* LPDDR2 IO regs */
-#define LPDDR2_IO_REGS_BASE    0x4A100638
-
 /* CONTROL_ID_CODE */
 #define CONTROL_ID_CODE                0x4A002204
 
@@ -79,15 +71,9 @@
 /* Watchdog Timer2 - MPU watchdog */
 #define WDT2_BASE              (OMAP44XX_L4_WKUP_BASE + 0x14000)
 
-/* 32KTIMER */
-#define SYNC_32KTIMER_BASE     (OMAP44XX_L4_WKUP_BASE + 0x4000)
-
 /* GPMC */
 #define OMAP44XX_GPMC_BASE     0x50000000
 
-/* SYSTEM CONTROL MODULE */
-#define SYSCTRL_GENERAL_CORE_BASE      0x4A002000
-
 /*
  * Hardware Register Details
  */
@@ -141,43 +127,15 @@ struct s32ktimer {
  */
 #define NON_SECURE_SRAM_START  0x40304000
 #define NON_SECURE_SRAM_END    0x4030E000      /* Not inclusive */
+#define SRAM_SCRATCH_SPACE_ADDR        NON_SECURE_SRAM_START
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE     0x4030D000
-/* Temporary SRAM stack used while low level init is done */
-#define SRAM_SCRATCH_SPACE_ADDR                NON_SECURE_SRAM_START
-/* SRAM scratch space entries */
-#define OMAP4_SRAM_SCRATCH_OMAP4_REV   SRAM_SCRATCH_SPACE_ADDR
-#define OMAP4_SRAM_SCRATCH_EMIF_SIZE   (SRAM_SCRATCH_SPACE_ADDR + 0x4)
-#define OMAP4_SRAM_SCRATCH_EMIF_T_NUM  (SRAM_SCRATCH_SPACE_ADDR + 0xC)
-#define OMAP4_SRAM_SCRATCH_EMIF_T_DEN  (SRAM_SCRATCH_SPACE_ADDR + 0x10)
-#define OMAP_SRAM_SCRATCH_PRCM_PTR      (SRAM_SCRATCH_SPACE_ADDR + 0x14)
-#define OMAP_SRAM_SCRATCH_DPLLS_PTR     (SRAM_SCRATCH_SPACE_ADDR + 0x18)
-#define OMAP_SRAM_SCRATCH_VCORES_PTR   (SRAM_SCRATCH_SPACE_ADDR + 0x1C)
-#define OMAP4_SRAM_SCRATCH_SYS_CTRL    (SRAM_SCRATCH_SPACE_ADDR + 0x20)
-#define OMAP4_SRAM_SCRATCH_SPACE_END   (SRAM_SCRATCH_SPACE_ADDR + 0x24)
-
-/* ROM code defines */
-/* Boot device */
-#define BOOT_DEVICE_MASK       0xFF
-#define BOOT_DEVICE_OFFSET     0x8
-#define DEV_DESC_PTR_OFFSET    0x4
-#define DEV_DATA_PTR_OFFSET    0x18
-#define BOOT_MODE_OFFSET       0x8
-#define RESET_REASON_OFFSET    0x9
-#define CH_FLAGS_OFFSET                0xA
-
-#define CH_FLAGS_CHSETTINGS    (0x1 << 0)
-#define CH_FLAGS_CHRAM         (0x1 << 1)
-#define CH_FLAGS_CHFLASH       (0x1 << 2)
-#define CH_FLAGS_CHMMCSD       (0x1 << 3)
 
-#ifndef __ASSEMBLY__
-struct omap_boot_parameters {
-       char *boot_message;
-       unsigned int mem_boot_descriptor;
-       unsigned char omap_bootdevice;
-       unsigned char reset_reason;
-       unsigned char ch_flags;
-};
-#endif
+/* ABB settings */
+#define OMAP_ABB_SETTLING_TIME         50
+#define OMAP_ABB_CLOCK_CYCLES          16
+
+/* ABB tranxdone mask */
+#define OMAP_ABB_MPU_TXDONE_MASK       (0x1 << 7)
+
 #endif