#include <asm/gpio.h>
#include <asm/arch/mx6-pins.h>
#include <asm/arch/clock.h>
+#include <asm/arch/hab.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/sys_proto.h>
MX6_PAD_DECL(GARBAGE, 0, 0, 0, 0, 0, 0)
};
-static const iomux_v3_cfg_t const tx6qdl_pads[] = {
- MX6_PAD_GARBAGE,
-#ifdef CONFIG_TX6_NAND_
- /* NAND flash pads */
- MX6_PAD_NANDF_CLE__NAND_CLE,
- MX6_PAD_NANDF_ALE__NAND_ALE,
- MX6_PAD_NANDF_WP_B__NAND_RESETN,
- MX6_PAD_NANDF_RB0__NAND_READY0,
- MX6_PAD_NANDF_CS0__NAND_CE0N,
- MX6_PAD_SD4_CMD__NAND_RDN,
- MX6_PAD_SD4_CLK__NAND_WRN,
- MX6_PAD_NANDF_D0__NAND_D0,
- MX6_PAD_NANDF_D1__NAND_D1,
- MX6_PAD_NANDF_D2__NAND_D2,
- MX6_PAD_NANDF_D3__NAND_D3,
- MX6_PAD_NANDF_D4__NAND_D4,
- MX6_PAD_NANDF_D5__NAND_D5,
- MX6_PAD_NANDF_D6__NAND_D6,
- MX6_PAD_NANDF_D7__NAND_D7,
+char __uboot_img_end[0] __attribute__((section(".__uboot_img_end")));
+#ifdef CONFIG_SECURE_BOOT
+char __csf_data[0] __attribute__((section(".__csf_data")));
#endif
+
+static const iomux_v3_cfg_t const tx6qdl_pads[] = {
/* RESET_OUT */
MX6_PAD_GPIO_17__GPIO7_IO12,
int board_early_init_f(void)
{
- gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios));
- imx_iomux_v3_setup_multiple_pads(tx6qdl_pads, ARRAY_SIZE(tx6qdl_pads));
-
return 0;
}
#else
#define tx6_temp_check_enabled 0
#endif
+static int pmic_addr __data;
int board_init(void)
{
int ret;
+ ret = gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios));
+ if (ret < 0) {
+ printf("Failed to request tx6qdl_gpios: %d\n", ret);
+ }
+ imx_iomux_v3_setup_multiple_pads(tx6qdl_pads, ARRAY_SIZE(tx6qdl_pads));
+
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
gd->bd->bi_arch_number = -1;
#ifndef CONFIG_MX6_TEMPERATURE_HOT
tx6_temp_check_enabled = false;
#endif
- return 1;
+ return 0;
}
- ret = tx6_pmic_init();
+ ret = tx6_pmic_init(pmic_addr);
if (ret) {
- printf("Failed to setup PMIC voltages\n");
+ printf("Failed to setup PMIC voltages: %d\n", ret);
hang();
}
return 0;
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- PHYS_SDRAM_1_SIZE);
+ PHYS_SDRAM_1_SIZE * CONFIG_NR_DRAM_BANKS);
return 0;
}
#endif
}
-#ifdef CONFIG_CMD_MMC
-#define SD_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+#ifdef CONFIG_FSL_ESDHC
+#define SD_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST)
static const iomux_v3_cfg_t mmc0_pads[] = {
MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(SD_PAD_CTRL),
MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(SD_PAD_CTRL),
MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(SD_PAD_CTRL),
/* eMMC RESET */
- MX6_PAD_NANDF_ALE__SD4_RESET,
+ MX6_PAD_NANDF_ALE__SD4_RESET | MUX_PAD_CTRL(PAD_CTL_PUS_47K_UP |
+ PAD_CTL_DSE_40ohm),
};
#endif
.upper_margin = 2,
.vsync_len = 10,
.lower_margin = 2,
- .sync = FB_SYNC_CLK_LAT_FALL,
},
{
/* Emerging ET0500G0DH6 800 x 480 display.
*/
lcd_is_enabled = 0;
- karo_load_splashimage(1);
-
if (lcd_enabled) {
+ karo_load_splashimage(1);
+
debug("Switching LCD on\n");
gpio_set_value(TX6_LCD_PWR_GPIO, 1);
udelay(100);
static void stk5_board_init(void)
{
- gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
+ int ret;
+
+ ret = gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
+ if (ret < 0) {
+ printf("Failed to request stk5_gpios: %d\n", ret);
+ return;
+ }
imx_iomux_v3_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
}
static void stk5v5_board_init(void)
{
+ int ret;
+
stk5_board_init();
- gpio_request_one(IMX_GPIO_NR(4, 21), GPIOFLAG_OUTPUT_INIT_HIGH,
+ ret = gpio_request_one(IMX_GPIO_NR(4, 21), GPIOFLAG_OUTPUT_INIT_HIGH,
"Flexcan Transceiver");
+ if (ret) {
+ printf("Failed to request Flexcan Transceiver GPIO: %d\n", ret);
+ return;
+ }
+
imx_iomux_v3_setup_pad(MX6_PAD_DISP0_DAT0__GPIO4_IO21);
}
{
int ret = 0;
const char *baseboard;
+#if 1
+ /* override secure_boot fuse */
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+ struct fuse_bank0_regs *fuse = (void *)ocotp->bank[0].fuse_regs;
+
+ writel(0x12, &fuse->cfg5);
+#endif
env_cleanup();
{ 0x33, 3, },
};
-static int tx6_get_mod_rev(void)
+static int tx6_get_mod_rev(unsigned int pmic_id)
+{
+ if (pmic_id < ARRAY_SIZE(tx6_mod_revs))
+ return tx6_mod_revs[pmic_id].rev;
+
+ return 0;
+}
+
+static int tx6_pmic_probe(void)
{
int i;
+ i2c_init_all();
+
for (i = 0; i < ARRAY_SIZE(tx6_mod_revs); i++) {
- int ret = i2c_probe(tx6_mod_revs[i].addr);
+ u8 i2c_addr = tx6_mod_revs[i].addr;
+ int ret = i2c_probe(i2c_addr);
+
if (ret == 0) {
- debug("I2C probe succeeded for addr %02x\n", tx6_mod_revs[i].addr);
- return tx6_mod_revs[i].rev;
+ debug("I2C probe succeeded for addr 0x%02x\n", i2c_addr);
+ return i;
}
- debug("I2C probe returned %d for addr %02x\n", ret,
- tx6_mod_revs[i].addr);
+ debug("I2C probe returned %d for addr 0x%02x\n", ret, i2c_addr);
}
- return 0;
+ return -EINVAL;
}
int checkboard(void)
{
u32 cpurev = get_cpu_rev();
int cpu_variant = (cpurev >> 12) & 0xff;
+ int pmic_id;
tx6qdl_print_cpuinfo();
- i2c_init(CONFIG_SYS_I2C_SPEED, 0 /* unused */);
+ pmic_id = tx6_pmic_probe();
+ if (pmic_id >= 0)
+ pmic_addr = tx6_mod_revs[pmic_id].addr;
printf("Board: Ka-Ro TX6%s-%d%d%d%c\n",
tx6_mod_suffix,
cpu_variant == MXC_CPU_MX6Q ? 1 : 8,
- is_lvds(), tx6_get_mod_rev(),
+ is_lvds(), tx6_get_mod_rev(pmic_id),
tx6_mem_suffix());
+ get_hab_status();
+
return 0;
}