#define TX6_FEC_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP | \
PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST)
+ PAD_CTL_SRE_SLOW)
#define TX6_GPIO_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | \
PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_34ohm | \
PAD_CTL_DSE_40ohm | \
PAD_CTL_SRE_SLOW)
-static const iomux_v3_cfg_t const tx6qdl_pads[] = {
+static const iomux_v3_cfg_t tx6qdl_pads[] = {
/* RESET_OUT */
MX6_PAD_GPIO_17__GPIO7_IO12 | TX6_DEFAULT_PAD_CTRL,
MX6_PAD_SD3_DAT4__GPIO7_IO01 | TX6_DEFAULT_PAD_CTRL, /* PHY INT */
};
-static const iomux_v3_cfg_t const tx6qdl_fec_pads[] = {
+static const iomux_v3_cfg_t tx6qdl_fec_pads[] = {
/* FEC functions */
MX6_PAD_ENET_MDC__ENET_MDC | TX6_FEC_PAD_CTRL,
MX6_PAD_ENET_MDIO__ENET_MDIO | TX6_FEC_PAD_CTRL,
- MX6_PAD_GPIO_16__ENET_REF_CLK | TX6_FEC_PAD_CTRL,
+ MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP |
+ PAD_CTL_SPEED_LOW |
+ PAD_CTL_DSE_80ohm |
+ PAD_CTL_SRE_SLOW),
MX6_PAD_ENET_RX_ER__ENET_RX_ER | TX6_FEC_PAD_CTRL,
MX6_PAD_ENET_CRS_DV__ENET_RX_EN | TX6_FEC_PAD_CTRL,
MX6_PAD_ENET_RXD1__ENET_RX_DATA1 | TX6_FEC_PAD_CTRL,
MX6_PAD_ENET_TXD0__ENET_TX_DATA0 | TX6_FEC_PAD_CTRL,
};
-static const iomux_v3_cfg_t const tx6_i2c_gpio_pads[] = {
+static const iomux_v3_cfg_t tx6_i2c_gpio_pads[] = {
/* internal I2C */
MX6_PAD_EIM_D28__GPIO3_IO28 | MUX_CFG_SION |
TX6_GPIO_PAD_CTRL,
TX6_GPIO_PAD_CTRL,
};
-static const iomux_v3_cfg_t const tx6_i2c_pads[] = {
+static const iomux_v3_cfg_t tx6_i2c_pads[] = {
/* internal I2C */
MX6_PAD_EIM_D28__I2C1_SDA | TX6_I2C_PAD_CTRL,
MX6_PAD_EIM_D21__I2C1_SCL | TX6_I2C_PAD_CTRL,
};
-static const struct gpio const tx6qdl_gpios[] = {
+static const struct gpio tx6qdl_gpios[] = {
/* These two entries are used to forcefully reinitialize the I2C bus */
{ TX6_I2C1_SCL_GPIO, GPIOFLAG_INPUT, "I2C1 SCL", },
{ TX6_I2C1_SDA_GPIO, GPIOFLAG_INPUT, "I2C1 SDA", },
{ RN5T567_DC2DAC_SLP, VDD_SOC_VAL_LP, },
{ RN5T567_DC3DAC_SLP, VDD_DDR_VAL_LP, },
{ RN5T567_DC4DAC_SLP, VDD_HIGH_VAL_LP, },
- { RN5T567_DC1CTL, DCnCTL_DCnEN | DCnMODE_SLP(DCnMODE_PSM), },
- { RN5T567_DC2CTL, DCnCTL_DCnEN | DCnMODE_SLP(DCnMODE_PSM), },
- { RN5T567_DC3CTL, DCnCTL_DCnEN | DCnMODE_SLP(DCnMODE_PSM), },
- { RN5T567_DC4CTL, DCnCTL_DCnEN | DCnMODE_SLP(DCnMODE_PSM), },
+ { RN5T567_DC1CTL, DCnCTL_EN | DCnMODE_SLP(MODE_PSM), },
+ { RN5T567_DC2CTL, DCnCTL_EN | DCnMODE_SLP(MODE_PSM), },
+ { RN5T567_DC3CTL, DCnCTL_EN | DCnMODE_SLP(MODE_PSM), },
+ { RN5T567_DC4CTL, DCnCTL_EN | DCnMODE_SLP(MODE_PSM), },
{ RN5T567_LDORTC1DAC, VDD_RTC_VAL, },
{ RN5T567_LDORTC1_SLOT, 0x0f, ~0x3f, },
{ RN5T567_LDO1DAC, VDD_IO_INT_VAL, },
{ RN5T567_LDODIS, 0x1c, ~0x1f, },
{ RN5T567_INTPOL, 0, },
{ RN5T567_INTEN, 0x3, },
- { RN5T567_IREN, 0xf, },
+ { RN5T567_DCIREN, 0xf, },
{ RN5T567_EN_GPIR, 0, },
};
#endif
LED_STATE_INIT = -1,
LED_STATE_OFF,
LED_STATE_ON,
+ LED_STATE_DISABLED,
};
+static int led_state = LED_STATE_INIT;
+
static inline int calc_blink_rate(void)
{
if (!tx6_temp_check_enabled)
void show_activity(int arg)
{
- static int led_state = LED_STATE_INIT;
static int blink_rate;
static ulong last;
+ int ret;
if (led_state == LED_STATE_INIT) {
last = get_timer(0);
- gpio_set_value(TX6_LED_GPIO, 1);
+ ret = gpio_set_value(TX6_LED_GPIO, 1);
+ if (ret) {
+ led_state = LED_STATE_DISABLED;
+ return;
+ }
led_state = LED_STATE_ON;
blink_rate = calc_blink_rate();
- } else {
+ } else if (led_state != LED_STATE_DISABLED) {
if (get_timer(last) > blink_rate) {
blink_rate = calc_blink_rate();
last = get_timer_masked();
panel_info.vl_bpix = LCD_COLOR32;
}
- p->pixclock = KHZ2PICOS(refresh *
- (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
- (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
- 1000);
+ if (refresh_set || p->pixclock == 0)
+ p->pixclock = KHZ2PICOS(refresh *
+ (p->xres + p->left_margin +
+ p->right_margin + p->hsync_len) *
+ (p->yres + p->upper_margin +
+ p->lower_margin + p->vsync_len) /
+ 1000);
debug("Pixel clock set to %lu.%03lu MHz\n",
PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
printf("Failed to request stk5_gpios: %d\n", ret);
return;
}
+ led_state = LED_STATE_INIT;
imx_iomux_v3_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
}