u32 cpurev = get_cpu_rev();
char *cpu_str = "?";
- switch ((cpurev >> 12) & 0xff) {
- case MXC_CPU_MX6SL:
+ if (is_cpu_type(MXC_CPU_MX6SL)) {
cpu_str = "SL";
tx6_mod_suffix = "?";
- break;
- case MXC_CPU_MX6DL:
+ } else if (is_cpu_type(MXC_CPU_MX6DL)) {
cpu_str = "DL";
tx6_mod_suffix = "U";
- break;
- case MXC_CPU_MX6SOLO:
+ } else if (is_cpu_type(MXC_CPU_MX6SOLO)) {
cpu_str = "SOLO";
tx6_mod_suffix = "S";
- break;
- case MXC_CPU_MX6Q:
+ } else if (is_cpu_type(MXC_CPU_MX6Q)) {
cpu_str = "Q";
tx6_mod_suffix = "Q";
- break;
+ } else if (is_cpu_type(MXC_CPU_MX6QP)) {
+ cpu_str = "QP";
+ tx6_mod_suffix = "QP";
}
printf("CPU: Freescale i.MX6%s rev%d.%d at %d MHz\n",
#define TX6_DDR_SZ (ffs(CONFIG_SYS_SDRAM_BUS_WIDTH / 16) - 1)
static char tx6_mem_table[] = {
- '4', /* 256MiB SDRAM 16bit; 128MiB NAND */
- '1', /* 512MiB SDRAM 32bit; 128MiB NAND */
- '0', /* 1GiB SDRAM 64bit; 128MiB NAND */
- '?', /* 256MiB SDRAM 16bit; 256MiB NAND */
- '?', /* 512MiB SDRAM 32bit; 256MiB NAND */
- '2', /* 1GiB SDRAM 64bit; 256MiB NAND */
- '?', /* 256MiB SDRAM 16bit; 4GiB eMMC */
- '5', /* 512MiB SDRAM 32bit; 4GiB eMMC */
- '3', /* 1GiB SDRAM 64bit; 4GiB eMMC */
- '?', /* 256MiB SDRAM 16bit; 8GiB eMMC */
- '?', /* 512MiB SDRAM 32bit; 8GiB eMMC */
- '0', /* 1GiB SDRAM 64bit; 8GiB eMMC */
+ '4', /* TX6S-8034 256MiB SDRAM 16bit; 128MiB NAND */
+ '1', /* TX6U-8011 512MiB SDRAM 32bit; 128MiB NAND */
+ '0', /* TX6Q-1030/TX6U-8030 1GiB SDRAM 64bit; 128MiB NAND */
+ '?', /* N/A 256MiB SDRAM 16bit; 256MiB NAND */
+ '?', /* N/A 512MiB SDRAM 32bit; 256MiB NAND */
+ '2', /* TX6U-8012 1GiB SDRAM 64bit; 256MiB NAND */
+ '?', /* N/A 256MiB SDRAM 16bit; 4GiB eMMC */
+ '5', /* TX6S-8035 512MiB SDRAM 32bit; 4GiB eMMC */
+ '3', /* TX6U-8033 1GiB SDRAM 64bit; 4GiB eMMC */
+ '?', /* N/A 256MiB SDRAM 16bit; 8GiB eMMC */
+ '?', /* N/A 512MiB SDRAM 32bit; 8GiB eMMC */
+#if defined(CONFIG_TX6_REV) && CONFIG_TX6_REV == 2
+ '0', /* TX6Q-1020 (legacy) 1GiB SDRAM 64bit; 8GiB eMMC */
+#else
+ '6', /* TX6Q-1036 1GiB SDRAM 64bit; 8GiB eMMC */
+#endif
};
static struct {
if (mem_idx >= ARRAY_SIZE(tx6_mem_table))
return '?';
-
+ if (CONFIG_SYS_SDRAM_CHIP_SIZE > 512)
+ return '7';
+ if (mem_idx == 8)
+ return is_cpu_type(MXC_CPU_MX6Q) ? '6' : '3';
return tx6_mem_table[mem_idx];
};
int board_init(void)
{
int ret;
- u32 cpurev = get_cpu_rev();
- int cpu_variant = (cpurev >> 12) & 0xff;
int pmic_id;
debug("%s@%d: \n", __func__, __LINE__);
printf("Board: Ka-Ro TX6%s-%d%d%d%c\n",
tx6_mod_suffix,
- cpu_variant == MXC_CPU_MX6Q ? 1 : 8,
+ is_cpu_type(MXC_CPU_MX6Q) ? 1 : 8,
is_lvds(), tx6_get_mod_rev(pmic_id),
tx6_mem_suffix());
void dram_init_banksize(void)
{
- debug("%s@%d: \n", __func__, __LINE__);
-
+ debug("%s@%d: chip_size=%u (%u bit bus width)\n", __func__, __LINE__,
+ CONFIG_SYS_SDRAM_CHIP_SIZE, CONFIG_SYS_SDRAM_BUS_WIDTH);
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
PHYS_SDRAM_1_SIZE);
};
#ifdef CONFIG_LCD
-static u16 tx6_cmap[256];
vidinfo_t panel_info = {
/* set to max. size supported by SoC */
.vl_col = 1920,
.vl_row = 1080,
.vl_bpix = LCD_COLOR32, /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
- .cmap = tx6_cmap,
};
static struct fb_videomode tx6_fb_modes[] = {
if (!lcd_enabled) {
debug("LCD disabled\n");
+ goto disable;
return;
}
debug("Disabling LCD\n");
lcd_enabled = 0;
setenv("splashimage", NULL);
+ goto disable;
return;
}
if (video_mode == NULL) {
debug("Disabling LCD\n");
lcd_enabled = 0;
+ goto disable;
return;
}
vm = video_mode;
fb_mode.xres, fb_mode.yres,
panel_info.vl_col, panel_info.vl_row);
lcd_enabled = 0;
+ goto disable;
return;
}
}
printf(" %s", p->name);
}
printf("\n");
+ goto disable;
return;
}
if (p->xres > panel_info.vl_col || p->yres > panel_info.vl_row) {
printf("video resolution: %dx%d exceeds hardware limits: %dx%d\n",
p->xres, p->yres, panel_info.vl_col, panel_info.vl_row);
lcd_enabled = 0;
+ goto disable;
return;
}
panel_info.vl_col = p->xres;
lcd_enabled = 0;
printf("Invalid %s bus width: %d\n", is_lvds() ? "LVDS" : "LCD",
lcd_bus_width);
+ goto disable;
return;
}
if (is_lvds()) {
if (lvds_chan_mask == 0) {
printf("No LVDS channel active\n");
lcd_enabled = 0;
+ goto disable;
return;
}
} else {
debug("Skipping initialization of LCD controller\n");
}
+ return;
+
+disable:
+ lcd_enabled = 0;
+ panel_info.vl_col = 0;
+ panel_info.vl_row = 0;
+
}
#else
#define lcd_enabled 0
int board_late_init(void)
{
- int ret = 0;
const char *baseboard;
debug("%s@%d: \n", __func__, __LINE__);
} else {
printf("WARNING: Unsupported baseboard: '%s'\n",
baseboard);
- ret = -EINVAL;
+ if (!had_ctrlc())
+ return -EINVAL;
}
exit:
gpio_set_value(TX6_RESET_OUT_GPIO, 1);
clear_ctrlc();
- return ret;
+ return 0;
}
#ifdef CONFIG_SERIAL_TAG